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Searched refs:XCHAL_NUM_AREGS (Results 201 – 225 of 474) sorted by relevance

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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/xtensa/core-dc232b/
H A Dcore-isa.h30 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/xtensa/core-dc232b/
H A Dcore-isa.h30 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/xtensa/core-dc232b/
H A Dcore-isa.h30 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/xtensa/core-dsp3400/
H A Dcore-isa.h51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h29 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu/qemu-6.2.0/target/xtensa/core-dc232b/
H A Dcore-isa.h30 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu/qemu-6.2.0/target/xtensa/core-dsp3400/
H A Dcore-isa.h51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro
/dports/emulators/qemu/qemu-6.2.0/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */ macro

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