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Searched refs:control_core_control_spare_r (Results 26 – 50 of 126) sorted by relevance

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/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C, in config_data_eye_leveling_samples()
433 .control_core_control_spare_r = 0x4A002E6C, in init_package_revision()
/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-bananapim2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-tools/u-boot-2020.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,
/dports/sysutils/u-boot-rpi4/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dprcm-regs.c341 .control_core_control_spare_r = 0x4A002E6C,
433 .control_core_control_spare_r = 0x4A002E6C,

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