| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 141 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
144 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 141 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
144 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */
|
| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|
| /dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 146 clrbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA down */ in board_early_init_f()
149 setbits_be32(&immr->im_cpm.cp_pbdat, 0x00020000); /* PROGFPGA up */ in board_early_init_f()
|