Searched refs:efsctsiz (Results 126 – 139 of 139) sorted by relevance
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| /dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/rs6000/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/powerpcspe/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/lang/gnat_util/gcc-6-20180516/gcc/config/rs6000/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/lang/gcc48/gcc-4.8.5/gcc/config/rs6000/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/rs6000/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/lang/gcc8/gcc-8.5.0/gcc/config/powerpcspe/ |
| H A D | spe.md | 126 "efsctsiz %0,%1"
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| /dports/devel/avr-gdb/gdb-7.3.1/sim/ppc/ |
| H A D | e500.igen | 2807 0.4,6.RS,11.0,16.RB,21.730:EVX:e500:efsctsiz %RS,%RB:Convert Floating-Point to Signed Integer with …
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| /dports/devel/gdb761/gdb-7.6.1/sim/ppc/ |
| H A D | e500.igen | 2807 0.4,6.RS,11.0,16.RB,21.730:EVX:e500:efsctsiz %RS,%RB:Convert Floating-Point to Signed Integer with …
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| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/ |
| H A D | e500.igen | 2809 0.4,6.RS,11.0,16.RB,21.730:EVX:e500:efsctsiz %RS,%RB:Convert Floating-Point to Signed Integer with …
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| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/ |
| H A D | e500.igen | 2809 0.4,6.RS,11.0,16.RB,21.730:EVX:e500:efsctsiz %RS,%RB:Convert Floating-Point to Signed Integer with …
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| H A D | PPCGenAsmMatcher.inc | 4228 "si\010efsctsiz\007efsctuf\007efsctui\010efsctuiz\006efsdiv\006efsmul\007"
5409 …{ 3826 /* efsctsiz */, PPC::EFSCTSIZ, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC…
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