/dports/misc/usd/USD-21.11/pxr/base/trace/ |
H A D | concurrentList.h | 110 Node* curNode = _head.load(std::memory_order_acquire); in ~TraceConcurrentList() 125 iterator begin() { return iterator(_head.load(std::memory_order_acquire)); } in begin() 137 newNode->next = _head.load(std::memory_order_relaxed); in Insert()
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/dports/misc/vxl/vxl-3.3.2/contrib/oxl/mvl/ |
H A D | HMatrix3D.cxx | 43 load(s); in HMatrix3D() 114 bool HMatrix3D::load(std::istream& s) in load() function in HMatrix3D 123 H.load(s); in operator >>()
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/dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/src/java.base/share/classes/java/nio/channels/spi/ |
H A D | AsynchronousChannelProvider.java | 75 static final AsynchronousChannelProvider provider = load(); 77 private static AsynchronousChannelProvider load() { in load() method in AsynchronousChannelProvider.ProviderHolder 114 ServiceLoader.load(AsynchronousChannelProvider.class, in loadProviderAsService()
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/dports/databases/p5-DBIx-DBHResolver/DBIx-DBHResolver-0.17/t/ |
H A D | config.t | 51 is_deeply( $r->config, +{}, 'empty config before calling load method' ); 52 $r->load($CONFIG_YAML_FILE); 55 $r->load(@CONFIG_PERL_FILES);
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/dports/accessibility/wl-gammarelay-rs/wl-gammarelay-rs-0.2.1/cargo-crates/futures-channel-0.3.21/tests/ |
H A D | channel.rs | 61 assert_eq!(DROPS.load(Ordering::SeqCst), 0); in drop_order() 63 assert_eq!(DROPS.load(Ordering::SeqCst), 1); in drop_order() 65 assert_eq!(DROPS.load(Ordering::SeqCst), 2); in drop_order()
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/dports/deskutils/py-autokey/autokey-0.95.10/lib/autokey/qtui/ |
H A D | folderpage.py | 43 def load(self, folder: Folder): member in FolderPage 46 self.settingsWidget.load(folder) 76 self.load(self.current_folder)
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/lld/test/mach-o/ |
H A D | version-min-load-command-object.yaml | 3 # RUN: ld64.lld -arch x86_64 %s -o %t -r %p/Inputs/no-version-min-load-command-object.yaml && llvm-… 5 # If we are emitting an object file, then we only emit a min version load command if the source obj… 6 # version(s) and either known platforms or contain min version load commands themselves.
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/dports/x11-wm/leftwm/leftwm-0.2.11/cargo-crates/futures-channel-0.3.18/tests/ |
H A D | channel.rs | 61 assert_eq!(DROPS.load(Ordering::SeqCst), 0); in drop_order() 63 assert_eq!(DROPS.load(Ordering::SeqCst), 1); in drop_order() 65 assert_eq!(DROPS.load(Ordering::SeqCst), 2); in drop_order()
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/dports/cad/horizon-eda/horizon-2.1.0/src/widgets/ |
H A D | layer_help_box.cpp | 41 load(pool.get_base_path()); in LayerHelpBox() 47 load(other_pool->base_path); in LayerHelpBox() 52 void LayerHelpBox::load(const std::string &pool_path) in load() function in horizon::LayerHelpBox
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/dports/databases/percona-pam-for-mysql/percona-server-5.6.51-91.0/mysql-test/suite/rpl/r/ |
H A D | rpl_slave_load_in.result | 8 load data infile '../../std_data/rpl_loaddata.dat' into table t1; 12 load data infile '../../std_data/rpl_loaddata.dat' into table t2; 13 load data infile '../../std_data/rpl_loaddata.dat' into table t2;
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Thumb2/ |
H A D | lsr-deficiency.ll | 13 %.pre = load i32, i32* @G, align 4 ; <i32> [#uses=1] 25 %1 = load i32*, i32** @array, align 4 ; <i32*> [#uses=1] 27 %2 = load i32, i32* %scevgep, align 4 ; <i32> [#uses=1]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/ |
H A D | 2008-06-13-NotVolatileLoadStore.ll | 3 ; These transforms are turned off for load volatiles and stores. 20 %l = load i32, i32* @ioport ; <i32> [#uses=1] 22 %l2 = load i32, i32* @ioport2 ; <i32> [#uses=1]
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H A D | win32-spill-xmm.ll | 13 %3 = load <16 x float>, <16 x float> * %1, align 64 29 %argp.cur = load i8*, i8** %ap, align 4 33 %2 = load i32, i32* %1, align 4
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H A D | load-combine-dbg.ll | 3 ; fold (zext (load x)) -> (zext (truncate (zextload x))) 4 ; rule propagates the SDLoc of the load to the zextload. 17 %3 = load i8, i8* %2, align 1, !dbg !100
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/dports/shells/nsh/nsh-0.4.2/cargo-crates/parking_lot_core-0.8.3/src/thread_parker/ |
H A D | wasm_atomic.rs | 70 self.parked.load(Ordering::Relaxed) == PARKED in timed_out() 75 while self.parked.load(Ordering::Acquire) == PARKED { in park() 85 while self.parked.load(Ordering::Acquire) == PARKED { in park_until()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/ |
H A D | select-addrRegRegOnly.ll | 14 %0 = load i32, i32* %arrayidx, align 4 31 %0 = load i32, i32* %arrayidx, align 4 33 %1 = load i32, i32* %arrayidx1, align 4
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H A D | zext-free.ll | 8 %.pre = load i8*, i8** %p, align 8 13 %1 = load i8, i8* %0, align 1 17 %2 = load i8, i8* %incdec.ptr, align 1
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/ARM/ |
H A D | 2012-06-12-SchedMemLatency.ll | 4 ; Make sure that mayalias store-load dependencies have one cycle 30 %0 = load volatile i32, i32* %p2, align 4 37 %0 = load i32, i32* %p2, align 4
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/ |
H A D | mem-ops-sub_01.ll | 10 %v0 = load i8, i8* @g0, align 1, !tbaa !4 23 %v0 = load i8, i8* @g0, align 1, !tbaa !4 29 %v4 = load i8, i8* @g0, align 1, !tbaa !4
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H A D | mem-ops-sub_i16_01.ll | 10 %v0 = load i16, i16* @g0, align 1, !tbaa !4 23 %v0 = load i16, i16* @g0, align 2, !tbaa !4 29 %v4 = load i16, i16* @g0, align 2, !tbaa !4
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H A D | mem-ops-sub.ll | 10 %v0 = load i8, i8* @g0, align 1, !tbaa !4 23 %v0 = load i8, i8* @g0, align 1, !tbaa !4 29 %v4 = load i8, i8* @g0, align 1, !tbaa !4
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H A D | stack-guard-acceptable-type.ll | 21 %v4 = load i8*, i8** %v2, align 4 23 %v6 = load i32, i32* %v0, align 4 25 %v8 = load i8, i8* %v7, align 1
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H A D | mem-ops-sub_i16.ll | 10 %v0 = load i16, i16* @g0, align 1, !tbaa !4 23 %v0 = load i16, i16* @g0, align 2, !tbaa !4 29 %v4 = load i16, i16* @g0, align 2, !tbaa !4
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Generic/ |
H A D | badFoldGEP.ll | 11 ;; (Modified to replace store with load and return load value.) 24 %reg820 = load i32, i32* %reg846 ; <i32> [#uses=1]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/LoopVectorize/SystemZ/ |
H A D | load-scalarization-cost-1.ll | 7 ; Check that a scalarized load does not get a zero cost in a vectorized 18 %ld = load i32, i32* %gep 27 ; CHECK: Found an estimated cost of 4 for VF 4 For instruction: %ld = load i32, i32* %gep
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