| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
[all …]
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
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| /dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/drivers/pci/ |
| H A D | fsl_pci_init.c | 94 u64 out_lo, u8 pcie_cap, in fsl_pci_setup_inbound_windows() argument
105 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
111 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
112 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
329 u64 out_hi = 0, out_lo = -1ULL; in fsl_pci_init() local
370 out_lo = min(start, out_lo); in fsl_pci_init()
376 debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); in fsl_pci_init()
384 (out_lo > 0x100000000ull)) in fsl_pci_init()
387 pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; in fsl_pci_init()
390 out_lo = min(out_lo, (u64)pcicsrbar); in fsl_pci_init()
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