Home
last modified time | relevance | path

Searched refs:ssse3 (Results 76 – 100 of 5428) sorted by relevance

12345678910>>...218

/dports/security/gnutls/gnutls-3.6.16/
H A Dcfg.mk143 lib/accelerated/x86/XXX/sha1-ssse3-x86.s \
144 lib/accelerated/x86/XXX/sha1-ssse3-x86_64.s \
145 lib/accelerated/x86/XXX/sha256-ssse3-x86.s \
146 lib/accelerated/x86/XXX/sha256-ssse3-x86_64.s \
147 lib/accelerated/x86/XXX/sha512-ssse3-x86.s \
150 lib/accelerated/x86/XXX/aes-ssse3-x86.s \
151 lib/accelerated/x86/XXX/aes-ssse3-x86_64.s
156 ghash-x86.pl sha1-ssse3-x86.pl sha256-ssse3-x86.pl \
157 sha512-ssse3-x86.pl
169 XXX/sha256-ssse3-x86.s XXX/sha512-ssse3-x86.s XXX/aes-ssse3-x86.s
[all …]
/dports/www/firefox/firefox-99.0/third_party/dav1d/src/x86/
H A Ditx_init_tmpl.c133 decl_itx_fns(ssse3);
216 assign_itx16_fn(, 4, 4, ssse3); in bitfn()
217 assign_itx16_fn(R, 4, 8, ssse3); in bitfn()
218 assign_itx16_fn(R, 8, 4, ssse3); in bitfn()
219 assign_itx16_fn(, 8, 8, ssse3); in bitfn()
220 assign_itx16_fn(R, 4, 16, ssse3); in bitfn()
221 assign_itx16_fn(R, 16, 4, ssse3); in bitfn()
222 assign_itx16_fn(R, 8, 16, ssse3); in bitfn()
223 assign_itx16_fn(R, 16, 8, ssse3); in bitfn()
224 assign_itx12_fn(, 16, 16, ssse3); in bitfn()
[all …]
H A Dcdef_init_tmpl.c39 decl_cdef_fns(ssse3);
44 decl_cdef_dir_fn(BF(dav1d_cdef_dir, ssse3));
59 c->dir = BF(dav1d_cdef_dir, ssse3); in bitfn()
60 c->fb[0] = BF(dav1d_cdef_filter_8x8, ssse3); in bitfn()
61 c->fb[1] = BF(dav1d_cdef_filter_4x8, ssse3); in bitfn()
62 c->fb[2] = BF(dav1d_cdef_filter_4x4, ssse3); in bitfn()
/dports/multimedia/dav1d/dav1d-99172b11470776177939c3d2bc366fe8d904eab7/src/x86/
H A Dcdef_init_tmpl.c39 decl_cdef_fns(ssse3);
44 decl_cdef_dir_fn(BF(dav1d_cdef_dir, ssse3));
59 c->dir = BF(dav1d_cdef_dir, ssse3); in bitfn()
60 c->fb[0] = BF(dav1d_cdef_filter_8x8, ssse3); in bitfn()
61 c->fb[1] = BF(dav1d_cdef_filter_4x8, ssse3); in bitfn()
62 c->fb[2] = BF(dav1d_cdef_filter_4x4, ssse3); in bitfn()
/dports/mail/thunderbird/thunderbird-91.8.0/third_party/dav1d/src/x86/
H A Dcdef_init_tmpl.c39 decl_cdef_fns(ssse3);
44 decl_cdef_dir_fn(BF(dav1d_cdef_dir, ssse3));
59 c->dir = BF(dav1d_cdef_dir, ssse3); in bitfn()
61 c->fb[0] = BF(dav1d_cdef_filter_8x8, ssse3); in bitfn()
62 c->fb[1] = BF(dav1d_cdef_filter_4x8, ssse3); in bitfn()
63 c->fb[2] = BF(dav1d_cdef_filter_4x4, ssse3); in bitfn()
/dports/www/firefox-esr/firefox-91.8.0/third_party/dav1d/src/x86/
H A Dcdef_init_tmpl.c39 decl_cdef_fns(ssse3);
44 decl_cdef_dir_fn(BF(dav1d_cdef_dir, ssse3));
59 c->dir = BF(dav1d_cdef_dir, ssse3); in bitfn()
61 c->fb[0] = BF(dav1d_cdef_filter_8x8, ssse3); in bitfn()
62 c->fb[1] = BF(dav1d_cdef_filter_4x8, ssse3); in bitfn()
63 c->fb[2] = BF(dav1d_cdef_filter_4x4, ssse3); in bitfn()
/dports/multimedia/handbrake/dav1d-0.9.0/src/x86/
H A Dcdef_init_tmpl.c39 decl_cdef_fns(ssse3);
44 decl_cdef_dir_fn(BF(dav1d_cdef_dir, ssse3));
59 c->dir = BF(dav1d_cdef_dir, ssse3); in bitfn()
61 c->fb[0] = BF(dav1d_cdef_filter_8x8, ssse3); in bitfn()
62 c->fb[1] = BF(dav1d_cdef_filter_4x8, ssse3); in bitfn()
63 c->fb[2] = BF(dav1d_cdef_filter_4x4, ssse3); in bitfn()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/crypto/
H A DMakefile46 chacha-x86_64-y := chacha-avx2-x86_64.o chacha-ssse3-x86_64.o chacha_glue.o
53 obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
54 sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ssse3_glue.o
55 sha1-ssse3-$(CONFIG_AS_SHA1_NI) += sha1_ni_asm.o
57 obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
58 sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o
59 sha256-ssse3-$(CONFIG_AS_SHA256_NI) += sha256_ni_asm.o
61 obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
62 sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/crypto/
H A DMakefile46 chacha-x86_64-y := chacha-avx2-x86_64.o chacha-ssse3-x86_64.o chacha_glue.o
53 obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
54 sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ssse3_glue.o
55 sha1-ssse3-$(CONFIG_AS_SHA1_NI) += sha1_ni_asm.o
57 obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
58 sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o
59 sha256-ssse3-$(CONFIG_AS_SHA256_NI) += sha256_ni_asm.o
61 obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
62 sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
/dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/crypto/
H A DMakefile46 chacha-x86_64-y := chacha-avx2-x86_64.o chacha-ssse3-x86_64.o chacha_glue.o
53 obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
54 sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ssse3_glue.o
55 sha1-ssse3-$(CONFIG_AS_SHA1_NI) += sha1_ni_asm.o
57 obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
58 sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o
59 sha256-ssse3-$(CONFIG_AS_SHA256_NI) += sha256_ni_asm.o
61 obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
62 sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
/dports/www/firefox-legacy/firefox-52.8.0esr/media/ffvpx/libavcodec/x86/
H A Dvp9dsp_init_16bpp.c57 decl_ipred_fns(type, 16, ssse3, ssse3); \
112 init_ipred_funcs(dl, DIAG_DOWN_LEFT, 16, ssse3); in ff_vp9dsp_init_16bpp_x86()
113 init_ipred_funcs(dr, DIAG_DOWN_RIGHT, 16, ssse3); in ff_vp9dsp_init_16bpp_x86()
114 init_ipred_funcs(vl, VERT_LEFT, 16, ssse3); in ff_vp9dsp_init_16bpp_x86()
115 init_ipred_funcs(vr, VERT_RIGHT, 16, ssse3); in ff_vp9dsp_init_16bpp_x86()
116 init_ipred_funcs(hu, HOR_UP, 16, ssse3); in ff_vp9dsp_init_16bpp_x86()
117 init_ipred_funcs(hd, HOR_DOWN, 16, ssse3); in ff_vp9dsp_init_16bpp_x86()
/dports/audio/aften/aften-0.0.8/libaften/x86/
H A Dx86_cpu_caps.c111 x86cpu_caps_compile.ssse3 = 1; in cpu_caps_detect()
136 x86cpu_caps_detect.ssse3 = (caps2 >> SSSE3_BIT) & 1; in cpu_caps_detect()
153 x86cpu_caps_use.ssse3 = x86cpu_caps_detect.ssse3 & x86cpu_caps_compile.ssse3; in cpu_caps_detect()
165 x86cpu_caps_use.ssse3 &= simd_instructions->ssse3; in apply_simd_restrictions()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll24 %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
27 declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
45 %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
48 declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
69 declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
85 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
101 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
117 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
149 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll22 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
38 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
54 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
70 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
102 declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
123 declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
213 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
229 declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
245 declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll22 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
38 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
54 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
70 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
102 declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
123 declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
213 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
229 declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
245 declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll22 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
38 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
54 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
70 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
102 declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
123 declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
213 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
229 declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
245 declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll22 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
38 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
54 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
70 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
102 declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
123 declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
213 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
229 declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
245 declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll22 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
38 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
54 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
70 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
102 declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
123 declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
213 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
229 declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
245 declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dssse3-intrinsics-x86.ll22 declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
38 declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
54 declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
70 declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
86 declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
102 declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
123 declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
213 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
229 declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
245 declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
[all …]

12345678910>>...218