/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fshr.ll | 35 ; GFX6-NEXT: v_or_b32_e32 v0, v1, v0 66 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 97 ; GFX9-NEXT: v_or_b32_e32 v0, v1, v0 128 ; GFX10-NEXT: v_or_b32_e32 v0, v1, v0 164 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 195 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 226 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 326 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 338 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 350 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 [all …]
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H A D | fshl.ll | 35 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 67 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 99 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 131 ; GFX10-NEXT: v_or_b32_e32 v0, v0, v1 167 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 198 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 229 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 329 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 342 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 355 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | or.ll | 10 ; SI: v_or_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 11 ; SI: v_or_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 27 ; SI: v_or_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 28 ; SI: v_or_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 29 ; SI: v_or_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 49 ; SI: v_or_b32_e32 v{{[0-9]}} 164 ; SI: v_or_b32_e32 v{{[0-9]}} 165 ; SI: v_or_b32_e32 v{{[0-9]}} 175 ; SI: v_or_b32_e32 v{{[0-9]}} 176 ; SI: v_or_b32_e32 v{{[0-9]}} [all …]
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H A D | load-local.96.ll | 93 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 95 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v5 97 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 106 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v6 109 ; GFX7-NEXT: v_or_b32_e32 v7, v7, v8 113 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 114 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v7 116 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 118 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v0 143 ; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 [all …]
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H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fshl.ll | 35 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 67 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 99 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 131 ; GFX10-NEXT: v_or_b32_e32 v0, v0, v1 167 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 198 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 229 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 329 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 342 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 355 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fshl.ll | 35 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 67 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 99 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 131 ; GFX10-NEXT: v_or_b32_e32 v0, v0, v1 167 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 198 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 229 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 329 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 342 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 355 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fshl.ll | 35 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 67 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 99 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 131 ; GFX10-NEXT: v_or_b32_e32 v0, v0, v1 167 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 198 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 229 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 329 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 342 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 355 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fshl.ll | 35 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 67 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 99 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 131 ; GFX10-NEXT: v_or_b32_e32 v0, v0, v1 167 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 198 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 229 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 329 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 342 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 355 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | load-local.96.ll | 93 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 95 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v5 97 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 106 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v6 110 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 113 ; GFX7-NEXT: v_or_b32_e32 v7, v7, v8 115 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v7 117 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 119 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v0 144 ; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 [all …]
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H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | load-local.96.ll | 93 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 95 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v5 97 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 106 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v6 110 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 113 ; GFX7-NEXT: v_or_b32_e32 v7, v7, v8 115 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v7 117 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 119 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v0 144 ; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 [all …]
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H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | load-local.96.ll | 93 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 95 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v5 97 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 106 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v6 110 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 113 ; GFX7-NEXT: v_or_b32_e32 v7, v7, v8 115 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v7 117 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 119 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v0 144 ; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 [all …]
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H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | load-local.96.ll | 93 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 95 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v5 97 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 106 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v6 110 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 113 ; GFX7-NEXT: v_or_b32_e32 v7, v7, v8 115 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v7 117 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 119 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v0 144 ; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fneg-fabs.f64.ll | 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 61 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 74 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 86 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
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