Home
last modified time | relevance | path

Searched refs:write_c0_watchlo2 (Results 1 – 25 of 76) sorted by relevance

1234

/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/kernel/
H A Dwatch.c32 write_c0_watchlo2(watches->watchlo[2]); in mips_install_watch_registers()
108 write_c0_watchlo2(0); in mips_clear_watch_registers()
162 write_c0_watchlo2(MIPS_WATCHLO_IRW); in mips_probe_watch_registers()
165 write_c0_watchlo2(0); in mips_probe_watch_registers()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/kernel/
H A Dwatch.c32 write_c0_watchlo2(watches->watchlo[2]); in mips_install_watch_registers()
108 write_c0_watchlo2(0); in mips_clear_watch_registers()
162 write_c0_watchlo2(MIPS_WATCHLO_IRW); in mips_probe_watch_registers()
165 write_c0_watchlo2(0); in mips_probe_watch_registers()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/kernel/
H A Dwatch.c32 write_c0_watchlo2(watches->watchlo[2]); in mips_install_watch_registers()
108 write_c0_watchlo2(0); in mips_clear_watch_registers()
162 write_c0_watchlo2(MIPS_WATCHLO_IRW); in mips_probe_watch_registers()
165 write_c0_watchlo2(0); in mips_probe_watch_registers()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/mips/include/asm/
H A Dmipsregs.h860 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dmipsregs.h854 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/mips/include/asm/
H A Dmipsregs.h1212 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/mips/include/asm/
H A Dmipsregs.h1212 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/mips/include/asm/
H A Dmipsregs.h1212 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/mips/include/asm/
H A Dmipsregs.h1212 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-tools/u-boot-2020.07/arch/mips/include/asm/
H A Dmipsregs.h1213 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/mips/include/asm/
H A Dmipsregs.h1212 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h1687 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) macro

1234