| /minix/external/bsd/llvm/dist/llvm/test/MC/Disassembler/AArch64/ |
| H A D | basic-a64-instructions.txt | 81 # CHECK: add w3, w5, w7
135 # CHECK: adds w3, w5, w7
189 # CHECK: sub w3, w5, w7
243 # CHECK: subs w3, w5, w7
300 # CHECK: cmn w6, w7
350 # CHECK: cmp w6, w7
1016 # CHECK: rbit w0, w7
1044 # CHECK: crc32b w5, w7, w20
1061 # CHECK: udiv w0, w7, w10
1086 # CHECK: lsl w6, w7, w8
[all …]
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| /minix/external/bsd/llvm/dist/clang/test/CodeGenObjC/ |
| H A D | arc-captured-block-var-layout.m | 362 __weak id w5, w6, w7, w8;
391 x(w7);
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| /minix/external/bsd/llvm/dist/llvm/test/MC/Mips/msa/ |
| H A D | test_3rf.s | 18 # CHECK: fcueq.d $w29, $w3, $w7 # encoding: [0x78,0xe7,0x1f,0x5a]
101 fcueq.d $w29, $w3, $w7
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| /minix/external/bsd/llvm/dist/llvm/test/MC/AArch64/ |
| H A D | arm64-leaf-compact-unwind.s | 150 sub w8, w8, w7, lsl #1
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| H A D | arm64-aliases.s | 19 mov w7, wsp
20 ; CHECK: mov w7, wsp
45 tst w3, w7, lsl #31
54 ; CHECK: tst w3, w7, lsl #31 ; encoding: [0x7f,0x7c,0x07,0x6a]
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| H A D | arm64-advsimd.s | 99 dup v5.4h, w7
115 ; CHECK: dup.4h v5, w7 ; encoding: [0xe5,0x0c,0x02,0x0e]
256 mov.h v4[1], w7
276 ; CHECK: ins.h v4[1], w7 ; encoding: [0xe4,0x1c,0x06,0x4e]
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| H A D | arm64-arithmetic-encoding.s | 587 ; CHECK: csel w16, w7, w27, eq ; encoding: [0xf0,0x00,0x9b,0x1a]
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| /minix/external/bsd/llvm/dist/clang/lib/Headers/ |
| H A D | emmintrin.h | 1105 _mm_set_epi16(short w7, short w6, short w5, short w4, short w3, short w2, short w1, short w0) in _mm_set_epi16() argument
1107 return (__m128i)(__v8hi){ w0, w1, w2, w3, w4, w5, w6, w7 }; in _mm_set_epi16()
1159 _mm_setr_epi16(short w0, short w1, short w2, short w3, short w4, short w5, short w6, short w7) in _mm_setr_epi16() argument
1161 return (__m128i)(__v8hi){ w0, w1, w2, w3, w4, w5, w6, w7 }; in _mm_setr_epi16()
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| /minix/external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/msa/ |
| H A D | test_3rf.txt | 18 0x78 0xe7 0x1f 0x5a # CHECK: fcueq.d $w29, $w3, $w7
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 58 def W7 : AArch64Reg<7, "w7" >, DwarfRegNum<[7]>;
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