/netbsd/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 1001 Instruction *Inst, in emitLeadingFence() argument 1014 if (!Inst->hasAtomicStore()) in emitLeadingFence() 1022 Instruction *Inst, in emitTrailingFence() argument
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H A D | VEInstrVec.td | 770 let Inst{54-48} = sx; 776 let Inst{54-48} = sx; 781 let Inst{54-48} = sx;
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/netbsd/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/RuntimeDyld/ |
H A D | RuntimeDyldELF.cpp | 869 uint32_t Inst = readBytesUnaligned(LocalAddress, 4); in resolvePPC64Relocation() local 870 writeInt32BE(LocalAddress, (Inst & 0xFC000003) | (delta & 0x03FFFFFC)); in resolvePPC64Relocation()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetTransformInfo.cpp | 69 Instruction *Inst) { in getIntImmCostInst() argument
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 809 bool fallBackToDAGISel(const Instruction &Inst) const override;
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H A D | AArch64InstrInfo.td | 809 let Inst{12} = 0; 815 let Inst{9-8} = 0b10; 828 let Inst{7-5} = op2; 1221 let Inst{31} = 0; 1239 let Inst{18-16} = 0b000; 1240 let Inst{11-8} = 0b0000; 1242 let Inst{7-5} = 0b001; 1249 let Inst{7-5} = 0b010; 1789 let Inst{31} = 1; 1792 let Inst{31} = 1; [all …]
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/netbsd/external/historical/nawk/dist/testdir/ |
H A D | funstack.in | 590 corpsource = "Georgia Inst. Technol., Atlanta, GA, USA", 1709 corpsource = "Indian Inst. Technol., Kanpur, India", 3739 corpsource = "Nat. Inst. Health, Bethesda, MD, USA", 3782 corpsource = "Nat. Inst. Health, Bethesda, MD, USA", 7657 corpsource = "American Inst. Phys., NY, USA", 11952 corpsource = "Nat. Inst. Health, Bethesda, MD, USA", 12010 corpsource = "Weizmann Inst. Sci., Rehovot, Israel", 12477 corpsource = "Nat. Inst. Health, Bethesda, MD, USA", 13009 corpsource = "Weizmann Inst. Sci., Rehovot, Israel", 13132 corpsource = "Nat. Inst. Health, Bethesda, MD, USA", [all …]
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/netbsd/external/apache2/llvm/dist/clang/lib/CodeGen/ |
H A D | CodeGenModule.h | 791 void DecorateInstructionWithTBAA(llvm::Instruction *Inst,
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H A D | CGObjC.cpp | 2233 llvm::CallBase *Inst = CGF.EmitCallOrInvoke(fn, value); in emitObjCValueOperation() local 2238 if (auto *Call = dyn_cast<llvm::CallInst>(Inst)) in emitObjCValueOperation() 2242 return CGF.Builder.CreateBitCast(Inst, origType); in emitObjCValueOperation()
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H A D | CodeGenFunction.h | 1205 llvm::Instruction *Inst; 1209 PeepholeProtection() : Inst(nullptr) {} 4733 void AddObjCARCExceptionMetadata(llvm::Instruction *Inst);
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FastISel.cpp | 2173 if (const auto *Inst = dyn_cast<Instruction>(PHIOp)) in handlePHINodesInSuccessorBlocks() local 2174 DbgLoc = Inst->getDebugLoc(); in handlePHINodesInSuccessorBlocks()
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H A D | DAGCombiner.cpp | 15795 EVT TruncType = LS.Inst->getValueType(0); in Cost() 15859 SDNode *Inst; member 15873 : Inst(Inst), Origin(Origin), Shift(Shift), DAG(DAG) {} in LoadedSlice() 15888 APInt UsedBits(Inst->getValueSizeInBits(0), 0); in getUsedBits() 15922 if (!Origin || !Inst || !DAG) in isLegal() 15955 EVT TruncateType = Inst->getValueType(0); in isLegal() 16015 EVT FinalType = Inst->getValueType(0); in loadSlice() 16027 if (!Inst || !Inst->hasOneUse()) in canMergeExpensiveCrossRegisterBankCopy() 16029 SDNode *Use = *Inst->use_begin(); in canMergeExpensiveCrossRegisterBankCopy() 16064 if (Inst->getValueType(0) != getLoadedType()) in canMergeExpensiveCrossRegisterBankCopy() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/tools/llvm-objdump/ |
H A D | MachODump.cpp | 7598 MCInst Inst; in DisassembleMachO() local 7628 gotInst = ThumbDisAsm->getInstruction(Inst, Size, Bytes.slice(Index), in DisassembleMachO() 7631 gotInst = DisAsm->getInstruction(Inst, Size, Bytes.slice(Index), PC, in DisassembleMachO() 7640 ThumbIP->printInst(&Inst, PC, AnnotationsStr, *ThumbSTI, in DisassembleMachO() 7643 IP->printInst(&Inst, PC, AnnotationsStr, *STI, FormattedOS); in DisassembleMachO() 7693 MCInst Inst; in DisassembleMachO() local 7702 if (DisAsm->getInstruction(Inst, InstSize, Bytes.slice(Index), PC, in DisassembleMachO() 7719 IP->printInst(&Inst, PC, AnnotationsStr, *STI, outs()); in DisassembleMachO()
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/netbsd/external/apache2/llvm/dist/llvm/utils/TableGen/ |
H A D | GlobalISelEmitter.cpp | 5000 auto &Inst = Target.getInstruction(OpRec); in inferRegClassFromPattern() local 5001 if (Inst.Operands.NumDefs > 1) in inferRegClassFromPattern() 5006 StringRef InstName = Inst.TheDef->getName(); in inferRegClassFromPattern() 5030 const auto &DstIOperand = Inst.Operands[0]; in inferRegClassFromPattern()
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/netbsd/external/apache2/llvm/dist/clang/include/clang/Basic/ |
H A D | arm_sve.td | 19 // Every intrinsic subclasses "Inst". An intrinsic has a name, a prototype and 32 // The string given to an Inst class is a sequence of typespecs. The intrinsic 236 class Inst<string n, string p, string t, MergeType mt, string i, 253 : Inst<n, p, t, mt, i, ft, ch, MemEltTyDefault> { 259 : Inst<n, p, t, MergeNone, i, f, [], met> {
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/netbsd/sys/arch/m68k/fpsp/ |
H A D | util.sa | 162 * Inst is either fsgldiv or fsglmul. Force extended precision.
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
H A D | ScalarEvolution.h | 1052 const SCEV *getElementSize(Instruction *Inst);
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/netbsd/sys/dev/mca/ |
H A D | mcadevs | 103 product 0x5333 "National Inst. MC-GPIB IEEE-488 Adapter" [6]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 2107 Instruction *Inst = &*--I; in findInitTrampolineFromBB() local 2112 if (Inst->mayWriteToMemory()) in findInitTrampolineFromBB()
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H A D | InstCombineAndOrXor.cpp | 2106 for (auto *Inst : Insts) in matchBSwapOrBitReverse() local 2107 Worklist.push(Inst); in matchBSwapOrBitReverse()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoV.td | 312 let Inst{11-7} = vd; 321 let Inst{11-7} = vs3;
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H A D | RISCVISelLowering.cpp | 8268 Instruction *Inst, in emitLeadingFence() argument 8270 if (isa<LoadInst>(Inst) && Ord == AtomicOrdering::SequentiallyConsistent) in emitLeadingFence() 8272 if (isa<StoreInst>(Inst) && isReleaseOrStronger(Ord)) in emitLeadingFence() 8278 Instruction *Inst, in emitTrailingFence() argument 8280 if (isa<LoadInst>(Inst) && isAcquireOrStronger(Ord)) in emitTrailingFence()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinter.cpp | 242 void AsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) { in EmitToStreamer() argument 243 S.emitInstruction(Inst, getSubtargetInfo()); in EmitToStreamer()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | MachinePipeliner.cpp | 996 unsigned minFuncUnits(const MachineInstr *Inst, in minFuncUnits() 998 unsigned SchedClass = Inst->getDesc().getSchedClass(); in minFuncUnits()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcInstrInfo.td | 930 let Inst{29-0} = disp; 1370 let Inst{29-0} = disp;
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