1 //===-- AMDGPURegisterInfo.h - AMDGPURegisterInfo Interface -*- C++ -*-----===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief TargetRegisterInfo interface that is implemented by all hw codegen
12 /// targets.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_R600_AMDGPUREGISTERINFO_H
17 #define LLVM_LIB_TARGET_R600_AMDGPUREGISTERINFO_H
18 
19 #include "llvm/ADT/BitVector.h"
20 #include "llvm/Target/TargetRegisterInfo.h"
21 
22 #define GET_REGINFO_HEADER
23 #define GET_REGINFO_ENUM
24 #include "AMDGPUGenRegisterInfo.inc"
25 
26 namespace llvm {
27 
28 class AMDGPUSubtarget;
29 class TargetInstrInfo;
30 
31 struct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo {
32   static const MCPhysReg CalleeSavedReg;
33   const AMDGPUSubtarget &ST;
34 
35   AMDGPURegisterInfo(const AMDGPUSubtarget &st);
36 
getReservedRegsAMDGPURegisterInfo37   BitVector getReservedRegs(const MachineFunction &MF) const override {
38     assert(!"Unimplemented");  return BitVector();
39   }
40 
getCFGStructurizerRegClassAMDGPURegisterInfo41   virtual const TargetRegisterClass* getCFGStructurizerRegClass(MVT VT) const {
42     assert(!"Unimplemented"); return nullptr;
43   }
44 
getHWRegIndexAMDGPURegisterInfo45   virtual unsigned getHWRegIndex(unsigned Reg) const {
46     assert(!"Unimplemented"); return 0;
47   }
48 
49   /// \returns the sub reg enum value for the given \p Channel
50   /// (e.g. getSubRegFromChannel(0) -> AMDGPU::sub0)
51   unsigned getSubRegFromChannel(unsigned Channel) const;
52 
53   const MCPhysReg* getCalleeSavedRegs(const MachineFunction *MF) const override;
54   void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
55                            unsigned FIOperandNum,
56                            RegScavenger *RS) const override;
57   unsigned getFrameRegister(const MachineFunction &MF) const override;
58 
59   unsigned getIndirectSubReg(unsigned IndirectIndex) const;
60 
61 };
62 
63 } // End namespace llvm
64 
65 #endif
66