1 /* ds8mch.c */
2
3 /*
4 * Copyright (C) 1998-2009 Alan R. Baldwin
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 *
19 *
20 * Alan R. Baldwin
21 * 721 Berkeley St.
22 * Kent, Ohio 44240
23 *
24 * This Assember Ported by
25 * jhartman at compuserve dot com
26 * noice at noicedebugger dot com
27 *
28 * Modified from i51pst.c
29 * Bill McKinnon
30 * w_mckinnon at conknet dot com
31 *
32 */
33
34 #include "asxxxx.h"
35 #include "ds8.h"
36
37 char *cpu = "Dallas Semiconductor [User Defined]";
38 char *dsft = "asm";
39
40 static int amode;
41 static char buff[80];
42 static int ds8_bytes;
43 static int mchtyp;
44
45 /*
46 * Opcode Cycle Definitions
47 */
48 #define OPCY_SDP ((char) (0xFF))
49 #define OPCY_ERR ((char) (0xFE))
50
51 /* OPCY_NONE ((char) (0x80)) */
52 /* OPCY_MASK ((char) (0x7F)) */
53
54 #define OPCY_CPU ((char) (0xFD))
55 #define OPCY_AMODE ((char) (0xFC))
56 #define OPCY_BITS ((char) (0xFB))
57
58
59 #define UN ((char) (OPCY_NONE | 0x00))
60
61 /*
62 * ds8xcxxx Cycle Count
63 *
64 * opcycles = ds8pg1[opcode]
65 */
66 static char ds8pg1[256] = {
67 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
68 /*--*--* - - - - - - - - - - - - - - - - */
69 /*00*/ 4,12,16, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
70 /*10*/ 12,12,16, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
71 /*20*/ 12,12,16, 4, 8, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
72 /*30*/ 12,12,16, 4, 8, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
73 /*40*/ 12,12, 8,12, 8, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
74 /*50*/ 12,12, 8,12, 8, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
75 /*60*/ 12,12, 8,12, 8, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
76 /*70*/ 12,12, 8,12, 8,12, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
77 /*80*/ 12,12, 8,12,20,12, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
78 /*90*/ 12,12, 8,12, 8, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
79 /*A0*/ 8,12, 8,12,20,UN, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
80 /*B0*/ 8,12, 8, 4,16,16,16,16,16,16,16,16,16,16,16,16,
81 /*C0*/ 8,12, 8, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
82 /*D0*/ 8,12, 8, 4, 4,16, 4, 4,12,12,12,12,12,12,12,12,
83 /*E0*/ 8,12, 8, 8, 4, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
84 /*F0*/ 8,12, 8, 8, 4, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4
85 };
86
87 /*
88 * Process machine ops.
89 */
90 VOID
machine(struct mne * mp)91 machine(struct mne *mp)
92 {
93 char *p, *str;
94 char pid[NINPUT], id[NINPUT];
95 int c, d, t, t1, v1;
96 a_uint op;
97 struct sym *sp;
98 struct expr e, e1, e2;
99
100 clrexpr(&e);
101 clrexpr(&e1);
102 clrexpr(&e2);
103
104 op = mp->m_valu;
105 switch (mp->m_type) {
106
107 case S_CPU:
108 opcycles = OPCY_CPU;
109 lmode = SLIST;
110 switch(op) {
111 default: op = DS8XCXXX;
112 case DS8XCXXX: v1 = 2; str = "DS8XCXXX"; sym[2].s_addr = X_DS8XCXXX; break;
113 case DS80C310: v1 = 2; str = "DS80C310"; sym[2].s_addr = X_DS80C310; break;
114 case DS80C320: v1 = 2; str = "DS80C320"; sym[2].s_addr = X_DS80C320; break;
115 case DS80C323: v1 = 2; str = "DS80C323"; sym[2].s_addr = X_DS80C323; break;
116 case DS80C390: v1 = 3; str = "DS80C390"; sym[2].s_addr = X_DS80C390; break;
117 case DS83C520: v1 = 2; str = "DS83C520"; sym[2].s_addr = X_DS83C520; break;
118 case DS83C530: v1 = 2; str = "DS83C530"; sym[2].s_addr = X_DS83C530; break;
119 case DS83C550: v1 = 2; str = "DS83C550"; sym[2].s_addr = X_DS83C550; break;
120 case DS87C520: v1 = 2; str = "DS87C520"; sym[2].s_addr = X_DS87C520; break;
121 case DS87C530: v1 = 2; str = "DS87C530"; sym[2].s_addr = X_DS87C530; break;
122 case DS87C550: v1 = 2; str = "DS87C550"; sym[2].s_addr = X_DS87C550; break;
123 case DS______: v1 = 2; str = "DS______"; sym[2].s_addr = X_DS______;
124 if (more()) {
125 str = p = pid;
126 d = getnb();
127 while ((c = get()) != d) {
128 if (c == '\0') {
129 qerr();
130 }
131 if (p < &pid[sizeof(pid)-3]) {
132 *p++ = c;
133 } else {
134 break;
135 }
136 }
137 *p = 0;
138 }
139 break;
140 }
141 if (op != 0) {
142 ds8_bytes = v1;
143 exprmasks(v1);
144 }
145 mchtyp = (int) op;
146
147 sprintf(id, "__%s", str);
148 sp = lookup(id);
149 if (sp->s_type != S_NEW && (sp->s_flag & S_ASG) == 0) {
150 err('m');
151 }
152 sp->s_type = S_USER;
153 sp->s_addr = 1;
154 sp->s_flag |= S_ASG;
155
156 sprintf(buff, "%s %s", DS_CPU, str);
157 cpu = buff;
158
159 sp = lookup("__SFR_BITS");
160 if (sp->s_type != S_NEW && (sp->s_flag & S_ASG) == 0) {
161 err('m');
162 }
163 sp->s_type = S_USER;
164 sp->s_flag |= S_ASG;
165
166 if (more()) {
167 expr(&e, 0);
168 abscheck(&e);
169 sp->s_addr = e.e_addr;
170 } else {
171 sp->s_addr = 1;
172 }
173 break;
174
175 case S_AMODE:
176 opcycles = OPCY_AMODE;
177 if ((mchtyp != 0) && (mchtyp != DS80C390)) {
178 err('o');
179 break;
180 } else
181 if ((mchtyp == 0) && ((a_bytes < 2) || (a_bytes > 3))) {
182 err('o');
183 break;
184 }
185 expr(&e, 0);
186 abscheck(&e);
187 amode = (int) e.e_addr;
188 if ((amode < 0) || (amode > 2)) {
189 amode = 0;
190 err('o');
191 }
192 if ((c = getnb()) == ',') {
193 expr(&e1, 0);
194 abscheck(&e1);
195 if (e1.e_addr != 0) {
196 /* mov ta,#0aah */ outab(0x075); outab(0x0C7); outab(0x0AA);
197 /* mov ta,#055h */ outab(0x075); outab(0x0C7); outab(0x055);
198 /* mov acon,#amode */ outab(0x075); outab(0x09D); outab(amode);
199 } else {
200 lmode = SLIST;
201 }
202 } else {
203 unget(c);
204 lmode = SLIST;
205 }
206 break;
207
208 case S_BITS:
209 if (ds8_bytes == 0) {
210 ds8_bytes = (int) op;
211 exprmasks(ds8_bytes);
212 } else
213 if (ds8_bytes != (int) op) {
214 err('m');
215 }
216 opcycles = OPCY_BITS;
217 lmode = SLIST;
218 break;
219
220 case S_INH:
221 outab(op);
222 break;
223
224 case S_JMP11:
225 expr(&e, 0);
226 if (amode == 2) {
227 outr3bm(&e, R_J19, op);
228 } else {
229 outrwm(&e, R_J11, op);
230 }
231 break;
232
233 case S_JMP16:
234 expr(&e, 0);
235 outab(op);
236 if (amode == 2) {
237 outr3b(&e, R_NORM);
238 } else {
239 outrw(&e, R_NORM);
240 }
241 break;
242
243 case S_ACC:
244 t = addr(&e);
245 if (t != S_A)
246 aerr();
247 outab(op);
248 break;
249
250 case S_TYP1:
251 /* A, direct, @R0, @R1, R0 to R7. "INC" also allows DPTR */
252 t = addr(&e);
253
254 switch (t) {
255 case S_A:
256 outab(op + 4);
257 break;
258
259 case S_DIR:
260 case S_EXT:
261 /* Direct is also legal */
262 outab(op + 5);
263 outrb(&e, R_PAG0);
264 break;
265
266 case S_AT_R:
267 outab(op + 6 + e.e_addr);
268 break;
269
270 case S_REG:
271 outab(op + 8 + e.e_addr);
272 break;
273
274 case S_DPTR:
275 if (op != 0)
276 /* only INC (op=0) has DPTR mode */
277 aerr();
278 else
279 outab( 0xA3);
280 break;
281
282 default:
283 aerr();
284 }
285 break;
286
287 case S_TYP2:
288 /* A,#imm; A,direct; A,@R0; A,@R1; A,R0 to A,R7 */
289 t = addr(&e);
290 if (t != S_A)
291 aerr();
292 comma(1);
293 t1 = addr(&e1);
294
295 switch (t1) {
296 case S_IMMED:
297 outab(op + 4);
298 outrb(&e1, R_NORM);
299 break;
300
301 case S_DIR:
302 case S_EXT:
303 outab(op + 5);
304 outrb(&e1, R_PAG0);
305 break;
306
307 case S_AT_R:
308 outab(op + 6 + e1.e_addr);
309 break;
310
311 case S_REG:
312 outab(op + 8 + (e1.e_addr));
313 break;
314
315 default:
316 aerr();
317 }
318 break;
319
320 case S_TYP3:
321 /* dir,A; dir,#imm;
322 * A,#imm; A,direct; A,@R0; A,@R1; A,R0 to A,R7
323 * C,direct; C,/direct
324 */
325 t = addr(&e);
326 comma(1);
327 t1 = addr(&e1);
328
329 switch (t) {
330 case S_DIR:
331 case S_EXT:
332 switch (t1) {
333 case S_A:
334 outab(op + 2);
335 outrb(&e, R_PAG0);
336 break;
337
338 case S_IMMED:
339 outab(op + 3);
340 outrb(&e, R_PAG0);
341 outrb(&e1, R_NORM);
342 break;
343
344 default:
345 aerr();
346 }
347 break;
348
349 case S_A:
350 switch (t1) {
351 case S_IMMED:
352 outab(op + 4);
353 outrb(&e1, R_NORM);
354 break;
355
356 case S_DIR:
357 case S_EXT:
358 outab(op + 5);
359 outrb(&e1, R_PAG0);
360 break;
361
362 case S_AT_R:
363 outab(op + 6 + e1.e_addr);
364 break;
365
366 case S_REG:
367 outab(op + 8 + e1.e_addr);
368 break;
369
370 default:
371 aerr();
372 }
373 break;
374
375 case S_C:
376 /* XRL has no boolean version. Trap it */
377 if (op == 0x60)
378 aerr();
379
380 switch (t1) {
381 case S_DIR:
382 case S_EXT:
383 outab(op + 0x32);
384 outrb(&e1, R_PAG0);
385 break;
386
387 case S_NOT_BIT:
388 outab(op + 0x60);
389 outrb(&e1, R_PAG0);
390 break;
391
392 default:
393 aerr();
394 }
395 break;
396
397 default:
398 aerr();
399 }
400 break;
401
402 case S_TYP4:
403 /* A,direct; A,@R0; A,@R1; A,R0 to A,R7 */
404 t = addr(&e);
405 if (t != S_A)
406 aerr();
407 comma(1);
408 t1 = addr(&e1);
409
410 switch (t1) {
411 case S_DIR:
412 case S_EXT:
413 outab(op + 5);
414 outrb(&e1, R_PAG0);
415 break;
416
417 case S_AT_R:
418 outab(op + 6 + e1.e_addr);
419 break;
420
421 case S_REG:
422 outab(op + 8 + e1.e_addr);
423 break;
424
425 default:
426 aerr();
427 }
428 break;
429
430 /* MOV instruction, all modes */
431 case S_MOV:
432 t = addr(&e);
433 comma(1);
434 t1 = addr(&e1);
435
436 switch (t) {
437 case S_A:
438 switch (t1) {
439 case S_IMMED:
440 outab(0x74);
441 outrb(&e1, R_NORM);
442 break;
443
444 case S_DIR:
445 case S_EXT:
446 outab(0xE5);
447 outrb(&e1, R_PAG0);
448 break;
449
450 case S_AT_R:
451 outab(0xE6 + e1.e_addr);
452 break;
453
454 case S_REG:
455 outab(0xE8 + e1.e_addr);
456 break;
457
458 default:
459 aerr();
460 }
461 break;
462
463 case S_REG:
464 switch (t1) {
465 case S_A:
466 outab(0xF8 + e.e_addr);
467 break;
468
469 case S_IMMED:
470 outab(0x78 + e.e_addr);
471 outrb(&e1, R_NORM);
472 break;
473
474 case S_DIR:
475 case S_EXT:
476 outab(0xA8 + e.e_addr);
477 outrb(&e1, R_PAG0);
478 break;
479
480 default:
481 aerr();
482 }
483 break;
484
485 case S_DIR:
486 case S_EXT:
487 switch (t1) {
488 case S_A:
489 outab(0xF5);
490 outrb(&e, R_PAG0);
491 break;
492
493 case S_IMMED:
494 outab(0x75);
495 outrb(&e, R_PAG0);
496 outrb(&e1, R_NORM);
497 break;
498
499 case S_DIR:
500 case S_EXT:
501 outab(0x85);
502 outrb(&e1, R_PAG0);
503 outrb(&e, R_PAG0);
504 break;
505
506 case S_AT_R:
507 outab(0x86 + e1.e_addr);
508 outrb(&e, R_PAG0);
509 break;
510
511 case S_REG:
512 outab(0x88 + e1.e_addr);
513 outrb(&e, R_PAG0);
514 break;
515
516 case S_C:
517 outab(0x92);
518 outrb(&e, R_PAG0);
519 break;
520
521 default:
522 aerr();
523 }
524 break;
525
526 case S_AT_R:
527 switch (t1) {
528 case S_IMMED:
529 outab(0x76 + e.e_addr);
530 outrb(&e1, R_NORM);
531 break;
532
533 case S_DIR:
534 case S_EXT:
535 outab(0xA6 + e.e_addr);
536 outrb(&e1, R_PAG0);
537 break;
538
539 case S_A:
540 outab(0xF6 + e.e_addr);
541 break;
542
543 default:
544 aerr();
545 }
546 break;
547
548 case S_C:
549 if ((t1 != S_DIR) && (t1 != S_EXT))
550 aerr();
551 outab(0xA2);
552 outrb(&e1, R_PAG0);
553 break;
554
555 case S_DPTR:
556 if (t1 != S_IMMED)
557 aerr();
558 outab(0x90);
559 if (amode == 2)
560 outr3b(&e1, R_NORM);
561 else
562 outrw(&e1, R_NORM);
563 break;
564
565 default:
566 aerr();
567 }
568 break;
569
570 case S_BITBR: /* JB, JBC, JNB bit,rel */
571 /* Branch on bit set/clear */
572 t = addr(&e);
573 if ((t != S_DIR) && (t != S_EXT))
574 aerr();
575 /* sdcc svn rev #4994: fixed bug 1865114 */
576 comma(1);
577 expr(&e1, 0);
578
579 outab(op);
580 outrb(&e, R_PAG0);
581
582 if (mchpcr(&e1)) {
583 v1 = (int) (e1.e_addr - dot.s_addr - 1);
584 /* sdcc svn rev #602: Fix some path problems */
585 if (pass == 2 && ((v1 < -128) || (v1 > 127)))
586 aerr();
587 outab(v1);
588 } else {
589 outrb(&e1, R_PCR);
590 }
591 if (e1.e_mode != S_USER)
592 rerr();
593 break;
594
595 case S_BR: /* JC, JNC, JZ, JNZ */
596 /* Relative branch */
597 /* sdcc svn rev #4994: fixed bug 1865114 */
598 expr(&e1, 0);
599 outab(op);
600
601 if (mchpcr(&e1)) {
602 v1 = (int) (e1.e_addr - dot.s_addr - 1);
603 /* sdcc svn rev #602: Fix some path problems */
604 if (pass == 2 && ((v1 < -128) || (v1 > 127)))
605 aerr();
606 outab(v1);
607 } else {
608 outrb(&e1, R_PCR);
609 }
610 if (e1.e_mode != S_USER)
611 rerr();
612 break;
613
614 case S_CJNE:
615 /* A,#; A,dir; @R0,#; @R1,#; Rn,# */
616 t = addr(&e);
617 comma(1);
618 t1 = addr(&e1);
619
620 /* Benny */
621 comma(1);
622 expr(&e2, 0);
623
624 switch (t) {
625 case S_A:
626 if (t1 == S_IMMED) {
627 outab(op + 4);
628 outrb(&e1, R_NORM);
629 }
630 else if ((t1 == S_DIR) || (t1 == S_EXT)) {
631 outab(op + 5);
632 outrb(&e1, R_PAG0);
633 }
634 else
635 aerr();
636 break;
637
638 case S_AT_R:
639 outab(op + 6 + e.e_addr);
640 if (t1 != S_IMMED)
641 aerr();
642 outrb(&e1, R_NORM);
643 break;
644
645 case S_REG:
646 outab(op + 8 + e.e_addr);
647 if (t1 != S_IMMED)
648 aerr();
649 outrb(&e1, R_NORM);
650 break;
651
652 default:
653 aerr();
654 break;
655 }
656
657 /* branch destination */
658 if (mchpcr(&e2)) {
659 v1 = (int) (e2.e_addr - dot.s_addr - 1);
660 /* sdcc svn rev #602: Fix some path problems */
661 if (pass == 2 && ((v1 < -128) || (v1 > 127)))
662 aerr();
663 outab(v1);
664 } else {
665 outrb(&e2, R_PCR);
666 }
667 if (e2.e_mode != S_USER)
668 rerr();
669 break;
670
671 case S_DJNZ:
672 /* Dir,dest; Reg,dest */
673 t = addr(&e);
674 /* sdcc svn rev #4994: fixed bug 1865114 */
675 comma(1);
676 expr(&e1, 0);
677
678 switch (t) {
679 case S_DIR:
680 case S_EXT:
681 outab(op + 5);
682 outrb(&e, R_PAG0);
683 break;
684
685 case S_REG:
686 outab(op + 8 + e.e_addr);
687 break;
688
689 default:
690 aerr();
691 }
692
693 /* branch destination */
694 /* sdcc svn rev #4994: fixed bug 1865114 */
695 if (mchpcr(&e1)) {
696 v1 = (int) (e1.e_addr - dot.s_addr - 1);
697 /* sdcc svn rev #602: Fix some path problems */
698 if (pass == 2 && ((v1 < -128) || (v1 > 127)))
699 aerr();
700 outab(v1);
701 } else {
702 outrb(&e1, R_PCR);
703 }
704 if (e1.e_mode != S_USER)
705 rerr();
706 break;
707
708 case S_JMP:
709 /* @A+DPTR */
710 t = addr(&e);
711 if (t != S_AT_ADP)
712 aerr();
713 outab(op);
714 break;
715
716 case S_MOVC:
717 /* A,@A+DPTR A,@A+PC */
718 t = addr(&e);
719 if (t != S_A)
720 aerr();
721 comma(1);
722 t1 = addr(&e1);
723 if (t1 == S_AT_ADP)
724 outab(0x93);
725 else if (t1 == S_AT_APC)
726 outab(0x83);
727 else
728 aerr();
729 break;
730
731 case S_MOVX:
732 /* A,@DPTR A,@R0 A,@R1 @DPTR,A @R0,A @R1,A */
733 t = addr(&e);
734 comma(1);
735 t1 = addr(&e1);
736
737 switch (t) {
738 case S_A:
739 switch (t1) {
740 case S_AT_DP:
741 outab(0xE0);
742 break;
743
744 case S_AT_R:
745 outab(0xE2 + e1.e_addr);
746 break;
747
748 default:
749 aerr();
750 }
751 break;
752
753 case S_AT_DP:
754 if (t1 == S_A)
755 outab(0xF0);
756 else
757 aerr();
758 break;
759
760 case S_AT_R:
761 if (t1 == S_A)
762 outab(0xF2 + e.e_addr);
763 else
764 aerr();
765 break;
766
767 default:
768 aerr();
769 }
770 break;
771
772 /* MUL/DIV A,B */
773 case S_AB:
774 t = addr(&e);
775 if (t != S_RAB)
776 aerr();
777 outab(op);
778 break;
779
780 /* CLR or CPL: A, C, or bit */
781 case S_ACBIT:
782 t = addr(&e);
783 switch (t) {
784 case S_A:
785 if (op == 0xB2)
786 outab(0xF4);
787 else
788 outab(0xE4);
789 break;
790
791 case S_C:
792 outab(op+1);
793 break;
794
795 case S_DIR:
796 case S_EXT:
797 outab(op);
798 outrb(&e, R_PAG0);
799 break;
800
801 default:
802 aerr();
803 }
804 break;
805
806 /* SETB C or bit */
807 case S_SETB:
808 t = addr(&e);
809 switch (t) {
810 case S_C:
811 outab(op+1);
812 break;
813
814 case S_DIR:
815 case S_EXT:
816 outab(op);
817 outrb(&e, R_PAG0);
818 break;
819
820 default:
821 aerr();
822 }
823 break;
824
825 /* direct */
826 case S_DIRECT:
827 t = addr(&e);
828 if (t == S_A) {
829 e.e_addr = 0xE0;
830 e.e_mode = S_DIR;
831 } else
832 if ((t != S_DIR) && (t != S_EXT)) {
833 aerr();
834 break;
835 }
836 outab(op);
837 outrb(&e, R_PAG0);
838 break;
839
840 /* XCHD A,@Rn */
841 case S_XCHD:
842 t = addr(&e);
843 if (t != S_A)
844 aerr();
845 comma(1);
846 t1 = addr(&e1);
847 switch (t1) {
848 case S_AT_R:
849 outab(op + e1.e_addr);
850 break;
851
852 default:
853 aerr();
854 }
855 break;
856
857 default:
858 opcycles = OPCY_ERR;
859 err('o');
860 break;
861 }
862 if (opcycles == OPCY_NONE) {
863 opcycles = ds8pg1[cb[0] & 0xFF];
864 }
865 }
866
867 /*
868 * Branch/Jump PCR Mode Check
869 */
870 int
mchpcr(struct expr * esp)871 mchpcr(struct expr *esp)
872 {
873 if (esp->e_base.e_ap == dot.s_area) {
874 return(1);
875 }
876 if (esp->e_flag==0 && esp->e_base.e_ap==NULL) {
877 /*
878 * Absolute Destination
879 *
880 * Use the global symbol '.__.ABS.'
881 * of value zero and force the assembler
882 * to use this absolute constant as the
883 * base value for the relocation.
884 */
885 esp->e_flag = 1;
886 esp->e_base.e_sp = &sym[1];
887 }
888 return(0);
889 }
890
891 /*
892 * Machine specific initialization
893 */
894
895 VOID
minit(void)896 minit(void)
897 {
898 struct sym *sp;
899 struct PreDef *pd;
900 int i;
901 char pid[8];
902 char *p;
903
904 /*
905 * Byte Order
906 */
907 hilo = 1;
908
909 amode = 0;
910 /*
911 * First time only:
912 * add the pre-defined symbols to the table
913 * as local symbols.
914 */
915 if (pass == 0) {
916 ds8_bytes = 0;
917 mchtyp = X_DS8XCXXX;
918 sym[2].s_addr = X_DS8XCXXX;
919
920 pd = preDef;
921 while (pd->id) {
922 strcpy(pid, pd->id);
923 for (i=0; i<2; i++) {
924 /*
925 * i == 0, Create Upper Case Symbols
926 * i == 1, Create Lower Case Symbols
927 */
928 if (i == 1) {
929 p = pid;
930 while (*p) {
931 *p = ccase[*p & 0x007F];
932 p++;
933 }
934 }
935 sp = lookup(pid);
936 if (sp->s_type == S_NEW) {
937 sp->s_addr = pd->value;
938 sp->s_type = S_USER;
939 sp->s_flag = S_LCL | S_ASG;
940 }
941 }
942 pd++;
943 }
944 }
945 }
946