xref: /openbsd/gnu/gcc/gcc/config/m32c/prologue.md (revision 404b540a) 
1;; Machine Descriptions for R8C/M16C/M32C
2;; Copyright (C) 2005
3;; Free Software Foundation, Inc.
4;; Contributed by Red Hat.
5;;
6;; This file is part of GCC.
7;;
8;; GCC is free software; you can redistribute it and/or modify it
9;; under the terms of the GNU General Public License as published
10;; by the Free Software Foundation; either version 2, or (at your
11;; option) any later version.
12;;
13;; GCC is distributed in the hope that it will be useful, but WITHOUT
14;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16;; License for more details.
17;;
18;; You should have received a copy of the GNU General Public License
19;; along with GCC; see the file COPYING.  If not, write to the Free
20;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
21;; 02110-1301, USA.
22
23;; Prologue and epilogue patterns
24
25(define_expand "prologue"
26  [(const_int 1)]
27  ""
28  "m32c_emit_prologue(); DONE;"
29  )
30
31; For the next two, operands[0] is the amount of stack space we want
32; to reserve.
33
34; We assume dwarf2out will process each set in sequence.
35(define_insn "prologue_enter_16"
36  [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNO)))
37	(reg:HI FB_REGNO))
38   (set (reg:HI FB_REGNO)
39	(reg:HI SP_REGNO))
40   (set (reg:HI SP_REGNO)
41	(minus:HI (reg:HI SP_REGNO)
42	           (match_operand 0 "const_int_operand" "i")))
43   ]
44  "TARGET_A16"
45  "enter\t%0"
46  [(set_attr "flags" "x")]
47  )
48
49(define_insn "prologue_enter_24"
50  [(set (mem:SI (pre_dec:PSI (reg:PSI SP_REGNO)))
51	(reg:SI FB_REGNO))
52   (set (reg:PSI FB_REGNO)
53	(reg:PSI SP_REGNO))
54   (set (reg:PSI SP_REGNO)
55	(minus:PSI (reg:PSI SP_REGNO)
56	           (match_operand 0 "const_int_operand" "i")))
57   ]
58  "TARGET_A24"
59  "enter\t%0"
60  [(set_attr "flags" "x")]
61  )
62
63; Just a comment, for debugging the assembler output.
64(define_insn "prologue_end"
65  [(unspec_volatile [(const_int 0)] UNS_PROLOGUE_END)]
66  ""
67  "; end of prologue"
68  [(set_attr "flags" "n")]
69  )
70
71
72
73(define_expand "epilogue"
74  [(const_int 1)]
75  ""
76  "m32c_emit_epilogue(); DONE;"
77  )
78
79(define_expand "eh_return"
80  [(match_operand:PSI 0 "" "")]
81  ""
82  "m32c_emit_eh_epilogue(operands[0]); DONE;"
83  )
84
85(define_insn "eh_epilogue"
86  [(set (pc)
87	(unspec_volatile [(match_operand 0 "m32c_r1_operand" "")
88			  (match_operand 1 "m32c_r0_operand" "")
89			  ] UNS_EH_EPILOGUE))]
90  ""
91  "jmp.a\t__m32c_eh_return"
92  [(set_attr "flags" "x")]
93  )
94
95(define_insn "epilogue_exitd"
96  [(set (reg:PSI SP_REGNO)
97	(reg:PSI FB_REGNO))
98   (set (reg:PSI FB_REGNO)
99	(mem:PSI (reg:PSI SP_REGNO)))
100   (set (reg:PSI SP_REGNO)
101	(plus:PSI (reg:PSI SP_REGNO)
102	      (match_operand 0 "const_int_operand" "i")))
103   (return)
104   ]
105  ""
106  "exitd"
107  [(set_attr "flags" "x")]
108  )
109
110(define_insn "epilogue_reit"
111  [(set (reg:PSI SP_REGNO)
112	(plus:PSI (reg:PSI SP_REGNO)
113	      (match_operand 0 "const_int_operand" "i")))
114   (return)
115   ]
116  ""
117  "reit"
118  [(set_attr "flags" "x")]
119  )
120
121(define_insn "epilogue_rts"
122  [(return)
123   ]
124  ""
125  "rts"
126  [(set_attr "flags" "x")]
127  )
128
129(define_insn "epilogue_start"
130  [(unspec_volatile [(const_int 0)] UNS_EPILOGUE_START)]
131  ""
132  "; start of epilogue"
133  [(set_attr "flags" "n")]
134  )
135
136
137; These are used by the prologue/epilogue code.
138
139(define_insn "pushm"
140  [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_PUSHM)]
141  ""
142  "pushm\t%p0"
143  [(set_attr "flags" "n")]
144  )
145
146(define_insn "popm"
147  [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_POPM)]
148  ""
149  "popm\t%p0"
150  [(set_attr "flags" "n")]
151  )
152