xref: /linux/arch/x86/include/asm/microcode.h (revision cf5ab01c)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MICROCODE_H
3 #define _ASM_X86_MICROCODE_H
4 
5 struct cpu_signature {
6 	unsigned int sig;
7 	unsigned int pf;
8 	unsigned int rev;
9 };
10 
11 struct ucode_cpu_info {
12 	struct cpu_signature	cpu_sig;
13 	void			*mc;
14 };
15 
16 #ifdef CONFIG_MICROCODE
17 void load_ucode_bsp(void);
18 void load_ucode_ap(void);
19 void microcode_bsp_resume(void);
20 #else
load_ucode_bsp(void)21 static inline void load_ucode_bsp(void)	{ }
load_ucode_ap(void)22 static inline void load_ucode_ap(void) { }
microcode_bsp_resume(void)23 static inline void microcode_bsp_resume(void) { }
24 #endif
25 
26 extern unsigned long initrd_start_early;
27 
28 #ifdef CONFIG_CPU_SUP_INTEL
29 /* Intel specific microcode defines. Public for IFS */
30 struct microcode_header_intel {
31 	unsigned int	hdrver;
32 	unsigned int	rev;
33 	unsigned int	date;
34 	unsigned int	sig;
35 	unsigned int	cksum;
36 	unsigned int	ldrver;
37 	unsigned int	pf;
38 	unsigned int	datasize;
39 	unsigned int	totalsize;
40 	unsigned int	metasize;
41 	unsigned int	min_req_ver;
42 	unsigned int	reserved;
43 };
44 
45 struct microcode_intel {
46 	struct microcode_header_intel	hdr;
47 	unsigned int			bits[];
48 };
49 
50 #define DEFAULT_UCODE_DATASIZE		(2000)
51 #define MC_HEADER_SIZE			(sizeof(struct microcode_header_intel))
52 #define MC_HEADER_TYPE_MICROCODE	1
53 #define MC_HEADER_TYPE_IFS		2
54 
intel_microcode_get_datasize(struct microcode_header_intel * hdr)55 static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
56 {
57 	return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
58 }
59 
intel_get_microcode_revision(void)60 static inline u32 intel_get_microcode_revision(void)
61 {
62 	u32 rev, dummy;
63 
64 	native_wrmsrl(MSR_IA32_UCODE_REV, 0);
65 
66 	/* As documented in the SDM: Do a CPUID 1 here */
67 	native_cpuid_eax(1);
68 
69 	/* get the current revision from MSR 0x8B */
70 	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
71 
72 	return rev;
73 }
74 #endif /* !CONFIG_CPU_SUP_INTEL */
75 
76 bool microcode_nmi_handler(void);
77 void microcode_offline_nmi_handler(void);
78 
79 #ifdef CONFIG_MICROCODE_LATE_LOADING
80 DECLARE_STATIC_KEY_FALSE(microcode_nmi_handler_enable);
microcode_nmi_handler_enabled(void)81 static __always_inline bool microcode_nmi_handler_enabled(void)
82 {
83 	return static_branch_unlikely(&microcode_nmi_handler_enable);
84 }
85 #else
microcode_nmi_handler_enabled(void)86 static __always_inline bool microcode_nmi_handler_enabled(void) { return false; }
87 #endif
88 
89 #endif /* _ASM_X86_MICROCODE_H */
90