1 /* $NetBSD: cmpci.c,v 1.48 2016/07/07 06:55:41 msaitoh Exp $ */
2
3 /*
4 * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Takuya SHIOZAKI <tshiozak@NetBSD.org> .
9 *
10 * This code is derived from software contributed to The NetBSD Foundation
11 * by ITOH Yasufumi.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35
36 /*
37 * C-Media CMI8x38 Audio Chip Support.
38 *
39 * TODO:
40 * - 4ch / 6ch support.
41 * - Joystick support.
42 *
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.48 2016/07/07 06:55:41 msaitoh Exp $");
47
48 #if defined(AUDIO_DEBUG) || defined(DEBUG)
49 #define DPRINTF(x) if (cmpcidebug) printf x
50 int cmpcidebug = 0;
51 #else
52 #define DPRINTF(x)
53 #endif
54
55 #include "mpu.h"
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/kmem.h>
61 #include <sys/device.h>
62 #include <sys/proc.h>
63
64 #include <dev/pci/pcidevs.h>
65 #include <dev/pci/pcivar.h>
66
67 #include <sys/audioio.h>
68 #include <dev/audio_if.h>
69 #include <dev/midi_if.h>
70
71 #include <dev/mulaw.h>
72 #include <dev/auconv.h>
73 #include <dev/pci/cmpcireg.h>
74 #include <dev/pci/cmpcivar.h>
75
76 #include <dev/ic/mpuvar.h>
77 #include <sys/bus.h>
78 #include <sys/intr.h>
79
80 /*
81 * Low-level HW interface
82 */
83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
84 static inline void cmpci_mixerreg_write(struct cmpci_softc *,
85 uint8_t, uint8_t);
86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
87 unsigned, unsigned);
88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
89 uint32_t, uint32_t);
90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
96 static int cmpci_rate_to_index(int);
97 static inline int cmpci_index_to_rate(int);
98 static inline int cmpci_index_to_divider(int);
99
100 static int cmpci_adjust(int, int);
101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
102 static void cmpci_set_out_ports(struct cmpci_softc *);
103 static int cmpci_set_in_ports(struct cmpci_softc *);
104
105
106 /*
107 * autoconf interface
108 */
109 static int cmpci_match(device_t, cfdata_t, void *);
110 static void cmpci_attach(device_t, device_t, void *);
111
112 CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc),
113 cmpci_match, cmpci_attach, NULL, NULL);
114
115 /* interrupt */
116 static int cmpci_intr(void *);
117
118
119 /*
120 * DMA stuffs
121 */
122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **);
123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t);
124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
125 void *);
126
127
128 /*
129 * interface to machine independent layer
130 */
131 static int cmpci_query_encoding(void *, struct audio_encoding *);
132 static int cmpci_set_params(void *, int, int, audio_params_t *,
133 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *);
134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
135 static int cmpci_halt_output(void *);
136 static int cmpci_halt_input(void *);
137 static int cmpci_getdev(void *, struct audio_device *);
138 static int cmpci_set_port(void *, mixer_ctrl_t *);
139 static int cmpci_get_port(void *, mixer_ctrl_t *);
140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
141 static void *cmpci_allocm(void *, int, size_t);
142 static void cmpci_freem(void *, void *, size_t);
143 static size_t cmpci_round_buffersize(void *, int, size_t);
144 static paddr_t cmpci_mappage(void *, void *, off_t, int);
145 static int cmpci_get_props(void *);
146 static int cmpci_trigger_output(void *, void *, void *, int,
147 void (*)(void *), void *, const audio_params_t *);
148 static int cmpci_trigger_input(void *, void *, void *, int,
149 void (*)(void *), void *, const audio_params_t *);
150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **);
151
152 static const struct audio_hw_if cmpci_hw_if = {
153 NULL, /* open */
154 NULL, /* close */
155 NULL, /* drain */
156 cmpci_query_encoding, /* query_encoding */
157 cmpci_set_params, /* set_params */
158 cmpci_round_blocksize, /* round_blocksize */
159 NULL, /* commit_settings */
160 NULL, /* init_output */
161 NULL, /* init_input */
162 NULL, /* start_output */
163 NULL, /* start_input */
164 cmpci_halt_output, /* halt_output */
165 cmpci_halt_input, /* halt_input */
166 NULL, /* speaker_ctl */
167 cmpci_getdev, /* getdev */
168 NULL, /* setfd */
169 cmpci_set_port, /* set_port */
170 cmpci_get_port, /* get_port */
171 cmpci_query_devinfo, /* query_devinfo */
172 cmpci_allocm, /* allocm */
173 cmpci_freem, /* freem */
174 cmpci_round_buffersize,/* round_buffersize */
175 cmpci_mappage, /* mappage */
176 cmpci_get_props, /* get_props */
177 cmpci_trigger_output, /* trigger_output */
178 cmpci_trigger_input, /* trigger_input */
179 NULL, /* dev_ioctl */
180 cmpci_get_locks, /* get_locks */
181 };
182
183 #define CMPCI_NFORMATS 4
184 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
185 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
186 2, AUFMT_STEREO, 0, {5512, 48000}},
187 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
188 1, AUFMT_MONAURAL, 0, {5512, 48000}},
189 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
190 2, AUFMT_STEREO, 0, {5512, 48000}},
191 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
192 1, AUFMT_MONAURAL, 0, {5512, 48000}},
193 };
194
195
196 /*
197 * Low-level HW interface
198 */
199
200 /* mixer register read/write */
201 static inline uint8_t
cmpci_mixerreg_read(struct cmpci_softc * sc,uint8_t no)202 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
203 {
204 uint8_t ret;
205
206 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
207 delay(10);
208 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
209 delay(10);
210 return ret;
211 }
212
213 static inline void
cmpci_mixerreg_write(struct cmpci_softc * sc,uint8_t no,uint8_t val)214 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
215 {
216
217 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
218 delay(10);
219 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
220 delay(10);
221 }
222
223
224 /* register partial write */
225 static inline void
cmpci_reg_partial_write_1(struct cmpci_softc * sc,int no,int shift,unsigned mask,unsigned val)226 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
227 unsigned mask, unsigned val)
228 {
229
230 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
231 (val<<shift) |
232 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
233 delay(10);
234 }
235
236 static inline void
cmpci_reg_partial_write_4(struct cmpci_softc * sc,int no,int shift,uint32_t mask,uint32_t val)237 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
238 uint32_t mask, uint32_t val)
239 {
240
241 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
242 (val<<shift) |
243 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
244 delay(10);
245 }
246
247 /* register set/clear bit */
248 static inline void
cmpci_reg_set_1(struct cmpci_softc * sc,int no,uint8_t mask)249 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
250 {
251
252 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
253 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
254 delay(10);
255 }
256
257 static inline void
cmpci_reg_clear_1(struct cmpci_softc * sc,int no,uint8_t mask)258 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
259 {
260
261 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
262 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
263 delay(10);
264 }
265
266 static inline void
cmpci_reg_set_4(struct cmpci_softc * sc,int no,uint32_t mask)267 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
268 {
269
270 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
271 KDASSERT(no != CMPCI_REG_MISC);
272
273 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
274 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
275 delay(10);
276 }
277
278 static inline void
cmpci_reg_clear_4(struct cmpci_softc * sc,int no,uint32_t mask)279 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
280 {
281
282 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
283 KDASSERT(no != CMPCI_REG_MISC);
284
285 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
286 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
287 delay(10);
288 }
289
290 /*
291 * The CMPCI_REG_MISC register needs special handling, since one of
292 * its bits has different read/write values.
293 */
294 static inline void
cmpci_reg_set_reg_misc(struct cmpci_softc * sc,uint32_t mask)295 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
296 {
297
298 sc->sc_reg_misc |= mask;
299 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
300 sc->sc_reg_misc);
301 delay(10);
302 }
303
304 static inline void
cmpci_reg_clear_reg_misc(struct cmpci_softc * sc,uint32_t mask)305 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
306 {
307
308 sc->sc_reg_misc &= ~mask;
309 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
310 sc->sc_reg_misc);
311 delay(10);
312 }
313
314 /* rate */
315 static const struct {
316 int rate;
317 int divider;
318 } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
319 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
320 _RATE(5512),
321 _RATE(8000),
322 _RATE(11025),
323 _RATE(16000),
324 _RATE(22050),
325 _RATE(32000),
326 _RATE(44100),
327 _RATE(48000)
328 #undef _RATE
329 };
330
331 static int
cmpci_rate_to_index(int rate)332 cmpci_rate_to_index(int rate)
333 {
334 int i;
335
336 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
337 if (rate <=
338 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
339 return i;
340 return i; /* 48000 */
341 }
342
343 static inline int
cmpci_index_to_rate(int index)344 cmpci_index_to_rate(int index)
345 {
346
347 return cmpci_rate_table[index].rate;
348 }
349
350 static inline int
cmpci_index_to_divider(int index)351 cmpci_index_to_divider(int index)
352 {
353
354 return cmpci_rate_table[index].divider;
355 }
356
357 /*
358 * interface to configure the device.
359 */
360 static int
cmpci_match(device_t parent,cfdata_t match,void * aux)361 cmpci_match(device_t parent, cfdata_t match, void *aux)
362 {
363 struct pci_attach_args *pa;
364
365 pa = (struct pci_attach_args *)aux;
366 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
367 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
368 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
369 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
370 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
371 return 1;
372
373 return 0;
374 }
375
376 static void
cmpci_attach(device_t parent,device_t self,void * aux)377 cmpci_attach(device_t parent, device_t self, void *aux)
378 {
379 struct cmpci_softc *sc;
380 struct pci_attach_args *pa;
381 struct audio_attach_args aa;
382 pci_intr_handle_t ih;
383 char const *strintr;
384 int i, v;
385 char intrbuf[PCI_INTRSTR_LEN];
386
387 sc = device_private(self);
388 sc->sc_dev = self;
389 pa = (struct pci_attach_args *)aux;
390
391 sc->sc_id = pa->pa_id;
392 sc->sc_class = pa->pa_class;
393 pci_aprint_devinfo(pa, "Audio controller");
394 switch (PCI_PRODUCT(sc->sc_id)) {
395 case PCI_PRODUCT_CMEDIA_CMI8338A:
396 /*FALLTHROUGH*/
397 case PCI_PRODUCT_CMEDIA_CMI8338B:
398 sc->sc_capable = CMPCI_CAP_CMI8338;
399 break;
400 case PCI_PRODUCT_CMEDIA_CMI8738:
401 /*FALLTHROUGH*/
402 case PCI_PRODUCT_CMEDIA_CMI8738B:
403 sc->sc_capable = CMPCI_CAP_CMI8738;
404 break;
405 }
406
407 /* map I/O space */
408 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
409 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
410 aprint_error_dev(sc->sc_dev, "failed to map I/O space\n");
411 return;
412 }
413
414 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
415 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
416
417 /* interrupt */
418 if (pci_intr_map(pa, &ih)) {
419 aprint_error_dev(sc->sc_dev, "failed to map interrupt\n");
420 return;
421 }
422 strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
423 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr,
424 sc);
425 if (sc->sc_ih == NULL) {
426 aprint_error_dev(sc->sc_dev, "failed to establish interrupt");
427 if (strintr != NULL)
428 aprint_error(" at %s", strintr);
429 aprint_error("\n");
430 mutex_destroy(&sc->sc_lock);
431 mutex_destroy(&sc->sc_intr_lock);
432 return;
433 }
434 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr);
435
436 sc->sc_dmat = pa->pa_dmat;
437
438 audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev);
439
440 /* attach OPL device */
441 aa.type = AUDIODEV_TYPE_OPL;
442 aa.hwif = NULL;
443 aa.hdl = NULL;
444 (void)config_found(sc->sc_dev, &aa, audioprint);
445
446 /* attach MPU-401 device */
447 aa.type = AUDIODEV_TYPE_MPU;
448 aa.hwif = NULL;
449 aa.hdl = NULL;
450 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
451 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
452 sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint);
453
454 /* get initial value (this is 0 and may be omitted but just in case) */
455 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
456 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
457
458 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
459 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
460 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
461 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
462 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
463 for (i = 0; i < CMPCI_NDEVS; i++) {
464 switch (i) {
465 /*
466 * CMI8738 defaults are
467 * master: 0xe0 (0x00 - 0xf8)
468 * FM, DAC: 0xc0 (0x00 - 0xf8)
469 * PC speaker: 0x80 (0x00 - 0xc0)
470 * others: 0
471 */
472 /* volume */
473 case CMPCI_MASTER_VOL:
474 v = 128; /* 224 */
475 break;
476 case CMPCI_FM_VOL:
477 case CMPCI_DAC_VOL:
478 v = 192;
479 break;
480 case CMPCI_PCSPEAKER:
481 v = 128;
482 break;
483
484 /* booleans, set to true */
485 case CMPCI_CD_MUTE:
486 case CMPCI_MIC_MUTE:
487 case CMPCI_LINE_IN_MUTE:
488 case CMPCI_AUX_IN_MUTE:
489 v = 1;
490 break;
491
492 /* volume with inital value 0 */
493 case CMPCI_CD_VOL:
494 case CMPCI_LINE_IN_VOL:
495 case CMPCI_AUX_IN_VOL:
496 case CMPCI_MIC_VOL:
497 case CMPCI_MIC_RECVOL:
498 /* FALLTHROUGH */
499
500 /* others are cleared */
501 case CMPCI_MIC_PREAMP:
502 case CMPCI_RECORD_SOURCE:
503 case CMPCI_PLAYBACK_MODE:
504 case CMPCI_SPDIF_IN_SELECT:
505 case CMPCI_SPDIF_IN_PHASE:
506 case CMPCI_SPDIF_LOOP:
507 case CMPCI_SPDIF_OUT_PLAYBACK:
508 case CMPCI_SPDIF_OUT_VOLTAGE:
509 case CMPCI_MONITOR_DAC:
510 case CMPCI_REAR:
511 case CMPCI_INDIVIDUAL:
512 case CMPCI_REVERSE:
513 case CMPCI_SURROUND:
514 default:
515 v = 0;
516 break;
517 }
518 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
519 cmpci_set_mixer_gain(sc, i);
520 }
521 }
522
523 static int
cmpci_intr(void * handle)524 cmpci_intr(void *handle)
525 {
526 struct cmpci_softc *sc = handle;
527 #if NMPU > 0
528 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
529 #endif
530 uint32_t intrstat;
531
532 mutex_spin_enter(&sc->sc_intr_lock);
533
534 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
535 CMPCI_REG_INTR_STATUS);
536
537 if (!(intrstat & CMPCI_REG_ANY_INTR)) {
538 mutex_spin_exit(&sc->sc_intr_lock);
539 return 0;
540 }
541
542 delay(10);
543
544 /* disable and reset intr */
545 if (intrstat & CMPCI_REG_CH0_INTR)
546 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
547 CMPCI_REG_CH0_INTR_ENABLE);
548 if (intrstat & CMPCI_REG_CH1_INTR)
549 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
550 CMPCI_REG_CH1_INTR_ENABLE);
551
552 if (intrstat & CMPCI_REG_CH0_INTR) {
553 if (sc->sc_play.intr != NULL)
554 (*sc->sc_play.intr)(sc->sc_play.intr_arg);
555 }
556 if (intrstat & CMPCI_REG_CH1_INTR) {
557 if (sc->sc_rec.intr != NULL)
558 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
559 }
560
561 /* enable intr */
562 if (intrstat & CMPCI_REG_CH0_INTR)
563 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
564 CMPCI_REG_CH0_INTR_ENABLE);
565 if (intrstat & CMPCI_REG_CH1_INTR)
566 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
567 CMPCI_REG_CH1_INTR_ENABLE);
568
569 #if NMPU > 0
570 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL)
571 mpu_intr(sc_mpu);
572 #endif
573
574 mutex_spin_exit(&sc->sc_intr_lock);
575 return 1;
576 }
577
578 static int
cmpci_query_encoding(void * handle,struct audio_encoding * fp)579 cmpci_query_encoding(void *handle, struct audio_encoding *fp)
580 {
581
582 switch (fp->index) {
583 case 0:
584 strcpy(fp->name, AudioEulinear);
585 fp->encoding = AUDIO_ENCODING_ULINEAR;
586 fp->precision = 8;
587 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
588 break;
589 case 1:
590 strcpy(fp->name, AudioEmulaw);
591 fp->encoding = AUDIO_ENCODING_ULAW;
592 fp->precision = 8;
593 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
594 break;
595 case 2:
596 strcpy(fp->name, AudioEalaw);
597 fp->encoding = AUDIO_ENCODING_ALAW;
598 fp->precision = 8;
599 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
600 break;
601 case 3:
602 strcpy(fp->name, AudioEslinear);
603 fp->encoding = AUDIO_ENCODING_SLINEAR;
604 fp->precision = 8;
605 fp->flags = 0;
606 break;
607 case 4:
608 strcpy(fp->name, AudioEslinear_le);
609 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
610 fp->precision = 16;
611 fp->flags = 0;
612 break;
613 case 5:
614 strcpy(fp->name, AudioEulinear_le);
615 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
616 fp->precision = 16;
617 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
618 break;
619 case 6:
620 strcpy(fp->name, AudioEslinear_be);
621 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
622 fp->precision = 16;
623 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
624 break;
625 case 7:
626 strcpy(fp->name, AudioEulinear_be);
627 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
628 fp->precision = 16;
629 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
630 break;
631 default:
632 return EINVAL;
633 }
634 return 0;
635 }
636
637
638 static int
cmpci_set_params(void * handle,int setmode,int usemode,audio_params_t * play,audio_params_t * rec,stream_filter_list_t * pfil,stream_filter_list_t * rfil)639 cmpci_set_params(void *handle, int setmode, int usemode,
640 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
641 stream_filter_list_t *rfil)
642 {
643 int i;
644 struct cmpci_softc *sc;
645
646 sc = handle;
647 for (i = 0; i < 2; i++) {
648 int md_format;
649 int md_divide;
650 int md_index;
651 int mode;
652 audio_params_t *p;
653 stream_filter_list_t *fil;
654 int ind;
655
656 switch (i) {
657 case 0:
658 mode = AUMODE_PLAY;
659 p = play;
660 fil = pfil;
661 break;
662 case 1:
663 mode = AUMODE_RECORD;
664 p = rec;
665 fil = rfil;
666 break;
667 default:
668 return EINVAL;
669 }
670
671 if (!(setmode & mode))
672 continue;
673
674 md_index = cmpci_rate_to_index(p->sample_rate);
675 md_divide = cmpci_index_to_divider(md_index);
676 p->sample_rate = cmpci_index_to_rate(md_index);
677 DPRINTF(("%s: sample:%u, divider=%d\n",
678 device_xname(sc->sc_dev), p->sample_rate, md_divide));
679
680 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
681 mode, p, FALSE, fil);
682 if (ind < 0)
683 return EINVAL;
684 if (fil->req_size > 0)
685 p = &fil->filters[0].param;
686
687 /* format */
688 md_format = p->channels == 1
689 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
690 md_format |= p->precision == 16
691 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
692 if (mode & AUMODE_PLAY) {
693 cmpci_reg_partial_write_4(sc,
694 CMPCI_REG_CHANNEL_FORMAT,
695 CMPCI_REG_CH0_FORMAT_SHIFT,
696 CMPCI_REG_CH0_FORMAT_MASK, md_format);
697 cmpci_reg_partial_write_4(sc,
698 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
699 CMPCI_REG_DAC_FS_MASK, md_divide);
700 sc->sc_play.md_divide = md_divide;
701 } else {
702 cmpci_reg_partial_write_4(sc,
703 CMPCI_REG_CHANNEL_FORMAT,
704 CMPCI_REG_CH1_FORMAT_SHIFT,
705 CMPCI_REG_CH1_FORMAT_MASK, md_format);
706 cmpci_reg_partial_write_4(sc,
707 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
708 CMPCI_REG_ADC_FS_MASK, md_divide);
709 sc->sc_rec.md_divide = md_divide;
710 }
711 cmpci_set_out_ports(sc);
712 cmpci_set_in_ports(sc);
713 }
714 return 0;
715 }
716
717 /* ARGSUSED */
718 static int
cmpci_round_blocksize(void * handle,int block,int mode,const audio_params_t * param)719 cmpci_round_blocksize(void *handle, int block,
720 int mode, const audio_params_t *param)
721 {
722
723 return block & -4;
724 }
725
726 static int
cmpci_halt_output(void * handle)727 cmpci_halt_output(void *handle)
728 {
729 struct cmpci_softc *sc;
730
731 sc = handle;
732 sc->sc_play.intr = NULL;
733 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
734 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
735 /* wait for reset DMA */
736 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
737 delay(10);
738 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
739
740 return 0;
741 }
742
743 static int
cmpci_halt_input(void * handle)744 cmpci_halt_input(void *handle)
745 {
746 struct cmpci_softc *sc;
747
748 sc = handle;
749 sc->sc_rec.intr = NULL;
750 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
751 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
752 /* wait for reset DMA */
753 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
754 delay(10);
755 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
756
757 return 0;
758 }
759
760 /* get audio device information */
761 static int
cmpci_getdev(void * handle,struct audio_device * ad)762 cmpci_getdev(void *handle, struct audio_device *ad)
763 {
764 struct cmpci_softc *sc;
765
766 sc = handle;
767 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
768 snprintf(ad->version, sizeof(ad->version), "0x%02x",
769 PCI_REVISION(sc->sc_class));
770 switch (PCI_PRODUCT(sc->sc_id)) {
771 case PCI_PRODUCT_CMEDIA_CMI8338A:
772 strncpy(ad->config, "CMI8338A", sizeof(ad->config));
773 break;
774 case PCI_PRODUCT_CMEDIA_CMI8338B:
775 strncpy(ad->config, "CMI8338B", sizeof(ad->config));
776 break;
777 case PCI_PRODUCT_CMEDIA_CMI8738:
778 strncpy(ad->config, "CMI8738", sizeof(ad->config));
779 break;
780 case PCI_PRODUCT_CMEDIA_CMI8738B:
781 strncpy(ad->config, "CMI8738B", sizeof(ad->config));
782 break;
783 default:
784 strncpy(ad->config, "unknown", sizeof(ad->config));
785 }
786
787 return 0;
788 }
789
790 /* mixer device information */
791 int
cmpci_query_devinfo(void * handle,mixer_devinfo_t * dip)792 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
793 {
794 static const char *const mixer_port_names[] = {
795 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
796 AudioNmicrophone
797 };
798 static const char *const mixer_classes[] = {
799 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
800 CmpciCspdif
801 };
802 struct cmpci_softc *sc;
803 int i;
804
805 sc = handle;
806 dip->prev = dip->next = AUDIO_MIXER_LAST;
807
808 switch (dip->index) {
809 case CMPCI_INPUT_CLASS:
810 case CMPCI_OUTPUT_CLASS:
811 case CMPCI_RECORD_CLASS:
812 case CMPCI_PLAYBACK_CLASS:
813 case CMPCI_SPDIF_CLASS:
814 dip->type = AUDIO_MIXER_CLASS;
815 dip->mixer_class = dip->index;
816 strcpy(dip->label.name,
817 mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
818 return 0;
819
820 case CMPCI_AUX_IN_VOL:
821 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
822 goto vol1;
823 case CMPCI_DAC_VOL:
824 case CMPCI_FM_VOL:
825 case CMPCI_CD_VOL:
826 case CMPCI_LINE_IN_VOL:
827 case CMPCI_MIC_VOL:
828 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
829 vol1: dip->mixer_class = CMPCI_INPUT_CLASS;
830 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */
831 strcpy(dip->label.name, mixer_port_names[dip->index]);
832 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
833 vol:
834 dip->type = AUDIO_MIXER_VALUE;
835 strcpy(dip->un.v.units.name, AudioNvolume);
836 return 0;
837
838 case CMPCI_MIC_MUTE:
839 dip->next = CMPCI_MIC_PREAMP;
840 /* FALLTHROUGH */
841 case CMPCI_DAC_MUTE:
842 case CMPCI_FM_MUTE:
843 case CMPCI_CD_MUTE:
844 case CMPCI_LINE_IN_MUTE:
845 case CMPCI_AUX_IN_MUTE:
846 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */
847 dip->mixer_class = CMPCI_INPUT_CLASS;
848 strcpy(dip->label.name, AudioNmute);
849 goto on_off;
850 on_off:
851 dip->type = AUDIO_MIXER_ENUM;
852 dip->un.e.num_mem = 2;
853 strcpy(dip->un.e.member[0].label.name, AudioNoff);
854 dip->un.e.member[0].ord = 0;
855 strcpy(dip->un.e.member[1].label.name, AudioNon);
856 dip->un.e.member[1].ord = 1;
857 return 0;
858
859 case CMPCI_MIC_PREAMP:
860 dip->mixer_class = CMPCI_INPUT_CLASS;
861 dip->prev = CMPCI_MIC_MUTE;
862 strcpy(dip->label.name, AudioNpreamp);
863 goto on_off;
864 case CMPCI_PCSPEAKER:
865 dip->mixer_class = CMPCI_INPUT_CLASS;
866 strcpy(dip->label.name, AudioNspeaker);
867 dip->un.v.num_channels = 1;
868 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
869 goto vol;
870 case CMPCI_RECORD_SOURCE:
871 dip->mixer_class = CMPCI_RECORD_CLASS;
872 strcpy(dip->label.name, AudioNsource);
873 dip->type = AUDIO_MIXER_SET;
874 dip->un.s.num_mem = 7;
875 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
876 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
877 strcpy(dip->un.s.member[1].label.name, AudioNcd);
878 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
879 strcpy(dip->un.s.member[2].label.name, AudioNline);
880 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
881 strcpy(dip->un.s.member[3].label.name, AudioNaux);
882 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
883 strcpy(dip->un.s.member[4].label.name, AudioNwave);
884 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
885 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
886 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
887 strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
888 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
889 return 0;
890 case CMPCI_MIC_RECVOL:
891 dip->mixer_class = CMPCI_RECORD_CLASS;
892 strcpy(dip->label.name, AudioNmicrophone);
893 dip->un.v.num_channels = 1;
894 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
895 goto vol;
896
897 case CMPCI_PLAYBACK_MODE:
898 dip->mixer_class = CMPCI_PLAYBACK_CLASS;
899 dip->type = AUDIO_MIXER_ENUM;
900 strcpy(dip->label.name, AudioNmode);
901 dip->un.e.num_mem = 2;
902 strcpy(dip->un.e.member[0].label.name, AudioNdac);
903 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
904 strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
905 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
906 return 0;
907 case CMPCI_SPDIF_IN_SELECT:
908 dip->mixer_class = CMPCI_SPDIF_CLASS;
909 dip->type = AUDIO_MIXER_ENUM;
910 dip->next = CMPCI_SPDIF_IN_PHASE;
911 strcpy(dip->label.name, AudioNinput);
912 i = 0;
913 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
914 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
915 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
916 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
917 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
918 }
919 strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
920 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
921 dip->un.e.num_mem = i;
922 return 0;
923 case CMPCI_SPDIF_IN_PHASE:
924 dip->mixer_class = CMPCI_SPDIF_CLASS;
925 dip->prev = CMPCI_SPDIF_IN_SELECT;
926 strcpy(dip->label.name, CmpciNphase);
927 dip->type = AUDIO_MIXER_ENUM;
928 dip->un.e.num_mem = 2;
929 strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
930 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
931 strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
932 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
933 return 0;
934 case CMPCI_SPDIF_LOOP:
935 dip->mixer_class = CMPCI_SPDIF_CLASS;
936 dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
937 strcpy(dip->label.name, AudioNoutput);
938 dip->type = AUDIO_MIXER_ENUM;
939 dip->un.e.num_mem = 2;
940 strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
941 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
942 strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
943 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
944 return 0;
945 case CMPCI_SPDIF_OUT_PLAYBACK:
946 dip->mixer_class = CMPCI_SPDIF_CLASS;
947 dip->prev = CMPCI_SPDIF_LOOP;
948 dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
949 strcpy(dip->label.name, CmpciNplayback);
950 dip->type = AUDIO_MIXER_ENUM;
951 dip->un.e.num_mem = 2;
952 strcpy(dip->un.e.member[0].label.name, AudioNwave);
953 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
954 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
955 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
956 return 0;
957 case CMPCI_SPDIF_OUT_VOLTAGE:
958 dip->mixer_class = CMPCI_SPDIF_CLASS;
959 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
960 strcpy(dip->label.name, CmpciNvoltage);
961 dip->type = AUDIO_MIXER_ENUM;
962 dip->un.e.num_mem = 2;
963 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
964 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
965 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
966 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
967 return 0;
968 case CMPCI_MONITOR_DAC:
969 dip->mixer_class = CMPCI_SPDIF_CLASS;
970 strcpy(dip->label.name, AudioNmonitor);
971 dip->type = AUDIO_MIXER_ENUM;
972 dip->un.e.num_mem = 3;
973 strcpy(dip->un.e.member[0].label.name, AudioNoff);
974 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
975 strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
976 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
977 strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
978 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
979 return 0;
980
981 case CMPCI_MASTER_VOL:
982 dip->mixer_class = CMPCI_OUTPUT_CLASS;
983 strcpy(dip->label.name, AudioNmaster);
984 dip->un.v.num_channels = 2;
985 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
986 goto vol;
987 case CMPCI_REAR:
988 dip->mixer_class = CMPCI_OUTPUT_CLASS;
989 dip->next = CMPCI_INDIVIDUAL;
990 strcpy(dip->label.name, CmpciNrear);
991 goto on_off;
992 case CMPCI_INDIVIDUAL:
993 dip->mixer_class = CMPCI_OUTPUT_CLASS;
994 dip->prev = CMPCI_REAR;
995 dip->next = CMPCI_REVERSE;
996 strcpy(dip->label.name, CmpciNindividual);
997 goto on_off;
998 case CMPCI_REVERSE:
999 dip->mixer_class = CMPCI_OUTPUT_CLASS;
1000 dip->prev = CMPCI_INDIVIDUAL;
1001 strcpy(dip->label.name, CmpciNreverse);
1002 goto on_off;
1003 case CMPCI_SURROUND:
1004 dip->mixer_class = CMPCI_OUTPUT_CLASS;
1005 strcpy(dip->label.name, CmpciNsurround);
1006 goto on_off;
1007 }
1008
1009 return ENXIO;
1010 }
1011
1012 static int
cmpci_alloc_dmamem(struct cmpci_softc * sc,size_t size,void ** r_addr)1013 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr)
1014 {
1015 int error;
1016 struct cmpci_dmanode *n;
1017
1018 error = 0;
1019 n = kmem_alloc(sizeof(struct cmpci_dmanode), KM_SLEEP);
1020 if (n == NULL) {
1021 error = ENOMEM;
1022 goto quit;
1023 }
1024
1025 #define CMPCI_DMABUF_ALIGN 0x4
1026 #define CMPCI_DMABUF_BOUNDARY 0x0
1027 n->cd_tag = sc->sc_dmat;
1028 n->cd_size = size;
1029 error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
1030 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
1031 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs,
1032 BUS_DMA_WAITOK);
1033 if (error)
1034 goto mfree;
1035 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
1036 &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
1037 if (error)
1038 goto dmafree;
1039 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
1040 BUS_DMA_WAITOK, &n->cd_map);
1041 if (error)
1042 goto unmap;
1043 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
1044 NULL, BUS_DMA_WAITOK);
1045 if (error)
1046 goto destroy;
1047
1048 n->cd_next = sc->sc_dmap;
1049 sc->sc_dmap = n;
1050 *r_addr = KVADDR(n);
1051 return 0;
1052
1053 destroy:
1054 bus_dmamap_destroy(n->cd_tag, n->cd_map);
1055 unmap:
1056 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1057 dmafree:
1058 bus_dmamem_free(n->cd_tag,
1059 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1060 mfree:
1061 kmem_free(n, sizeof(*n));
1062 quit:
1063 return error;
1064 }
1065
1066 static int
cmpci_free_dmamem(struct cmpci_softc * sc,void * addr,size_t size)1067 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size)
1068 {
1069 struct cmpci_dmanode **nnp;
1070
1071 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
1072 if ((*nnp)->cd_addr == addr) {
1073 struct cmpci_dmanode *n = *nnp;
1074 bus_dmamap_unload(n->cd_tag, n->cd_map);
1075 bus_dmamap_destroy(n->cd_tag, n->cd_map);
1076 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1077 bus_dmamem_free(n->cd_tag, n->cd_segs,
1078 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1079 kmem_free(n, sizeof(*n));
1080 return 0;
1081 }
1082 }
1083 return -1;
1084 }
1085
1086 static struct cmpci_dmanode *
cmpci_find_dmamem(struct cmpci_softc * sc,void * addr)1087 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr)
1088 {
1089 struct cmpci_dmanode *p;
1090
1091 for (p = sc->sc_dmap; p; p = p->cd_next)
1092 if (KVADDR(p) == (void *)addr)
1093 break;
1094 return p;
1095 }
1096
1097 #if 0
1098 static void
1099 cmpci_print_dmamem(struct cmpci_dmanode *);
1100 static void
1101 cmpci_print_dmamem(struct cmpci_dmanode *p)
1102 {
1103
1104 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
1105 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
1106 (void *)DMAADDR(p), (void *)p->cd_size));
1107 }
1108 #endif /* DEBUG */
1109
1110 static void *
cmpci_allocm(void * handle,int direction,size_t size)1111 cmpci_allocm(void *handle, int direction, size_t size)
1112 {
1113 void *addr;
1114
1115 addr = NULL; /* XXX gcc */
1116
1117 if (cmpci_alloc_dmamem(handle, size, &addr))
1118 return NULL;
1119 return addr;
1120 }
1121
1122 static void
cmpci_freem(void * handle,void * addr,size_t size)1123 cmpci_freem(void *handle, void *addr, size_t size)
1124 {
1125
1126 cmpci_free_dmamem(handle, addr, size);
1127 }
1128
1129 #define MAXVAL 256
1130 static int
cmpci_adjust(int val,int mask)1131 cmpci_adjust(int val, int mask)
1132 {
1133
1134 val += (MAXVAL - mask) >> 1;
1135 if (val >= MAXVAL)
1136 val = MAXVAL-1;
1137 return val & mask;
1138 }
1139
1140 static void
cmpci_set_mixer_gain(struct cmpci_softc * sc,int port)1141 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
1142 {
1143 int src;
1144 int bits, mask;
1145
1146 switch (port) {
1147 case CMPCI_MIC_VOL:
1148 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
1149 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1150 return;
1151 case CMPCI_MASTER_VOL:
1152 src = CMPCI_SB16_MIXER_MASTER_L;
1153 break;
1154 case CMPCI_LINE_IN_VOL:
1155 src = CMPCI_SB16_MIXER_LINE_L;
1156 break;
1157 case CMPCI_AUX_IN_VOL:
1158 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
1159 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
1160 sc->sc_gain[port][CMPCI_RIGHT]));
1161 return;
1162 case CMPCI_MIC_RECVOL:
1163 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
1164 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
1165 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1166 return;
1167 case CMPCI_DAC_VOL:
1168 src = CMPCI_SB16_MIXER_VOICE_L;
1169 break;
1170 case CMPCI_FM_VOL:
1171 src = CMPCI_SB16_MIXER_FM_L;
1172 break;
1173 case CMPCI_CD_VOL:
1174 src = CMPCI_SB16_MIXER_CDDA_L;
1175 break;
1176 case CMPCI_PCSPEAKER:
1177 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
1178 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1179 return;
1180 case CMPCI_MIC_PREAMP:
1181 if (sc->sc_gain[port][CMPCI_LR])
1182 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1183 CMPCI_REG_MICGAINZ);
1184 else
1185 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1186 CMPCI_REG_MICGAINZ);
1187 return;
1188
1189 case CMPCI_DAC_MUTE:
1190 if (sc->sc_gain[port][CMPCI_LR])
1191 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1192 CMPCI_REG_WSMUTE);
1193 else
1194 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1195 CMPCI_REG_WSMUTE);
1196 return;
1197 case CMPCI_FM_MUTE:
1198 if (sc->sc_gain[port][CMPCI_LR])
1199 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1200 CMPCI_REG_FMMUTE);
1201 else
1202 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1203 CMPCI_REG_FMMUTE);
1204 return;
1205 case CMPCI_AUX_IN_MUTE:
1206 if (sc->sc_gain[port][CMPCI_LR])
1207 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1208 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1209 else
1210 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1211 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1212 return;
1213 case CMPCI_CD_MUTE:
1214 mask = CMPCI_SB16_SW_CD;
1215 goto sbmute;
1216 case CMPCI_MIC_MUTE:
1217 mask = CMPCI_SB16_SW_MIC;
1218 goto sbmute;
1219 case CMPCI_LINE_IN_MUTE:
1220 mask = CMPCI_SB16_SW_LINE;
1221 sbmute:
1222 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
1223 if (sc->sc_gain[port][CMPCI_LR])
1224 bits = bits & ~mask;
1225 else
1226 bits = bits | mask;
1227 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
1228 return;
1229
1230 case CMPCI_SPDIF_IN_SELECT:
1231 case CMPCI_MONITOR_DAC:
1232 case CMPCI_PLAYBACK_MODE:
1233 case CMPCI_SPDIF_LOOP:
1234 case CMPCI_SPDIF_OUT_PLAYBACK:
1235 cmpci_set_out_ports(sc);
1236 return;
1237 case CMPCI_SPDIF_OUT_VOLTAGE:
1238 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
1239 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
1240 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
1241 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
1242 else
1243 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
1244 }
1245 return;
1246 case CMPCI_SURROUND:
1247 if (CMPCI_ISCAP(sc, SURROUND)) {
1248 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
1249 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1250 CMPCI_REG_SURROUND);
1251 else
1252 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1253 CMPCI_REG_SURROUND);
1254 }
1255 return;
1256 case CMPCI_REAR:
1257 if (CMPCI_ISCAP(sc, REAR)) {
1258 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1259 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
1260 else
1261 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
1262 }
1263 return;
1264 case CMPCI_INDIVIDUAL:
1265 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
1266 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1267 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1268 CMPCI_REG_INDIVIDUAL);
1269 else
1270 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1271 CMPCI_REG_INDIVIDUAL);
1272 }
1273 return;
1274 case CMPCI_REVERSE:
1275 if (CMPCI_ISCAP(sc, REVERSE_FR)) {
1276 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
1277 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1278 CMPCI_REG_REVERSE_FR);
1279 else
1280 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1281 CMPCI_REG_REVERSE_FR);
1282 }
1283 return;
1284 case CMPCI_SPDIF_IN_PHASE:
1285 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
1286 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
1287 == CMPCI_SPDIF_IN_PHASE_POSITIVE)
1288 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1289 CMPCI_REG_SPDIN_PHASE);
1290 else
1291 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1292 CMPCI_REG_SPDIN_PHASE);
1293 }
1294 return;
1295 default:
1296 return;
1297 }
1298
1299 cmpci_mixerreg_write(sc, src,
1300 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
1301 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
1302 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
1303 }
1304
1305 static void
cmpci_set_out_ports(struct cmpci_softc * sc)1306 cmpci_set_out_ports(struct cmpci_softc *sc)
1307 {
1308 uint8_t v;
1309 int enspdout;
1310
1311 if (!CMPCI_ISCAP(sc, SPDLOOP))
1312 return;
1313
1314 /* SPDIF/out select */
1315 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
1316 /* playback */
1317 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1318 } else {
1319 /* monitor SPDIF/in */
1320 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1321 }
1322
1323 /* SPDIF in select */
1324 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
1325 if (v & CMPCI_SPDIFIN_SPDIFIN2)
1326 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
1327 else
1328 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
1329 if (v & CMPCI_SPDIFIN_SPDIFOUT)
1330 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
1331 else
1332 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
1333
1334 enspdout = 0;
1335 /* playback to ... */
1336 if (CMPCI_ISCAP(sc, SPDOUT) &&
1337 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
1338 == CMPCI_PLAYBACK_MODE_SPDIF &&
1339 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
1340 (CMPCI_ISCAP(sc, SPDOUT_48K) &&
1341 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
1342 /* playback to SPDIF */
1343 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
1344 enspdout = 1;
1345 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
1346 cmpci_reg_set_reg_misc(sc,
1347 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1348 else
1349 cmpci_reg_clear_reg_misc(sc,
1350 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1351 } else {
1352 /* playback to DAC */
1353 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1354 CMPCI_REG_SPDIF0_ENABLE);
1355 if (CMPCI_ISCAP(sc, SPDOUT_48K))
1356 cmpci_reg_clear_reg_misc(sc,
1357 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1358 }
1359
1360 /* legacy to SPDIF/out or not */
1361 if (CMPCI_ISCAP(sc, SPDLEGACY)) {
1362 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
1363 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
1364 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1365 CMPCI_REG_LEGACY_SPDIF_ENABLE);
1366 else {
1367 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1368 CMPCI_REG_LEGACY_SPDIF_ENABLE);
1369 enspdout = 1;
1370 }
1371 }
1372
1373 /* enable/disable SPDIF/out */
1374 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
1375 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1376 CMPCI_REG_XSPDIF_ENABLE);
1377 else
1378 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1379 CMPCI_REG_XSPDIF_ENABLE);
1380
1381 /* SPDIF monitor (digital to analog output) */
1382 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
1383 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
1384 if (!(v & CMPCI_MONDAC_ENABLE))
1385 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1386 CMPCI_REG_SPDIN_MONITOR);
1387 if (v & CMPCI_MONDAC_SPDOUT)
1388 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
1389 CMPCI_REG_SPDIFOUT_DAC);
1390 else
1391 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1392 CMPCI_REG_SPDIFOUT_DAC);
1393 if (v & CMPCI_MONDAC_ENABLE)
1394 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1395 CMPCI_REG_SPDIN_MONITOR);
1396 }
1397 }
1398
1399 static int
cmpci_set_in_ports(struct cmpci_softc * sc)1400 cmpci_set_in_ports(struct cmpci_softc *sc)
1401 {
1402 int mask;
1403 int bitsl, bitsr;
1404
1405 mask = sc->sc_in_mask;
1406
1407 /*
1408 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
1409 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
1410 * of the mixer register.
1411 */
1412 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1413 CMPCI_RECORD_SOURCE_FM);
1414
1415 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
1416 if (mask & CMPCI_RECORD_SOURCE_MIC) {
1417 bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
1418 bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
1419 }
1420 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
1421 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
1422
1423 if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
1424 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1425 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1426 else
1427 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1428 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1429
1430 if (mask & CMPCI_RECORD_SOURCE_WAVE)
1431 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1432 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1433 else
1434 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1435 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1436
1437 if (CMPCI_ISCAP(sc, SPDIN) &&
1438 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
1439 (CMPCI_ISCAP(sc, SPDOUT_48K) &&
1440 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
1441 if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
1442 /* enable SPDIF/in */
1443 cmpci_reg_set_4(sc,
1444 CMPCI_REG_FUNC_1,
1445 CMPCI_REG_SPDIF1_ENABLE);
1446 } else {
1447 cmpci_reg_clear_4(sc,
1448 CMPCI_REG_FUNC_1,
1449 CMPCI_REG_SPDIF1_ENABLE);
1450 }
1451 }
1452
1453 return 0;
1454 }
1455
1456 static int
cmpci_set_port(void * handle,mixer_ctrl_t * cp)1457 cmpci_set_port(void *handle, mixer_ctrl_t *cp)
1458 {
1459 struct cmpci_softc *sc;
1460 int lgain, rgain;
1461
1462 sc = handle;
1463 switch (cp->dev) {
1464 case CMPCI_MIC_VOL:
1465 case CMPCI_PCSPEAKER:
1466 case CMPCI_MIC_RECVOL:
1467 if (cp->un.value.num_channels != 1)
1468 return EINVAL;
1469 /* FALLTHROUGH */
1470 case CMPCI_DAC_VOL:
1471 case CMPCI_FM_VOL:
1472 case CMPCI_CD_VOL:
1473 case CMPCI_LINE_IN_VOL:
1474 case CMPCI_AUX_IN_VOL:
1475 case CMPCI_MASTER_VOL:
1476 if (cp->type != AUDIO_MIXER_VALUE)
1477 return EINVAL;
1478 switch (cp->un.value.num_channels) {
1479 case 1:
1480 lgain = rgain =
1481 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
1482 break;
1483 case 2:
1484 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
1485 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
1486 break;
1487 default:
1488 return EINVAL;
1489 }
1490 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain;
1491 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
1492
1493 cmpci_set_mixer_gain(sc, cp->dev);
1494 break;
1495
1496 case CMPCI_RECORD_SOURCE:
1497 if (cp->type != AUDIO_MIXER_SET)
1498 return EINVAL;
1499
1500 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
1501 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1502 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
1503 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
1504 return EINVAL;
1505
1506 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
1507 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
1508
1509 sc->sc_in_mask = cp->un.mask;
1510 return cmpci_set_in_ports(sc);
1511
1512 /* boolean */
1513 case CMPCI_DAC_MUTE:
1514 case CMPCI_FM_MUTE:
1515 case CMPCI_CD_MUTE:
1516 case CMPCI_LINE_IN_MUTE:
1517 case CMPCI_AUX_IN_MUTE:
1518 case CMPCI_MIC_MUTE:
1519 case CMPCI_MIC_PREAMP:
1520 case CMPCI_PLAYBACK_MODE:
1521 case CMPCI_SPDIF_IN_PHASE:
1522 case CMPCI_SPDIF_LOOP:
1523 case CMPCI_SPDIF_OUT_PLAYBACK:
1524 case CMPCI_SPDIF_OUT_VOLTAGE:
1525 case CMPCI_REAR:
1526 case CMPCI_INDIVIDUAL:
1527 case CMPCI_REVERSE:
1528 case CMPCI_SURROUND:
1529 if (cp->type != AUDIO_MIXER_ENUM)
1530 return EINVAL;
1531 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
1532 cmpci_set_mixer_gain(sc, cp->dev);
1533 break;
1534
1535 case CMPCI_SPDIF_IN_SELECT:
1536 switch (cp->un.ord) {
1537 case CMPCI_SPDIF_IN_SPDIN1:
1538 case CMPCI_SPDIF_IN_SPDIN2:
1539 case CMPCI_SPDIF_IN_SPDOUT:
1540 break;
1541 default:
1542 return EINVAL;
1543 }
1544 goto xenum;
1545 case CMPCI_MONITOR_DAC:
1546 switch (cp->un.ord) {
1547 case CMPCI_MONITOR_DAC_OFF:
1548 case CMPCI_MONITOR_DAC_SPDIN:
1549 case CMPCI_MONITOR_DAC_SPDOUT:
1550 break;
1551 default:
1552 return EINVAL;
1553 }
1554 xenum:
1555 if (cp->type != AUDIO_MIXER_ENUM)
1556 return EINVAL;
1557 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
1558 cmpci_set_mixer_gain(sc, cp->dev);
1559 break;
1560
1561 default:
1562 return EINVAL;
1563 }
1564
1565 return 0;
1566 }
1567
1568 static int
cmpci_get_port(void * handle,mixer_ctrl_t * cp)1569 cmpci_get_port(void *handle, mixer_ctrl_t *cp)
1570 {
1571 struct cmpci_softc *sc;
1572
1573 sc = handle;
1574 switch (cp->dev) {
1575 case CMPCI_MIC_VOL:
1576 case CMPCI_PCSPEAKER:
1577 case CMPCI_MIC_RECVOL:
1578 if (cp->un.value.num_channels != 1)
1579 return EINVAL;
1580 /*FALLTHROUGH*/
1581 case CMPCI_DAC_VOL:
1582 case CMPCI_FM_VOL:
1583 case CMPCI_CD_VOL:
1584 case CMPCI_LINE_IN_VOL:
1585 case CMPCI_AUX_IN_VOL:
1586 case CMPCI_MASTER_VOL:
1587 switch (cp->un.value.num_channels) {
1588 case 1:
1589 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1590 sc->sc_gain[cp->dev][CMPCI_LEFT];
1591 break;
1592 case 2:
1593 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1594 sc->sc_gain[cp->dev][CMPCI_LEFT];
1595 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1596 sc->sc_gain[cp->dev][CMPCI_RIGHT];
1597 break;
1598 default:
1599 return EINVAL;
1600 }
1601 break;
1602
1603 case CMPCI_RECORD_SOURCE:
1604 cp->un.mask = sc->sc_in_mask;
1605 break;
1606
1607 case CMPCI_DAC_MUTE:
1608 case CMPCI_FM_MUTE:
1609 case CMPCI_CD_MUTE:
1610 case CMPCI_LINE_IN_MUTE:
1611 case CMPCI_AUX_IN_MUTE:
1612 case CMPCI_MIC_MUTE:
1613 case CMPCI_MIC_PREAMP:
1614 case CMPCI_PLAYBACK_MODE:
1615 case CMPCI_SPDIF_IN_SELECT:
1616 case CMPCI_SPDIF_IN_PHASE:
1617 case CMPCI_SPDIF_LOOP:
1618 case CMPCI_SPDIF_OUT_PLAYBACK:
1619 case CMPCI_SPDIF_OUT_VOLTAGE:
1620 case CMPCI_MONITOR_DAC:
1621 case CMPCI_REAR:
1622 case CMPCI_INDIVIDUAL:
1623 case CMPCI_REVERSE:
1624 case CMPCI_SURROUND:
1625 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
1626 break;
1627
1628 default:
1629 return EINVAL;
1630 }
1631
1632 return 0;
1633 }
1634
1635 /* ARGSUSED */
1636 static size_t
cmpci_round_buffersize(void * handle,int direction,size_t bufsize)1637 cmpci_round_buffersize(void *handle, int direction,
1638 size_t bufsize)
1639 {
1640
1641 if (bufsize > 0x10000)
1642 bufsize = 0x10000;
1643
1644 return bufsize;
1645 }
1646
1647 static paddr_t
cmpci_mappage(void * handle,void * addr,off_t offset,int prot)1648 cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
1649 {
1650 struct cmpci_dmanode *p;
1651
1652 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr)))
1653 return -1;
1654
1655 return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
1656 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
1657 offset, prot, BUS_DMA_WAITOK);
1658 }
1659
1660 /* ARGSUSED */
1661 static int
cmpci_get_props(void * handle)1662 cmpci_get_props(void *handle)
1663 {
1664
1665 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1666 }
1667
1668 static int
cmpci_trigger_output(void * handle,void * start,void * end,int blksize,void (* intr)(void *),void * arg,const audio_params_t * param)1669 cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
1670 void (*intr)(void *), void *arg,
1671 const audio_params_t *param)
1672 {
1673 struct cmpci_softc *sc;
1674 struct cmpci_dmanode *p;
1675 int bps;
1676
1677 sc = handle;
1678 sc->sc_play.intr = intr;
1679 sc->sc_play.intr_arg = arg;
1680 bps = param->channels * param->precision / 8;
1681 if (!bps)
1682 return EINVAL;
1683
1684 /* set DMA frame */
1685 if (!(p = cmpci_find_dmamem(sc, start)))
1686 return EINVAL;
1687 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
1688 DMAADDR(p));
1689 delay(10);
1690 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
1691 ((char *)end - (char *)start + 1) / bps - 1);
1692 delay(10);
1693
1694 /* set interrupt count */
1695 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
1696 (blksize + bps - 1) / bps - 1);
1697 delay(10);
1698
1699 /* start DMA */
1700 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
1701 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
1702 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
1703
1704 return 0;
1705 }
1706
1707 static int
cmpci_trigger_input(void * handle,void * start,void * end,int blksize,void (* intr)(void *),void * arg,const audio_params_t * param)1708 cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
1709 void (*intr)(void *), void *arg,
1710 const audio_params_t *param)
1711 {
1712 struct cmpci_softc *sc;
1713 struct cmpci_dmanode *p;
1714 int bps;
1715
1716 sc = handle;
1717 sc->sc_rec.intr = intr;
1718 sc->sc_rec.intr_arg = arg;
1719 bps = param->channels * param->precision / 8;
1720 if (!bps)
1721 return EINVAL;
1722
1723 /* set DMA frame */
1724 if (!(p=cmpci_find_dmamem(sc, start)))
1725 return EINVAL;
1726 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
1727 DMAADDR(p));
1728 delay(10);
1729 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
1730 ((char *)end - (char *)start + 1) / bps - 1);
1731 delay(10);
1732
1733 /* set interrupt count */
1734 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
1735 (blksize + bps - 1) / bps - 1);
1736 delay(10);
1737
1738 /* start DMA */
1739 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
1740 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
1741 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
1742
1743 return 0;
1744 }
1745
1746 static void
cmpci_get_locks(void * addr,kmutex_t ** intr,kmutex_t ** thread)1747 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
1748 {
1749 struct cmpci_softc *sc;
1750
1751 sc = addr;
1752 *intr = &sc->sc_intr_lock;
1753 *thread = &sc->sc_lock;
1754 }
1755
1756 /* end of file */
1757