1 /*
2 * Copyright 2013 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Christian König <christian.koenig@amd.com>
23 */
24
25 #include "radeon.h"
26 #include "radeon_asic.h"
27 #include "nid.h"
28
29 /**
30 * uvd_v3_1_semaphore_emit - emit semaphore command
31 *
32 * @rdev: radeon_device pointer
33 * @ring: radeon_ring pointer
34 * @semaphore: semaphore to emit commands for
35 * @emit_wait: true if we should emit a wait command
36 *
37 * Emit a semaphore command (either wait or signal) to the UVD ring.
38 */
uvd_v3_1_semaphore_emit(struct radeon_device * rdev,struct radeon_ring * ring,struct radeon_semaphore * semaphore,bool emit_wait)39 bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev,
40 struct radeon_ring *ring,
41 struct radeon_semaphore *semaphore,
42 bool emit_wait)
43 {
44 uint64_t addr = semaphore->gpu_addr;
45
46 radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0));
47 radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
48
49 radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0));
50 radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
51
52 radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0));
53 radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0));
54
55 return true;
56 }
57