1 /* 2 * This definitions of the PIC16F1518 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:07 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic16f1518.h> 26 27 //============================================================================== 28 29 __at(0x0000) __sfr INDF0; 30 31 __at(0x0001) __sfr INDF1; 32 33 __at(0x0002) __sfr PCL; 34 35 __at(0x0003) __sfr STATUS; 36 __at(0x0003) volatile __STATUSbits_t STATUSbits; 37 38 __at(0x0004) __sfr FSR0; 39 40 __at(0x0004) __sfr FSR0L; 41 42 __at(0x0005) __sfr FSR0H; 43 44 __at(0x0006) __sfr FSR1; 45 46 __at(0x0006) __sfr FSR1L; 47 48 __at(0x0007) __sfr FSR1H; 49 50 __at(0x0008) __sfr BSR; 51 __at(0x0008) volatile __BSRbits_t BSRbits; 52 53 __at(0x0009) __sfr WREG; 54 55 __at(0x000A) __sfr PCLATH; 56 57 __at(0x000B) __sfr INTCON; 58 __at(0x000B) volatile __INTCONbits_t INTCONbits; 59 60 __at(0x000C) __sfr PORTA; 61 __at(0x000C) volatile __PORTAbits_t PORTAbits; 62 63 __at(0x000D) __sfr PORTB; 64 __at(0x000D) volatile __PORTBbits_t PORTBbits; 65 66 __at(0x000E) __sfr PORTC; 67 __at(0x000E) volatile __PORTCbits_t PORTCbits; 68 69 __at(0x0010) __sfr PORTE; 70 __at(0x0010) volatile __PORTEbits_t PORTEbits; 71 72 __at(0x0011) __sfr PIR1; 73 __at(0x0011) volatile __PIR1bits_t PIR1bits; 74 75 __at(0x0012) __sfr PIR2; 76 __at(0x0012) volatile __PIR2bits_t PIR2bits; 77 78 __at(0x0015) __sfr TMR0; 79 80 __at(0x0016) __sfr TMR1; 81 82 __at(0x0016) __sfr TMR1L; 83 84 __at(0x0017) __sfr TMR1H; 85 86 __at(0x0018) __sfr T1CON; 87 __at(0x0018) volatile __T1CONbits_t T1CONbits; 88 89 __at(0x0019) __sfr T1GCON; 90 __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 91 92 __at(0x001A) __sfr TMR2; 93 94 __at(0x001B) __sfr PR2; 95 96 __at(0x001C) __sfr T2CON; 97 __at(0x001C) volatile __T2CONbits_t T2CONbits; 98 99 __at(0x008C) __sfr TRISA; 100 __at(0x008C) volatile __TRISAbits_t TRISAbits; 101 102 __at(0x008D) __sfr TRISB; 103 __at(0x008D) volatile __TRISBbits_t TRISBbits; 104 105 __at(0x008E) __sfr TRISC; 106 __at(0x008E) volatile __TRISCbits_t TRISCbits; 107 108 __at(0x0090) __sfr TRISE; 109 110 __at(0x0091) __sfr PIE1; 111 __at(0x0091) volatile __PIE1bits_t PIE1bits; 112 113 __at(0x0092) __sfr PIE2; 114 __at(0x0092) volatile __PIE2bits_t PIE2bits; 115 116 __at(0x0095) __sfr OPTION_REG; 117 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 118 119 __at(0x0096) __sfr PCON; 120 __at(0x0096) volatile __PCONbits_t PCONbits; 121 122 __at(0x0097) __sfr WDTCON; 123 __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 124 125 __at(0x0099) __sfr OSCCON; 126 __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 127 128 __at(0x009A) __sfr OSCSTAT; 129 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 130 131 __at(0x009B) __sfr ADRES; 132 133 __at(0x009B) __sfr ADRESL; 134 135 __at(0x009C) __sfr ADRESH; 136 137 __at(0x009D) __sfr ADCON0; 138 __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 139 140 __at(0x009E) __sfr ADCON1; 141 __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 142 143 __at(0x010C) __sfr LATA; 144 __at(0x010C) volatile __LATAbits_t LATAbits; 145 146 __at(0x010D) __sfr LATB; 147 __at(0x010D) volatile __LATBbits_t LATBbits; 148 149 __at(0x010E) __sfr LATC; 150 __at(0x010E) volatile __LATCbits_t LATCbits; 151 152 __at(0x0116) __sfr BORCON; 153 __at(0x0116) volatile __BORCONbits_t BORCONbits; 154 155 __at(0x0117) __sfr FVRCON; 156 __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 157 158 __at(0x011D) __sfr APFCON; 159 __at(0x011D) volatile __APFCONbits_t APFCONbits; 160 161 __at(0x018C) __sfr ANSELA; 162 __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 163 164 __at(0x018D) __sfr ANSELB; 165 __at(0x018D) volatile __ANSELBbits_t ANSELBbits; 166 167 __at(0x018E) __sfr ANSELC; 168 __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 169 170 __at(0x0191) __sfr PMADR; 171 172 __at(0x0191) __sfr PMADRL; 173 174 __at(0x0192) __sfr PMADRH; 175 176 __at(0x0193) __sfr PMDAT; 177 178 __at(0x0193) __sfr PMDATL; 179 180 __at(0x0194) __sfr PMDATH; 181 182 __at(0x0195) __sfr PMCON1; 183 __at(0x0195) volatile __PMCON1bits_t PMCON1bits; 184 185 __at(0x0196) __sfr PMCON2; 186 187 __at(0x0197) __sfr VREGCON; 188 __at(0x0197) volatile __VREGCONbits_t VREGCONbits; 189 190 __at(0x0199) __sfr RCREG; 191 192 __at(0x019A) __sfr TXREG; 193 194 __at(0x019B) __sfr SP1BRG; 195 196 __at(0x019B) __sfr SP1BRGL; 197 198 __at(0x019B) __sfr SPBRG; 199 200 __at(0x019B) __sfr SPBRGL; 201 202 __at(0x019C) __sfr SP1BRGH; 203 204 __at(0x019C) __sfr SPBRGH; 205 206 __at(0x019D) __sfr RCSTA; 207 __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 208 209 __at(0x019E) __sfr TXSTA; 210 __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 211 212 __at(0x019F) __sfr BAUDCON; 213 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 214 215 __at(0x020D) __sfr WPUB; 216 __at(0x020D) volatile __WPUBbits_t WPUBbits; 217 218 __at(0x0210) __sfr WPUE; 219 __at(0x0210) volatile __WPUEbits_t WPUEbits; 220 221 __at(0x0211) __sfr SSP1BUF; 222 223 __at(0x0211) __sfr SSPBUF; 224 225 __at(0x0212) __sfr SSP1ADD; 226 227 __at(0x0212) __sfr SSPADD; 228 229 __at(0x0213) __sfr SSP1MSK; 230 231 __at(0x0213) __sfr SSPMSK; 232 233 __at(0x0214) __sfr SSP1STAT; 234 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 235 236 __at(0x0214) __sfr SSPSTAT; 237 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 238 239 __at(0x0215) __sfr SSP1CON1; 240 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 241 242 __at(0x0215) __sfr SSPCON; 243 __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 244 245 __at(0x0215) __sfr SSPCON1; 246 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 247 248 __at(0x0216) __sfr SSP1CON2; 249 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 250 251 __at(0x0216) __sfr SSPCON2; 252 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 253 254 __at(0x0217) __sfr SSP1CON3; 255 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 256 257 __at(0x0217) __sfr SSPCON3; 258 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 259 260 __at(0x0291) __sfr CCPR1; 261 262 __at(0x0291) __sfr CCPR1L; 263 264 __at(0x0292) __sfr CCPR1H; 265 266 __at(0x0293) __sfr CCP1CON; 267 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 268 269 __at(0x0298) __sfr CCPR2; 270 271 __at(0x0298) __sfr CCPR2L; 272 273 __at(0x0299) __sfr CCPR2H; 274 275 __at(0x029A) __sfr CCP2CON; 276 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits; 277 278 __at(0x0394) __sfr IOCBP; 279 __at(0x0394) volatile __IOCBPbits_t IOCBPbits; 280 281 __at(0x0395) __sfr IOCBN; 282 __at(0x0395) volatile __IOCBNbits_t IOCBNbits; 283 284 __at(0x0396) __sfr IOCBF; 285 __at(0x0396) volatile __IOCBFbits_t IOCBFbits; 286 287 __at(0x0FE4) __sfr STATUS_SHAD; 288 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 289 290 __at(0x0FE5) __sfr WREG_SHAD; 291 292 __at(0x0FE6) __sfr BSR_SHAD; 293 294 __at(0x0FE7) __sfr PCLATH_SHAD; 295 296 __at(0x0FE8) __sfr FSR0L_SHAD; 297 298 __at(0x0FE9) __sfr FSR0H_SHAD; 299 300 __at(0x0FEA) __sfr FSR1L_SHAD; 301 302 __at(0x0FEB) __sfr FSR1H_SHAD; 303 304 __at(0x0FED) __sfr STKPTR; 305 306 __at(0x0FEE) __sfr TOSL; 307 308 __at(0x0FEF) __sfr TOSH; 309