1 /* $NetBSD: pxreg.h,v 1.8 2000/06/13 13:39:12 ad Exp $ */ 2 3 #ifndef _PMAX_DEV_PXREG_H_ 4 #define _PMAX_DEV_PXREG_H_ 5 6 /*- 7 * Copyright (c) 1999 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by Andrew Doran. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * Definitions for the PixelStamp on Digital's 2D and 3D TurboChannel 44 * graphics accelerators. Stamp command packets take this general format: 45 * 46 * command word 47 * 48 * per-packet context (optional): 49 * line width 50 * xy mask 51 * cliping rectangle min & max 52 * rgb constant 53 * z constant 54 * 55 * per-primitive context (optional): 56 * xy mask 57 * xy mask address 58 * primitive data (vertices, spans info, video) 59 * line width 60 * halfspace equals conditions 61 * rgb flat, or rgb{1,2,3} smooth 62 * z flat, or z{1,2,3} smooth 63 */ 64 65 /* 66 * These definitions are for the stamp command word, the first in 67 * each packet. This is a 32-bit word on all architectures. 68 */ 69 70 /* opcode type */ 71 #define STAMP_CMD_POINTS (0x0000) 72 #define STAMP_CMD_LINES (0x0001) 73 #define STAMP_CMD_TRIANGLES (0x0002) 74 #define STAMP_CMD_COPYSPANS (0x0005) 75 #define STAMP_CMD_READSPANS (0x0006) 76 #define STAMP_CMD_WRITESPANS (0x0007) 77 #define STAMP_CMD_VIDEO (0x0008) 78 79 /* RGB format */ 80 #define STAMP_RGB_NONE (0x0000) 81 #define STAMP_RGB_CONST (0x0010) 82 #define STAMP_RGB_FLAT (0x0020) 83 #define STAMP_RGB_SMOOTH (0x0030) 84 85 /* Z format */ 86 #define STAMP_Z_NONE (0x0000) 87 #define STAMP_Z_CONST (0x0040) 88 #define STAMP_Z_FLAT (0x0080) 89 #define STAMP_Z_SMOOTH (0x00c0) 90 91 /* XY mask format */ 92 #define STAMP_XY_NONE (0x0000) 93 #define STAMP_XY_PERPACKET (0x0100) 94 #define STAMP_XY_PERPRIMATIVE (0x0200) 95 96 /* line width format */ 97 #define STAMP_LW_NONE (0x0000) 98 #define STAMP_LW_PERPACKET (0x0400) 99 #define STAMP_LW_PERPRIMATIVE (0x0800) 100 101 /* misc. */ 102 #define STAMP_CLIPRECT (0x00080000) 103 #define STAMP_MESH (0x00200000) 104 #define STAMP_AALINE (0x00800000) 105 #define STAMP_HS_EQUALS (0x80000000) 106 107 /* 108 * These definitions are for the stamp update word, also part of 109 * each packet. 110 */ 111 112 /* plane */ 113 #define STAMP_PLANE_8X3 (0 << 5) 114 #define STAMP_PLANE_24 (1 << 5) 115 116 /* when to write enable the stamp */ 117 #define STAMP_WE_SIGN (0x04 << 8) 118 #define STAMP_WE_XYMASK (0x02 << 8) 119 #define STAMP_WE_CLIPRECT (0x01 << 8) 120 #define STAMP_WE_NONE (0x00 << 8) 121 122 /* update method */ 123 #define STAMP_METHOD_CLEAR (0x60 << 12) 124 #define STAMP_METHOD_AND (0x14 << 12) 125 #define STAMP_METHOD_ANDREV (0x15 << 12) 126 #define STAMP_METHOD_COPY (0x20 << 12) 127 #define STAMP_METHOD_ANDINV (0x16 << 12) 128 #define STAMP_METHOD_NOOP (0x40 << 12) 129 #define STAMP_METHOD_XOR (0x11 << 12) 130 #define STAMP_METHOD_OR (0x0f << 12) 131 #define STAMP_METHOD_NOR (0x17 << 12) 132 #define STAMP_METHOD_EQUIV (0x10 << 12) 133 #define STAMP_METHOD_INV (0x4e << 12) 134 #define STAMP_METHOD_ORREV (0x0e << 12) 135 #define STAMP_METHOD_COPYINV (0x2d << 12) 136 #define STAMP_METHOD_ORINV (0x0d << 12) 137 #define STAMP_METHOD_NAND (0x0c << 12) 138 #define STAMP_METHOD_SET (0x6c << 12) 139 #define STAMP_METHOD_SUM (0x00 << 12) 140 #define STAMP_METHOD_DIFF (0x02 << 12) 141 #define STAMP_METHOD_REVDIFF (0x01 << 12) 142 143 /* double buffering */ 144 #define STAMP_DB_NONE (0x00 << 28) 145 #define STAMP_DB_01 (0x01 << 28) 146 #define STAMP_DB_12 (0x02 << 28) 147 #define STAMP_DB_02 (0x04 << 28) 148 149 /* misc */ 150 #define STAMP_UPDATE_ENABLE (1) 151 #define STAMP_SAVE_SIGN (1<<6) 152 #define STAMP_SAVE_ALPHA (1<<7) 153 #define STAMP_SUPERSAMPLE (1<<11) 154 #define STAMP_SPAN (1<<19) 155 #define STAMP_COPYSPAN_ALIGNED (1<<20) 156 #define STAMP_MINMAX (1<<21) 157 #define STAMP_MULT (1<<22) 158 #define STAMP_MULTACC (1<<23) 159 #define STAMP_HALF_BUFF (1<27) 160 #define STAMP_INITIALIZE (1<<31) 161 162 #ifdef _KERNEL 163 #define STAMP_WIDTH (pxi->pxi_stampw) 164 #define STAMP_HEIGHT (pxi->pxi_stamph) 165 #endif 166 167 #define XMASKADDR(__sx, __a) (((__a)-((__sx) % STAMP_WIDTH)) & 0xF) 168 #define YMASKADDR(__sy, __b) (((__b)-((__sy) % STAMP_HEIGHT)) & 0xF) 169 #define XYMASKADDR(_x,_y,_a,_b) (XMASKADDR(_x,_a) << 16 | YMASKADDR(_y,_b)) 170 171 /* 172 * For the poll register. Don't mess with the # of retries or the delay 173 * unless you know what you're doing. According to OSF header files, 174 * the delay on Alpha is 20us, and the # of retries should be 4000. This is 175 * inadequate, particularly on the PXG which seems to run at a higher 176 * frequency. The STIC gets wedged while scrolling quite a lot. 177 */ 178 #define STAMP_OK (0) 179 #define STAMP_BUSY (1) 180 #define STAMP_RETRIES (7000) 181 #define STAMP_DELAY (20) 182 183 #if 0 /* was: #ifdef alpha in NetBSD */ 184 #define __PXS(n) ((n) << 1) 185 #else 186 #define __PXS(n) (n) 187 #endif 188 189 /* 190 * Hardware offsets within PX board's TC slot. 191 */ 192 #define PX_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ 193 #define PX_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ 194 #define PX_STIC_OFFSET __PXS(0x180000) /* STIC registers */ 195 #define PX_VDAC_OFFSET __PXS(0x200000) /* VDAC registers (bt459) */ 196 #define PX_VDAC_RESET_OFFSET __PXS(0x300000) /* VDAC reset register */ 197 #define PX_ROM_OFFSET __PXS(0x300000) /* ROM code */ 198 199 /* 200 * Hardware offsets within PXG board's TC slot. 201 */ 202 #define PXG_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ 203 #define PXG_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ 204 #define PXG_STIC_OFFSET __PXS(0x180000) /* STIC registers */ 205 #define PXG_SRAM_OFFSET __PXS(0x200000) /* N10 SRAM */ 206 #define PXG_HOST_INTR_OFFSET __PXS(0x280000) /* N10 host interrupt */ 207 #define PXG_COPROC_INTR_OFFSET __PXS(0x2c0000) /* N10 coprocessor interrupt */ 208 #define PXG_VDAC_OFFSET __PXS(0x300000) /* VDAC registers (bt459) */ 209 #define PXG_VDAC_RESET_OFFSET __PXS(0x340000) /* VDAC reset register */ 210 #define PXG_ROM_OFFSET __PXS(0x380000) /* ROM code */ 211 #define PXG_N10_START_OFFSET __PXS(0x380000) /* N10 start register */ 212 #define PXG_N10_RESET_OFFSET __PXS(0x3c0000) /* N10 reset (stop?) register */ 213 214 /* 215 * STIC registers 216 */ 217 struct stic_regs { 218 #if 0 /* was: ifdef __alpha in NetBSD */ 219 volatile int32_t __pad0; 220 volatile int32_t __pad1; 221 volatile int32_t __pad2; 222 volatile int32_t __pad3; 223 volatile int32_t hsync; 224 volatile int32_t __pad4; 225 volatile int32_t hsync2; 226 volatile int32_t __pad5; 227 volatile int32_t hblank; 228 volatile int32_t __pad6; 229 volatile int32_t vsync; 230 volatile int32_t __pad7; 231 volatile int32_t vblank; 232 volatile int32_t __pad8; 233 volatile int32_t vtest; 234 volatile int32_t __pad9; 235 volatile int32_t ipdvint; 236 volatile int32_t __pad10; 237 volatile int32_t __pad11; 238 volatile int32_t __pad12; 239 volatile int32_t sticsr; 240 volatile int32_t __pad13; 241 volatile int32_t busdat; 242 volatile int32_t __pad14; 243 volatile int32_t busadr; 244 volatile int32_t __pad15; 245 volatile int32_t __pad16; 246 volatile int32_t __pad17; 247 volatile int32_t buscsr; 248 volatile int32_t __pad18; 249 volatile int32_t modcl; 250 volatile int32_t __pad19; 251 #else /* __alpha */ 252 volatile int32_t __pad0; 253 volatile int32_t __pad1; 254 volatile int32_t hsync; 255 volatile int32_t hsync2; 256 volatile int32_t hblank; 257 volatile int32_t vsync; 258 volatile int32_t vblank; 259 volatile int32_t vtest; 260 volatile int32_t ipdvint; 261 volatile int32_t __pad2; 262 volatile int32_t sticsr; 263 volatile int32_t busdat; 264 volatile int32_t busadr; 265 volatile int32_t __pad3; 266 volatile int32_t buscsr; 267 volatile int32_t modcl; 268 #endif /* __alpha */ 269 }; 270 271 /* 272 * Bit definitions for px_stic_regs.stic_csr. 273 * these appear to exactly what the PROM tests use. 274 */ 275 #define STIC_CSR_TSTFNC 0x00000003 276 # define STIC_CSR_TSTFNC_NORMAL 0 277 # define STIC_CSR_TSTFNC_PARITY 1 278 # define STIC_CSR_TSTFNC_CNTPIX 2 279 # define STIC_CSR_TSTFNC_TSTDAC 3 280 #define STIC_CSR_CHECKPAR 0x00000004 281 #define STIC_CSR_STARTVT 0x00000010 282 #define STIC_CSR_START 0x00000020 283 #define STIC_CSR_RESET 0x00000040 284 #define STIC_CSR_STARTST 0x00000080 285 286 /* 287 * Bit definitions for stic_regs.int. 288 * Three four-bit wide fields, for error (E), vertical-blank (V), and 289 * packetbuf-done (P) intererupts, respectively. 290 * The low-order three bits of each field are enable, requested, 291 * and acknowledge bits. The top bit of each field is unused. 292 */ 293 #define STIC_INT_E_EN 0x00000001 294 #define STIC_INT_E 0x00000002 295 #define STIC_INT_E_WE 0x00000004 296 297 #define STIC_INT_V_EN 0x00000100 298 #define STIC_INT_V 0x00000200 299 #define STIC_INT_V_WE 0x00000400 300 301 #define STIC_INT_P_EN 0x00010000 302 #define STIC_INT_P 0x00020000 303 #define STIC_INT_P_WE 0x00040000 304 305 #define STIC_INT_E_MASK (STIC_INT_E_EN | STIC_INT_E | STIC_INT_E_WE) 306 #define STIC_INT_V_MASK (STIC_INT_V_EN | STIC_INT_V | STIC_INT_V_WE) 307 #define STIC_INT_P_MASK (STIC_INT_P_EN | STIC_INT_P | STIC_INT_P_WE) 308 #define STIC_INT_MASK (STIC_INT_E_MASK | STIC_INT_P_MASK | STIC_INT_V_MASK) 309 310 #define STIC_INT_WE (STIC_INT_E_WE | STIC_INT_V_WE | STIC_INT_P_WE) 311 #define STIC_INT_CLR (STIC_INT_E_EN | STIC_INT_V_EN | STIC_INT_P_EN) 312 313 /* 314 * Convert a system physical address to STIC poll offset. Polling the offset 315 * returned will initiate DMA at the provided address. For the PX, the STIC 316 * only sees 23-bits (8MB) of address space. Also, bits 21-22 in physical 317 * address space map to bits 27-28 in the STIC's warped view of the world. 318 * This is also true for bits 15-20, which map to bits 18-23. Bits 0 and 1 319 * are meaningless, because everything is word aligned. 320 * 321 * The final shift-right-by-9 is to map the address to poll register offset. 322 * These begin at px_softc.poll (which should obviously be added to the 323 * return value of this function to get a vaild poll address). 324 * 325 * This shift right gives us a granularity of 512 bytes when DMAing. The 326 * holes in STIC address space mean that DMAs can never cross a 32kB 327 * boundary. The maximum size for a DMA AFAIK is about 4kB. 328 * 329 * For the PXG, the PA is relative to SRAM (i.e. i860) address space, not 330 * system address space. The poll address will either return STAMP_OK, or 331 * STAMP_BUSY. 332 */ 333 334 #if 0 335 static __inline__ u_long px_sys2stic __P((void *)); 336 static __inline__ u_long px_sys2dma __P((void *)); 337 static __inline__ volatile int32_t *px_poll_addr __P((caddr_t, void *)); 338 339 static __inline__ u_long 340 px_sys2stic(addr) 341 void *addr; 342 { 343 u_long v; 344 345 v = (u_long)addr; 346 v = ((v & ~0x7fff) << 3) | (v & 0x7fff); 347 return (v & 0x1ffff800); 348 } 349 350 static __inline__ u_long 351 px_sys2dma(addr) 352 void *addr; 353 { 354 355 return px_sys2stic(addr) >> 9; 356 } 357 358 /* 359 * This is simply a wrapper for the above that returns a proper VA to 360 * poll when given a px_softc. 361 */ 362 static __inline__ volatile int32_t * 363 px_poll_addr(slotbase, addr) 364 caddr_t slotbase; 365 void *addr; 366 { 367 368 return (volatile int32_t *)(slotbase + px_sys2dma(addr)); 369 } 370 #endif 371 372 #endif /* !_PMAX_DEV_PXREG_H_ */ 373