1 /* 2 * This declarations of the PIC12F1840 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:21 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC12F1840_H__ 26 #define __PIC12F1840_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF0_ADDR 0x0000 37 #define INDF1_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR0_ADDR 0x0004 41 #define FSR0L_ADDR 0x0004 42 #define FSR0H_ADDR 0x0005 43 #define FSR1_ADDR 0x0006 44 #define FSR1L_ADDR 0x0006 45 #define FSR1H_ADDR 0x0007 46 #define BSR_ADDR 0x0008 47 #define WREG_ADDR 0x0009 48 #define PCLATH_ADDR 0x000A 49 #define INTCON_ADDR 0x000B 50 #define PORTA_ADDR 0x000C 51 #define PIR1_ADDR 0x0011 52 #define PIR2_ADDR 0x0012 53 #define TMR0_ADDR 0x0015 54 #define TMR1_ADDR 0x0016 55 #define TMR1L_ADDR 0x0016 56 #define TMR1H_ADDR 0x0017 57 #define T1CON_ADDR 0x0018 58 #define T1GCON_ADDR 0x0019 59 #define TMR2_ADDR 0x001A 60 #define PR2_ADDR 0x001B 61 #define T2CON_ADDR 0x001C 62 #define CPSCON0_ADDR 0x001E 63 #define CPSCON1_ADDR 0x001F 64 #define TRISA_ADDR 0x008C 65 #define PIE1_ADDR 0x0091 66 #define PIE2_ADDR 0x0092 67 #define OPTION_REG_ADDR 0x0095 68 #define PCON_ADDR 0x0096 69 #define WDTCON_ADDR 0x0097 70 #define OSCTUNE_ADDR 0x0098 71 #define OSCCON_ADDR 0x0099 72 #define OSCSTAT_ADDR 0x009A 73 #define ADRES_ADDR 0x009B 74 #define ADRESL_ADDR 0x009B 75 #define ADRESH_ADDR 0x009C 76 #define ADCON0_ADDR 0x009D 77 #define ADCON1_ADDR 0x009E 78 #define LATA_ADDR 0x010C 79 #define CM1CON0_ADDR 0x0111 80 #define CM1CON1_ADDR 0x0112 81 #define CMOUT_ADDR 0x0115 82 #define BORCON_ADDR 0x0116 83 #define FVRCON_ADDR 0x0117 84 #define DACCON0_ADDR 0x0118 85 #define DACCON1_ADDR 0x0119 86 #define SRCON0_ADDR 0x011A 87 #define SRCON1_ADDR 0x011B 88 #define APFCON_ADDR 0x011D 89 #define APFCON0_ADDR 0x011D 90 #define ANSELA_ADDR 0x018C 91 #define EEADR_ADDR 0x0191 92 #define EEADRL_ADDR 0x0191 93 #define EEADRH_ADDR 0x0192 94 #define EEDAT_ADDR 0x0193 95 #define EEDATL_ADDR 0x0193 96 #define EEDATH_ADDR 0x0194 97 #define EECON1_ADDR 0x0195 98 #define EECON2_ADDR 0x0196 99 #define VREGCON_ADDR 0x0197 100 #define RCREG_ADDR 0x0199 101 #define TXREG_ADDR 0x019A 102 #define SP1BRG_ADDR 0x019B 103 #define SP1BRGL_ADDR 0x019B 104 #define SPBRG_ADDR 0x019B 105 #define SPBRGL_ADDR 0x019B 106 #define SP1BRGH_ADDR 0x019C 107 #define SPBRGH_ADDR 0x019C 108 #define RCSTA_ADDR 0x019D 109 #define TXSTA_ADDR 0x019E 110 #define BAUDCON_ADDR 0x019F 111 #define WPUA_ADDR 0x020C 112 #define SSP1BUF_ADDR 0x0211 113 #define SSPBUF_ADDR 0x0211 114 #define SSP1ADD_ADDR 0x0212 115 #define SSPADD_ADDR 0x0212 116 #define SSP1MSK_ADDR 0x0213 117 #define SSPMSK_ADDR 0x0213 118 #define SSP1STAT_ADDR 0x0214 119 #define SSPSTAT_ADDR 0x0214 120 #define SSP1CON1_ADDR 0x0215 121 #define SSPCON_ADDR 0x0215 122 #define SSPCON1_ADDR 0x0215 123 #define SSP1CON2_ADDR 0x0216 124 #define SSPCON2_ADDR 0x0216 125 #define SSP1CON3_ADDR 0x0217 126 #define SSPCON3_ADDR 0x0217 127 #define CCPR1_ADDR 0x0291 128 #define CCPR1L_ADDR 0x0291 129 #define CCPR1H_ADDR 0x0292 130 #define CCP1CON_ADDR 0x0293 131 #define PWM1CON_ADDR 0x0294 132 #define CCP1AS_ADDR 0x0295 133 #define ECCP1AS_ADDR 0x0295 134 #define PSTR1CON_ADDR 0x0296 135 #define IOCAP_ADDR 0x0391 136 #define IOCAN_ADDR 0x0392 137 #define IOCAF_ADDR 0x0393 138 #define CLKRCON_ADDR 0x039A 139 #define MDCON_ADDR 0x039C 140 #define MDSRC_ADDR 0x039D 141 #define MDCARL_ADDR 0x039E 142 #define MDCARH_ADDR 0x039F 143 #define STATUS_SHAD_ADDR 0x0FE4 144 #define WREG_SHAD_ADDR 0x0FE5 145 #define BSR_SHAD_ADDR 0x0FE6 146 #define PCLATH_SHAD_ADDR 0x0FE7 147 #define FSR0L_SHAD_ADDR 0x0FE8 148 #define FSR0H_SHAD_ADDR 0x0FE9 149 #define FSR1L_SHAD_ADDR 0x0FEA 150 #define FSR1H_SHAD_ADDR 0x0FEB 151 #define STKPTR_ADDR 0x0FED 152 #define TOSL_ADDR 0x0FEE 153 #define TOSH_ADDR 0x0FEF 154 155 #endif // #ifndef NO_ADDR_DEFINES 156 157 //============================================================================== 158 // 159 // Register Definitions 160 // 161 //============================================================================== 162 163 extern __at(0x0000) __sfr INDF0; 164 extern __at(0x0001) __sfr INDF1; 165 extern __at(0x0002) __sfr PCL; 166 167 //============================================================================== 168 // STATUS Bits 169 170 extern __at(0x0003) __sfr STATUS; 171 172 typedef struct 173 { 174 unsigned C : 1; 175 unsigned DC : 1; 176 unsigned Z : 1; 177 unsigned NOT_PD : 1; 178 unsigned NOT_TO : 1; 179 unsigned : 1; 180 unsigned : 1; 181 unsigned : 1; 182 } __STATUSbits_t; 183 184 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 185 186 #define _C 0x01 187 #define _DC 0x02 188 #define _Z 0x04 189 #define _NOT_PD 0x08 190 #define _NOT_TO 0x10 191 192 //============================================================================== 193 194 extern __at(0x0004) __sfr FSR0; 195 extern __at(0x0004) __sfr FSR0L; 196 extern __at(0x0005) __sfr FSR0H; 197 extern __at(0x0006) __sfr FSR1; 198 extern __at(0x0006) __sfr FSR1L; 199 extern __at(0x0007) __sfr FSR1H; 200 201 //============================================================================== 202 // BSR Bits 203 204 extern __at(0x0008) __sfr BSR; 205 206 typedef union 207 { 208 struct 209 { 210 unsigned BSR0 : 1; 211 unsigned BSR1 : 1; 212 unsigned BSR2 : 1; 213 unsigned BSR3 : 1; 214 unsigned BSR4 : 1; 215 unsigned : 1; 216 unsigned : 1; 217 unsigned : 1; 218 }; 219 220 struct 221 { 222 unsigned BSR : 5; 223 unsigned : 3; 224 }; 225 } __BSRbits_t; 226 227 extern __at(0x0008) volatile __BSRbits_t BSRbits; 228 229 #define _BSR0 0x01 230 #define _BSR1 0x02 231 #define _BSR2 0x04 232 #define _BSR3 0x08 233 #define _BSR4 0x10 234 235 //============================================================================== 236 237 extern __at(0x0009) __sfr WREG; 238 extern __at(0x000A) __sfr PCLATH; 239 240 //============================================================================== 241 // INTCON Bits 242 243 extern __at(0x000B) __sfr INTCON; 244 245 typedef union 246 { 247 struct 248 { 249 unsigned IOCIF : 1; 250 unsigned INTF : 1; 251 unsigned TMR0IF : 1; 252 unsigned IOCIE : 1; 253 unsigned INTE : 1; 254 unsigned TMR0IE : 1; 255 unsigned PEIE : 1; 256 unsigned GIE : 1; 257 }; 258 259 struct 260 { 261 unsigned : 1; 262 unsigned : 1; 263 unsigned T0IF : 1; 264 unsigned : 1; 265 unsigned : 1; 266 unsigned T0IE : 1; 267 unsigned : 1; 268 unsigned : 1; 269 }; 270 } __INTCONbits_t; 271 272 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 273 274 #define _IOCIF 0x01 275 #define _INTF 0x02 276 #define _TMR0IF 0x04 277 #define _T0IF 0x04 278 #define _IOCIE 0x08 279 #define _INTE 0x10 280 #define _TMR0IE 0x20 281 #define _T0IE 0x20 282 #define _PEIE 0x40 283 #define _GIE 0x80 284 285 //============================================================================== 286 287 288 //============================================================================== 289 // PORTA Bits 290 291 extern __at(0x000C) __sfr PORTA; 292 293 typedef union 294 { 295 struct 296 { 297 unsigned RA0 : 1; 298 unsigned RA1 : 1; 299 unsigned RA2 : 1; 300 unsigned RA3 : 1; 301 unsigned RA4 : 1; 302 unsigned RA5 : 1; 303 unsigned : 1; 304 unsigned : 1; 305 }; 306 307 struct 308 { 309 unsigned RA : 6; 310 unsigned : 2; 311 }; 312 } __PORTAbits_t; 313 314 extern __at(0x000C) volatile __PORTAbits_t PORTAbits; 315 316 #define _RA0 0x01 317 #define _RA1 0x02 318 #define _RA2 0x04 319 #define _RA3 0x08 320 #define _RA4 0x10 321 #define _RA5 0x20 322 323 //============================================================================== 324 325 326 //============================================================================== 327 // PIR1 Bits 328 329 extern __at(0x0011) __sfr PIR1; 330 331 typedef struct 332 { 333 unsigned TMR1IF : 1; 334 unsigned TMR2IF : 1; 335 unsigned CCP1IF : 1; 336 unsigned SSP1IF : 1; 337 unsigned TXIF : 1; 338 unsigned RCIF : 1; 339 unsigned ADIF : 1; 340 unsigned TMR1GIF : 1; 341 } __PIR1bits_t; 342 343 extern __at(0x0011) volatile __PIR1bits_t PIR1bits; 344 345 #define _TMR1IF 0x01 346 #define _TMR2IF 0x02 347 #define _CCP1IF 0x04 348 #define _SSP1IF 0x08 349 #define _TXIF 0x10 350 #define _RCIF 0x20 351 #define _ADIF 0x40 352 #define _TMR1GIF 0x80 353 354 //============================================================================== 355 356 357 //============================================================================== 358 // PIR2 Bits 359 360 extern __at(0x0012) __sfr PIR2; 361 362 typedef struct 363 { 364 unsigned : 1; 365 unsigned : 1; 366 unsigned : 1; 367 unsigned BCL1IF : 1; 368 unsigned EEIF : 1; 369 unsigned C1IF : 1; 370 unsigned : 1; 371 unsigned OSFIF : 1; 372 } __PIR2bits_t; 373 374 extern __at(0x0012) volatile __PIR2bits_t PIR2bits; 375 376 #define _BCL1IF 0x08 377 #define _EEIF 0x10 378 #define _C1IF 0x20 379 #define _OSFIF 0x80 380 381 //============================================================================== 382 383 extern __at(0x0015) __sfr TMR0; 384 extern __at(0x0016) __sfr TMR1; 385 extern __at(0x0016) __sfr TMR1L; 386 extern __at(0x0017) __sfr TMR1H; 387 388 //============================================================================== 389 // T1CON Bits 390 391 extern __at(0x0018) __sfr T1CON; 392 393 typedef union 394 { 395 struct 396 { 397 unsigned TMR1ON : 1; 398 unsigned : 1; 399 unsigned NOT_T1SYNC : 1; 400 unsigned T1OSCEN : 1; 401 unsigned T1CKPS0 : 1; 402 unsigned T1CKPS1 : 1; 403 unsigned TMR1CS0 : 1; 404 unsigned TMR1CS1 : 1; 405 }; 406 407 struct 408 { 409 unsigned : 4; 410 unsigned T1CKPS : 2; 411 unsigned : 2; 412 }; 413 414 struct 415 { 416 unsigned : 6; 417 unsigned TMR1CS : 2; 418 }; 419 } __T1CONbits_t; 420 421 extern __at(0x0018) volatile __T1CONbits_t T1CONbits; 422 423 #define _TMR1ON 0x01 424 #define _NOT_T1SYNC 0x04 425 #define _T1OSCEN 0x08 426 #define _T1CKPS0 0x10 427 #define _T1CKPS1 0x20 428 #define _TMR1CS0 0x40 429 #define _TMR1CS1 0x80 430 431 //============================================================================== 432 433 434 //============================================================================== 435 // T1GCON Bits 436 437 extern __at(0x0019) __sfr T1GCON; 438 439 typedef union 440 { 441 struct 442 { 443 unsigned T1GSS0 : 1; 444 unsigned T1GSS1 : 1; 445 unsigned T1GVAL : 1; 446 unsigned T1GGO_NOT_DONE : 1; 447 unsigned T1GSPM : 1; 448 unsigned T1GTM : 1; 449 unsigned T1GPOL : 1; 450 unsigned TMR1GE : 1; 451 }; 452 453 struct 454 { 455 unsigned : 1; 456 unsigned : 1; 457 unsigned : 1; 458 unsigned T1GGO : 1; 459 unsigned : 1; 460 unsigned : 1; 461 unsigned : 1; 462 unsigned : 1; 463 }; 464 465 struct 466 { 467 unsigned T1GSS : 2; 468 unsigned : 6; 469 }; 470 } __T1GCONbits_t; 471 472 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 473 474 #define _T1GSS0 0x01 475 #define _T1GSS1 0x02 476 #define _T1GVAL 0x04 477 #define _T1GGO_NOT_DONE 0x08 478 #define _T1GGO 0x08 479 #define _T1GSPM 0x10 480 #define _T1GTM 0x20 481 #define _T1GPOL 0x40 482 #define _TMR1GE 0x80 483 484 //============================================================================== 485 486 extern __at(0x001A) __sfr TMR2; 487 extern __at(0x001B) __sfr PR2; 488 489 //============================================================================== 490 // T2CON Bits 491 492 extern __at(0x001C) __sfr T2CON; 493 494 typedef union 495 { 496 struct 497 { 498 unsigned T2CKPS0 : 1; 499 unsigned T2CKPS1 : 1; 500 unsigned TMR2ON : 1; 501 unsigned T2OUTPS0 : 1; 502 unsigned T2OUTPS1 : 1; 503 unsigned T2OUTPS2 : 1; 504 unsigned T2OUTPS3 : 1; 505 unsigned : 1; 506 }; 507 508 struct 509 { 510 unsigned T2CKPS : 2; 511 unsigned : 6; 512 }; 513 514 struct 515 { 516 unsigned : 3; 517 unsigned T2OUTPS : 4; 518 unsigned : 1; 519 }; 520 } __T2CONbits_t; 521 522 extern __at(0x001C) volatile __T2CONbits_t T2CONbits; 523 524 #define _T2CKPS0 0x01 525 #define _T2CKPS1 0x02 526 #define _TMR2ON 0x04 527 #define _T2OUTPS0 0x08 528 #define _T2OUTPS1 0x10 529 #define _T2OUTPS2 0x20 530 #define _T2OUTPS3 0x40 531 532 //============================================================================== 533 534 535 //============================================================================== 536 // CPSCON0 Bits 537 538 extern __at(0x001E) __sfr CPSCON0; 539 540 typedef union 541 { 542 struct 543 { 544 unsigned T0XCS : 1; 545 unsigned CPSOUT : 1; 546 unsigned CPSRNG0 : 1; 547 unsigned CPSRNG1 : 1; 548 unsigned : 1; 549 unsigned : 1; 550 unsigned CPSRM : 1; 551 unsigned CPSON : 1; 552 }; 553 554 struct 555 { 556 unsigned : 2; 557 unsigned CPSRNG : 2; 558 unsigned : 4; 559 }; 560 } __CPSCON0bits_t; 561 562 extern __at(0x001E) volatile __CPSCON0bits_t CPSCON0bits; 563 564 #define _T0XCS 0x01 565 #define _CPSOUT 0x02 566 #define _CPSRNG0 0x04 567 #define _CPSRNG1 0x08 568 #define _CPSRM 0x40 569 #define _CPSON 0x80 570 571 //============================================================================== 572 573 574 //============================================================================== 575 // CPSCON1 Bits 576 577 extern __at(0x001F) __sfr CPSCON1; 578 579 typedef union 580 { 581 struct 582 { 583 unsigned CPSCH0 : 1; 584 unsigned CPSCH1 : 1; 585 unsigned : 1; 586 unsigned : 1; 587 unsigned : 1; 588 unsigned : 1; 589 unsigned : 1; 590 unsigned : 1; 591 }; 592 593 struct 594 { 595 unsigned CPSCH : 2; 596 unsigned : 6; 597 }; 598 } __CPSCON1bits_t; 599 600 extern __at(0x001F) volatile __CPSCON1bits_t CPSCON1bits; 601 602 #define _CPSCH0 0x01 603 #define _CPSCH1 0x02 604 605 //============================================================================== 606 607 608 //============================================================================== 609 // TRISA Bits 610 611 extern __at(0x008C) __sfr TRISA; 612 613 typedef union 614 { 615 struct 616 { 617 unsigned TRISA0 : 1; 618 unsigned TRISA1 : 1; 619 unsigned TRISA2 : 1; 620 unsigned TRISA3 : 1; 621 unsigned TRISA4 : 1; 622 unsigned TRISA5 : 1; 623 unsigned : 1; 624 unsigned : 1; 625 }; 626 627 struct 628 { 629 unsigned TRISA : 6; 630 unsigned : 2; 631 }; 632 } __TRISAbits_t; 633 634 extern __at(0x008C) volatile __TRISAbits_t TRISAbits; 635 636 #define _TRISA0 0x01 637 #define _TRISA1 0x02 638 #define _TRISA2 0x04 639 #define _TRISA3 0x08 640 #define _TRISA4 0x10 641 #define _TRISA5 0x20 642 643 //============================================================================== 644 645 646 //============================================================================== 647 // PIE1 Bits 648 649 extern __at(0x0091) __sfr PIE1; 650 651 typedef struct 652 { 653 unsigned TMR1IE : 1; 654 unsigned TMR2IE : 1; 655 unsigned CCP1IE : 1; 656 unsigned SSP1IE : 1; 657 unsigned TXIE : 1; 658 unsigned RCIE : 1; 659 unsigned ADIE : 1; 660 unsigned TMR1GIE : 1; 661 } __PIE1bits_t; 662 663 extern __at(0x0091) volatile __PIE1bits_t PIE1bits; 664 665 #define _TMR1IE 0x01 666 #define _TMR2IE 0x02 667 #define _CCP1IE 0x04 668 #define _SSP1IE 0x08 669 #define _TXIE 0x10 670 #define _RCIE 0x20 671 #define _ADIE 0x40 672 #define _TMR1GIE 0x80 673 674 //============================================================================== 675 676 677 //============================================================================== 678 // PIE2 Bits 679 680 extern __at(0x0092) __sfr PIE2; 681 682 typedef struct 683 { 684 unsigned : 1; 685 unsigned : 1; 686 unsigned : 1; 687 unsigned BCL1IE : 1; 688 unsigned EEIE : 1; 689 unsigned C1IE : 1; 690 unsigned : 1; 691 unsigned OSFIE : 1; 692 } __PIE2bits_t; 693 694 extern __at(0x0092) volatile __PIE2bits_t PIE2bits; 695 696 #define _BCL1IE 0x08 697 #define _EEIE 0x10 698 #define _C1IE 0x20 699 #define _OSFIE 0x80 700 701 //============================================================================== 702 703 704 //============================================================================== 705 // OPTION_REG Bits 706 707 extern __at(0x0095) __sfr OPTION_REG; 708 709 typedef union 710 { 711 struct 712 { 713 unsigned PS0 : 1; 714 unsigned PS1 : 1; 715 unsigned PS2 : 1; 716 unsigned PSA : 1; 717 unsigned TMR0SE : 1; 718 unsigned TMR0CS : 1; 719 unsigned INTEDG : 1; 720 unsigned NOT_WPUEN : 1; 721 }; 722 723 struct 724 { 725 unsigned : 1; 726 unsigned : 1; 727 unsigned : 1; 728 unsigned : 1; 729 unsigned T0SE : 1; 730 unsigned T0CS : 1; 731 unsigned : 1; 732 unsigned : 1; 733 }; 734 735 struct 736 { 737 unsigned PS : 3; 738 unsigned : 5; 739 }; 740 } __OPTION_REGbits_t; 741 742 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 743 744 #define _PS0 0x01 745 #define _PS1 0x02 746 #define _PS2 0x04 747 #define _PSA 0x08 748 #define _TMR0SE 0x10 749 #define _T0SE 0x10 750 #define _TMR0CS 0x20 751 #define _T0CS 0x20 752 #define _INTEDG 0x40 753 #define _NOT_WPUEN 0x80 754 755 //============================================================================== 756 757 758 //============================================================================== 759 // PCON Bits 760 761 extern __at(0x0096) __sfr PCON; 762 763 typedef struct 764 { 765 unsigned NOT_BOR : 1; 766 unsigned NOT_POR : 1; 767 unsigned NOT_RI : 1; 768 unsigned NOT_RMCLR : 1; 769 unsigned : 1; 770 unsigned : 1; 771 unsigned STKUNF : 1; 772 unsigned STKOVF : 1; 773 } __PCONbits_t; 774 775 extern __at(0x0096) volatile __PCONbits_t PCONbits; 776 777 #define _NOT_BOR 0x01 778 #define _NOT_POR 0x02 779 #define _NOT_RI 0x04 780 #define _NOT_RMCLR 0x08 781 #define _STKUNF 0x40 782 #define _STKOVF 0x80 783 784 //============================================================================== 785 786 787 //============================================================================== 788 // WDTCON Bits 789 790 extern __at(0x0097) __sfr WDTCON; 791 792 typedef union 793 { 794 struct 795 { 796 unsigned SWDTEN : 1; 797 unsigned WDTPS0 : 1; 798 unsigned WDTPS1 : 1; 799 unsigned WDTPS2 : 1; 800 unsigned WDTPS3 : 1; 801 unsigned WDTPS4 : 1; 802 unsigned : 1; 803 unsigned : 1; 804 }; 805 806 struct 807 { 808 unsigned : 1; 809 unsigned WDTPS : 5; 810 unsigned : 2; 811 }; 812 } __WDTCONbits_t; 813 814 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 815 816 #define _SWDTEN 0x01 817 #define _WDTPS0 0x02 818 #define _WDTPS1 0x04 819 #define _WDTPS2 0x08 820 #define _WDTPS3 0x10 821 #define _WDTPS4 0x20 822 823 //============================================================================== 824 825 826 //============================================================================== 827 // OSCTUNE Bits 828 829 extern __at(0x0098) __sfr OSCTUNE; 830 831 typedef union 832 { 833 struct 834 { 835 unsigned TUN0 : 1; 836 unsigned TUN1 : 1; 837 unsigned TUN2 : 1; 838 unsigned TUN3 : 1; 839 unsigned TUN4 : 1; 840 unsigned TUN5 : 1; 841 unsigned : 1; 842 unsigned : 1; 843 }; 844 845 struct 846 { 847 unsigned TUN : 6; 848 unsigned : 2; 849 }; 850 } __OSCTUNEbits_t; 851 852 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 853 854 #define _TUN0 0x01 855 #define _TUN1 0x02 856 #define _TUN2 0x04 857 #define _TUN3 0x08 858 #define _TUN4 0x10 859 #define _TUN5 0x20 860 861 //============================================================================== 862 863 864 //============================================================================== 865 // OSCCON Bits 866 867 extern __at(0x0099) __sfr OSCCON; 868 869 typedef union 870 { 871 struct 872 { 873 unsigned SCS0 : 1; 874 unsigned SCS1 : 1; 875 unsigned : 1; 876 unsigned IRCF0 : 1; 877 unsigned IRCF1 : 1; 878 unsigned IRCF2 : 1; 879 unsigned IRCF3 : 1; 880 unsigned SPLLEN : 1; 881 }; 882 883 struct 884 { 885 unsigned SCS : 2; 886 unsigned : 6; 887 }; 888 889 struct 890 { 891 unsigned : 3; 892 unsigned IRCF : 4; 893 unsigned : 1; 894 }; 895 } __OSCCONbits_t; 896 897 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 898 899 #define _SCS0 0x01 900 #define _SCS1 0x02 901 #define _IRCF0 0x08 902 #define _IRCF1 0x10 903 #define _IRCF2 0x20 904 #define _IRCF3 0x40 905 #define _SPLLEN 0x80 906 907 //============================================================================== 908 909 910 //============================================================================== 911 // OSCSTAT Bits 912 913 extern __at(0x009A) __sfr OSCSTAT; 914 915 typedef struct 916 { 917 unsigned HFIOFS : 1; 918 unsigned LFIOFR : 1; 919 unsigned MFIOFR : 1; 920 unsigned HFIOFL : 1; 921 unsigned HFIOFR : 1; 922 unsigned OSTS : 1; 923 unsigned PLLR : 1; 924 unsigned T1OSCR : 1; 925 } __OSCSTATbits_t; 926 927 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 928 929 #define _HFIOFS 0x01 930 #define _LFIOFR 0x02 931 #define _MFIOFR 0x04 932 #define _HFIOFL 0x08 933 #define _HFIOFR 0x10 934 #define _OSTS 0x20 935 #define _PLLR 0x40 936 #define _T1OSCR 0x80 937 938 //============================================================================== 939 940 extern __at(0x009B) __sfr ADRES; 941 extern __at(0x009B) __sfr ADRESL; 942 extern __at(0x009C) __sfr ADRESH; 943 944 //============================================================================== 945 // ADCON0 Bits 946 947 extern __at(0x009D) __sfr ADCON0; 948 949 typedef union 950 { 951 struct 952 { 953 unsigned ADON : 1; 954 unsigned GO_NOT_DONE : 1; 955 unsigned CHS0 : 1; 956 unsigned CHS1 : 1; 957 unsigned CHS2 : 1; 958 unsigned CHS3 : 1; 959 unsigned CHS4 : 1; 960 unsigned : 1; 961 }; 962 963 struct 964 { 965 unsigned : 1; 966 unsigned ADGO : 1; 967 unsigned : 1; 968 unsigned : 1; 969 unsigned : 1; 970 unsigned : 1; 971 unsigned : 1; 972 unsigned : 1; 973 }; 974 975 struct 976 { 977 unsigned : 1; 978 unsigned GO : 1; 979 unsigned : 1; 980 unsigned : 1; 981 unsigned : 1; 982 unsigned : 1; 983 unsigned : 1; 984 unsigned : 1; 985 }; 986 987 struct 988 { 989 unsigned : 2; 990 unsigned CHS : 5; 991 unsigned : 1; 992 }; 993 } __ADCON0bits_t; 994 995 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 996 997 #define _ADON 0x01 998 #define _GO_NOT_DONE 0x02 999 #define _ADGO 0x02 1000 #define _GO 0x02 1001 #define _CHS0 0x04 1002 #define _CHS1 0x08 1003 #define _CHS2 0x10 1004 #define _CHS3 0x20 1005 #define _CHS4 0x40 1006 1007 //============================================================================== 1008 1009 1010 //============================================================================== 1011 // ADCON1 Bits 1012 1013 extern __at(0x009E) __sfr ADCON1; 1014 1015 typedef union 1016 { 1017 struct 1018 { 1019 unsigned ADPREF0 : 1; 1020 unsigned ADPREF1 : 1; 1021 unsigned : 1; 1022 unsigned : 1; 1023 unsigned ADCS0 : 1; 1024 unsigned ADCS1 : 1; 1025 unsigned ADCS2 : 1; 1026 unsigned ADFM : 1; 1027 }; 1028 1029 struct 1030 { 1031 unsigned ADPREF : 2; 1032 unsigned : 6; 1033 }; 1034 1035 struct 1036 { 1037 unsigned : 4; 1038 unsigned ADCS : 3; 1039 unsigned : 1; 1040 }; 1041 } __ADCON1bits_t; 1042 1043 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 1044 1045 #define _ADPREF0 0x01 1046 #define _ADPREF1 0x02 1047 #define _ADCS0 0x10 1048 #define _ADCS1 0x20 1049 #define _ADCS2 0x40 1050 #define _ADFM 0x80 1051 1052 //============================================================================== 1053 1054 1055 //============================================================================== 1056 // LATA Bits 1057 1058 extern __at(0x010C) __sfr LATA; 1059 1060 typedef struct 1061 { 1062 unsigned LATA0 : 1; 1063 unsigned LATA1 : 1; 1064 unsigned LATA2 : 1; 1065 unsigned : 1; 1066 unsigned LATA4 : 1; 1067 unsigned LATA5 : 1; 1068 unsigned : 1; 1069 unsigned : 1; 1070 } __LATAbits_t; 1071 1072 extern __at(0x010C) volatile __LATAbits_t LATAbits; 1073 1074 #define _LATA0 0x01 1075 #define _LATA1 0x02 1076 #define _LATA2 0x04 1077 #define _LATA4 0x10 1078 #define _LATA5 0x20 1079 1080 //============================================================================== 1081 1082 1083 //============================================================================== 1084 // CM1CON0 Bits 1085 1086 extern __at(0x0111) __sfr CM1CON0; 1087 1088 typedef struct 1089 { 1090 unsigned C1SYNC : 1; 1091 unsigned C1HYS : 1; 1092 unsigned C1SP : 1; 1093 unsigned : 1; 1094 unsigned C1POL : 1; 1095 unsigned C1OE : 1; 1096 unsigned C1OUT : 1; 1097 unsigned C1ON : 1; 1098 } __CM1CON0bits_t; 1099 1100 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 1101 1102 #define _C1SYNC 0x01 1103 #define _C1HYS 0x02 1104 #define _C1SP 0x04 1105 #define _C1POL 0x10 1106 #define _C1OE 0x20 1107 #define _C1OUT 0x40 1108 #define _C1ON 0x80 1109 1110 //============================================================================== 1111 1112 1113 //============================================================================== 1114 // CM1CON1 Bits 1115 1116 extern __at(0x0112) __sfr CM1CON1; 1117 1118 typedef union 1119 { 1120 struct 1121 { 1122 unsigned C1NCH : 1; 1123 unsigned : 1; 1124 unsigned : 1; 1125 unsigned : 1; 1126 unsigned C1PCH0 : 1; 1127 unsigned C1PCH1 : 1; 1128 unsigned C1INTN : 1; 1129 unsigned C1INTP : 1; 1130 }; 1131 1132 struct 1133 { 1134 unsigned C1NCH0 : 1; 1135 unsigned : 1; 1136 unsigned : 1; 1137 unsigned : 1; 1138 unsigned : 1; 1139 unsigned : 1; 1140 unsigned : 1; 1141 unsigned : 1; 1142 }; 1143 1144 struct 1145 { 1146 unsigned : 4; 1147 unsigned C1PCH : 2; 1148 unsigned : 2; 1149 }; 1150 } __CM1CON1bits_t; 1151 1152 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 1153 1154 #define _C1NCH 0x01 1155 #define _C1NCH0 0x01 1156 #define _C1PCH0 0x10 1157 #define _C1PCH1 0x20 1158 #define _C1INTN 0x40 1159 #define _C1INTP 0x80 1160 1161 //============================================================================== 1162 1163 1164 //============================================================================== 1165 // CMOUT Bits 1166 1167 extern __at(0x0115) __sfr CMOUT; 1168 1169 typedef struct 1170 { 1171 unsigned MC1OUT : 1; 1172 unsigned : 1; 1173 unsigned : 1; 1174 unsigned : 1; 1175 unsigned : 1; 1176 unsigned : 1; 1177 unsigned : 1; 1178 unsigned : 1; 1179 } __CMOUTbits_t; 1180 1181 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 1182 1183 #define _MC1OUT 0x01 1184 1185 //============================================================================== 1186 1187 1188 //============================================================================== 1189 // BORCON Bits 1190 1191 extern __at(0x0116) __sfr BORCON; 1192 1193 typedef struct 1194 { 1195 unsigned BORRDY : 1; 1196 unsigned : 1; 1197 unsigned : 1; 1198 unsigned : 1; 1199 unsigned : 1; 1200 unsigned : 1; 1201 unsigned BORFS : 1; 1202 unsigned SBOREN : 1; 1203 } __BORCONbits_t; 1204 1205 extern __at(0x0116) volatile __BORCONbits_t BORCONbits; 1206 1207 #define _BORRDY 0x01 1208 #define _BORFS 0x40 1209 #define _SBOREN 0x80 1210 1211 //============================================================================== 1212 1213 1214 //============================================================================== 1215 // FVRCON Bits 1216 1217 extern __at(0x0117) __sfr FVRCON; 1218 1219 typedef union 1220 { 1221 struct 1222 { 1223 unsigned ADFVR0 : 1; 1224 unsigned ADFVR1 : 1; 1225 unsigned CDAFVR0 : 1; 1226 unsigned CDAFVR1 : 1; 1227 unsigned TSRNG : 1; 1228 unsigned TSEN : 1; 1229 unsigned FVRRDY : 1; 1230 unsigned FVREN : 1; 1231 }; 1232 1233 struct 1234 { 1235 unsigned ADFVR : 2; 1236 unsigned : 6; 1237 }; 1238 1239 struct 1240 { 1241 unsigned : 2; 1242 unsigned CDAFVR : 2; 1243 unsigned : 4; 1244 }; 1245 } __FVRCONbits_t; 1246 1247 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 1248 1249 #define _ADFVR0 0x01 1250 #define _ADFVR1 0x02 1251 #define _CDAFVR0 0x04 1252 #define _CDAFVR1 0x08 1253 #define _TSRNG 0x10 1254 #define _TSEN 0x20 1255 #define _FVRRDY 0x40 1256 #define _FVREN 0x80 1257 1258 //============================================================================== 1259 1260 1261 //============================================================================== 1262 // DACCON0 Bits 1263 1264 extern __at(0x0118) __sfr DACCON0; 1265 1266 typedef union 1267 { 1268 struct 1269 { 1270 unsigned : 1; 1271 unsigned : 1; 1272 unsigned DACPSS0 : 1; 1273 unsigned DACPSS1 : 1; 1274 unsigned : 1; 1275 unsigned DACOE : 1; 1276 unsigned DACLPS : 1; 1277 unsigned DACEN : 1; 1278 }; 1279 1280 struct 1281 { 1282 unsigned : 2; 1283 unsigned DACPSS : 2; 1284 unsigned : 4; 1285 }; 1286 } __DACCON0bits_t; 1287 1288 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits; 1289 1290 #define _DACPSS0 0x04 1291 #define _DACPSS1 0x08 1292 #define _DACOE 0x20 1293 #define _DACLPS 0x40 1294 #define _DACEN 0x80 1295 1296 //============================================================================== 1297 1298 1299 //============================================================================== 1300 // DACCON1 Bits 1301 1302 extern __at(0x0119) __sfr DACCON1; 1303 1304 typedef union 1305 { 1306 struct 1307 { 1308 unsigned DACR0 : 1; 1309 unsigned DACR1 : 1; 1310 unsigned DACR2 : 1; 1311 unsigned DACR3 : 1; 1312 unsigned DACR4 : 1; 1313 unsigned : 1; 1314 unsigned : 1; 1315 unsigned : 1; 1316 }; 1317 1318 struct 1319 { 1320 unsigned DACR : 5; 1321 unsigned : 3; 1322 }; 1323 } __DACCON1bits_t; 1324 1325 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits; 1326 1327 #define _DACR0 0x01 1328 #define _DACR1 0x02 1329 #define _DACR2 0x04 1330 #define _DACR3 0x08 1331 #define _DACR4 0x10 1332 1333 //============================================================================== 1334 1335 1336 //============================================================================== 1337 // SRCON0 Bits 1338 1339 extern __at(0x011A) __sfr SRCON0; 1340 1341 typedef union 1342 { 1343 struct 1344 { 1345 unsigned SRPR : 1; 1346 unsigned SRPS : 1; 1347 unsigned SRNQEN : 1; 1348 unsigned SRQEN : 1; 1349 unsigned SRCLK0 : 1; 1350 unsigned SRCLK1 : 1; 1351 unsigned SRCLK2 : 1; 1352 unsigned SRLEN : 1; 1353 }; 1354 1355 struct 1356 { 1357 unsigned : 4; 1358 unsigned SRCLK : 3; 1359 unsigned : 1; 1360 }; 1361 } __SRCON0bits_t; 1362 1363 extern __at(0x011A) volatile __SRCON0bits_t SRCON0bits; 1364 1365 #define _SRPR 0x01 1366 #define _SRPS 0x02 1367 #define _SRNQEN 0x04 1368 #define _SRQEN 0x08 1369 #define _SRCLK0 0x10 1370 #define _SRCLK1 0x20 1371 #define _SRCLK2 0x40 1372 #define _SRLEN 0x80 1373 1374 //============================================================================== 1375 1376 1377 //============================================================================== 1378 // SRCON1 Bits 1379 1380 extern __at(0x011B) __sfr SRCON1; 1381 1382 typedef struct 1383 { 1384 unsigned SRRC1E : 1; 1385 unsigned : 1; 1386 unsigned SRRCKE : 1; 1387 unsigned SRRPE : 1; 1388 unsigned SRSC1E : 1; 1389 unsigned : 1; 1390 unsigned SRSCKE : 1; 1391 unsigned SRSPE : 1; 1392 } __SRCON1bits_t; 1393 1394 extern __at(0x011B) volatile __SRCON1bits_t SRCON1bits; 1395 1396 #define _SRRC1E 0x01 1397 #define _SRRCKE 0x04 1398 #define _SRRPE 0x08 1399 #define _SRSC1E 0x10 1400 #define _SRSCKE 0x40 1401 #define _SRSPE 0x80 1402 1403 //============================================================================== 1404 1405 1406 //============================================================================== 1407 // APFCON Bits 1408 1409 extern __at(0x011D) __sfr APFCON; 1410 1411 typedef union 1412 { 1413 struct 1414 { 1415 unsigned CCP1SEL : 1; 1416 unsigned P1BSEL : 1; 1417 unsigned TXCKSEL : 1; 1418 unsigned T1GSEL : 1; 1419 unsigned : 1; 1420 unsigned SSSEL : 1; 1421 unsigned SDOSEL : 1; 1422 unsigned RXDTSEL : 1; 1423 }; 1424 1425 struct 1426 { 1427 unsigned : 1; 1428 unsigned : 1; 1429 unsigned : 1; 1430 unsigned : 1; 1431 unsigned : 1; 1432 unsigned SS1SEL : 1; 1433 unsigned SDO1SEL : 1; 1434 unsigned : 1; 1435 }; 1436 } __APFCONbits_t; 1437 1438 extern __at(0x011D) volatile __APFCONbits_t APFCONbits; 1439 1440 #define _CCP1SEL 0x01 1441 #define _P1BSEL 0x02 1442 #define _TXCKSEL 0x04 1443 #define _T1GSEL 0x08 1444 #define _SSSEL 0x20 1445 #define _SS1SEL 0x20 1446 #define _SDOSEL 0x40 1447 #define _SDO1SEL 0x40 1448 #define _RXDTSEL 0x80 1449 1450 //============================================================================== 1451 1452 1453 //============================================================================== 1454 // APFCON0 Bits 1455 1456 extern __at(0x011D) __sfr APFCON0; 1457 1458 typedef union 1459 { 1460 struct 1461 { 1462 unsigned CCP1SEL : 1; 1463 unsigned P1BSEL : 1; 1464 unsigned TXCKSEL : 1; 1465 unsigned T1GSEL : 1; 1466 unsigned : 1; 1467 unsigned SSSEL : 1; 1468 unsigned SDOSEL : 1; 1469 unsigned RXDTSEL : 1; 1470 }; 1471 1472 struct 1473 { 1474 unsigned : 1; 1475 unsigned : 1; 1476 unsigned : 1; 1477 unsigned : 1; 1478 unsigned : 1; 1479 unsigned SS1SEL : 1; 1480 unsigned SDO1SEL : 1; 1481 unsigned : 1; 1482 }; 1483 } __APFCON0bits_t; 1484 1485 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits; 1486 1487 #define _APFCON0_CCP1SEL 0x01 1488 #define _APFCON0_P1BSEL 0x02 1489 #define _APFCON0_TXCKSEL 0x04 1490 #define _APFCON0_T1GSEL 0x08 1491 #define _APFCON0_SSSEL 0x20 1492 #define _APFCON0_SS1SEL 0x20 1493 #define _APFCON0_SDOSEL 0x40 1494 #define _APFCON0_SDO1SEL 0x40 1495 #define _APFCON0_RXDTSEL 0x80 1496 1497 //============================================================================== 1498 1499 1500 //============================================================================== 1501 // ANSELA Bits 1502 1503 extern __at(0x018C) __sfr ANSELA; 1504 1505 typedef struct 1506 { 1507 unsigned ANSA0 : 1; 1508 unsigned ANSA1 : 1; 1509 unsigned ANSA2 : 1; 1510 unsigned : 1; 1511 unsigned ANSA4 : 1; 1512 unsigned : 1; 1513 unsigned : 1; 1514 unsigned : 1; 1515 } __ANSELAbits_t; 1516 1517 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 1518 1519 #define _ANSA0 0x01 1520 #define _ANSA1 0x02 1521 #define _ANSA2 0x04 1522 #define _ANSA4 0x10 1523 1524 //============================================================================== 1525 1526 extern __at(0x0191) __sfr EEADR; 1527 extern __at(0x0191) __sfr EEADRL; 1528 extern __at(0x0192) __sfr EEADRH; 1529 extern __at(0x0193) __sfr EEDAT; 1530 extern __at(0x0193) __sfr EEDATL; 1531 extern __at(0x0194) __sfr EEDATH; 1532 1533 //============================================================================== 1534 // EECON1 Bits 1535 1536 extern __at(0x0195) __sfr EECON1; 1537 1538 typedef struct 1539 { 1540 unsigned RD : 1; 1541 unsigned WR : 1; 1542 unsigned WREN : 1; 1543 unsigned WRERR : 1; 1544 unsigned FREE : 1; 1545 unsigned LWLO : 1; 1546 unsigned CFGS : 1; 1547 unsigned EEPGD : 1; 1548 } __EECON1bits_t; 1549 1550 extern __at(0x0195) volatile __EECON1bits_t EECON1bits; 1551 1552 #define _RD 0x01 1553 #define _WR 0x02 1554 #define _WREN 0x04 1555 #define _WRERR 0x08 1556 #define _FREE 0x10 1557 #define _LWLO 0x20 1558 #define _CFGS 0x40 1559 #define _EEPGD 0x80 1560 1561 //============================================================================== 1562 1563 extern __at(0x0196) __sfr EECON2; 1564 1565 //============================================================================== 1566 // VREGCON Bits 1567 1568 extern __at(0x0197) __sfr VREGCON; 1569 1570 typedef union 1571 { 1572 struct 1573 { 1574 unsigned VREGPM0 : 1; 1575 unsigned VREGPM1 : 1; 1576 unsigned : 1; 1577 unsigned : 1; 1578 unsigned : 1; 1579 unsigned : 1; 1580 unsigned : 1; 1581 unsigned : 1; 1582 }; 1583 1584 struct 1585 { 1586 unsigned VREGPM : 2; 1587 unsigned : 6; 1588 }; 1589 } __VREGCONbits_t; 1590 1591 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits; 1592 1593 #define _VREGPM0 0x01 1594 #define _VREGPM1 0x02 1595 1596 //============================================================================== 1597 1598 extern __at(0x0199) __sfr RCREG; 1599 extern __at(0x019A) __sfr TXREG; 1600 extern __at(0x019B) __sfr SP1BRG; 1601 extern __at(0x019B) __sfr SP1BRGL; 1602 extern __at(0x019B) __sfr SPBRG; 1603 extern __at(0x019B) __sfr SPBRGL; 1604 extern __at(0x019C) __sfr SP1BRGH; 1605 extern __at(0x019C) __sfr SPBRGH; 1606 1607 //============================================================================== 1608 // RCSTA Bits 1609 1610 extern __at(0x019D) __sfr RCSTA; 1611 1612 typedef struct 1613 { 1614 unsigned RX9D : 1; 1615 unsigned OERR : 1; 1616 unsigned FERR : 1; 1617 unsigned ADDEN : 1; 1618 unsigned CREN : 1; 1619 unsigned SREN : 1; 1620 unsigned RX9 : 1; 1621 unsigned SPEN : 1; 1622 } __RCSTAbits_t; 1623 1624 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 1625 1626 #define _RX9D 0x01 1627 #define _OERR 0x02 1628 #define _FERR 0x04 1629 #define _ADDEN 0x08 1630 #define _CREN 0x10 1631 #define _SREN 0x20 1632 #define _RX9 0x40 1633 #define _SPEN 0x80 1634 1635 //============================================================================== 1636 1637 1638 //============================================================================== 1639 // TXSTA Bits 1640 1641 extern __at(0x019E) __sfr TXSTA; 1642 1643 typedef struct 1644 { 1645 unsigned TX9D : 1; 1646 unsigned TRMT : 1; 1647 unsigned BRGH : 1; 1648 unsigned SENDB : 1; 1649 unsigned SYNC : 1; 1650 unsigned TXEN : 1; 1651 unsigned TX9 : 1; 1652 unsigned CSRC : 1; 1653 } __TXSTAbits_t; 1654 1655 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 1656 1657 #define _TX9D 0x01 1658 #define _TRMT 0x02 1659 #define _BRGH 0x04 1660 #define _SENDB 0x08 1661 #define _SYNC 0x10 1662 #define _TXEN 0x20 1663 #define _TX9 0x40 1664 #define _CSRC 0x80 1665 1666 //============================================================================== 1667 1668 1669 //============================================================================== 1670 // BAUDCON Bits 1671 1672 extern __at(0x019F) __sfr BAUDCON; 1673 1674 typedef struct 1675 { 1676 unsigned ABDEN : 1; 1677 unsigned WUE : 1; 1678 unsigned : 1; 1679 unsigned BRG16 : 1; 1680 unsigned SCKP : 1; 1681 unsigned : 1; 1682 unsigned RCIDL : 1; 1683 unsigned ABDOVF : 1; 1684 } __BAUDCONbits_t; 1685 1686 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 1687 1688 #define _ABDEN 0x01 1689 #define _WUE 0x02 1690 #define _BRG16 0x08 1691 #define _SCKP 0x10 1692 #define _RCIDL 0x40 1693 #define _ABDOVF 0x80 1694 1695 //============================================================================== 1696 1697 1698 //============================================================================== 1699 // WPUA Bits 1700 1701 extern __at(0x020C) __sfr WPUA; 1702 1703 typedef union 1704 { 1705 struct 1706 { 1707 unsigned WPUA0 : 1; 1708 unsigned WPUA1 : 1; 1709 unsigned WPUA2 : 1; 1710 unsigned WPUA3 : 1; 1711 unsigned WPUA4 : 1; 1712 unsigned WPUA5 : 1; 1713 unsigned : 1; 1714 unsigned : 1; 1715 }; 1716 1717 struct 1718 { 1719 unsigned WPUA : 6; 1720 unsigned : 2; 1721 }; 1722 } __WPUAbits_t; 1723 1724 extern __at(0x020C) volatile __WPUAbits_t WPUAbits; 1725 1726 #define _WPUA0 0x01 1727 #define _WPUA1 0x02 1728 #define _WPUA2 0x04 1729 #define _WPUA3 0x08 1730 #define _WPUA4 0x10 1731 #define _WPUA5 0x20 1732 1733 //============================================================================== 1734 1735 extern __at(0x0211) __sfr SSP1BUF; 1736 extern __at(0x0211) __sfr SSPBUF; 1737 extern __at(0x0212) __sfr SSP1ADD; 1738 extern __at(0x0212) __sfr SSPADD; 1739 extern __at(0x0213) __sfr SSP1MSK; 1740 extern __at(0x0213) __sfr SSPMSK; 1741 1742 //============================================================================== 1743 // SSP1STAT Bits 1744 1745 extern __at(0x0214) __sfr SSP1STAT; 1746 1747 typedef struct 1748 { 1749 unsigned BF : 1; 1750 unsigned UA : 1; 1751 unsigned R_NOT_W : 1; 1752 unsigned S : 1; 1753 unsigned P : 1; 1754 unsigned D_NOT_A : 1; 1755 unsigned CKE : 1; 1756 unsigned SMP : 1; 1757 } __SSP1STATbits_t; 1758 1759 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 1760 1761 #define _BF 0x01 1762 #define _UA 0x02 1763 #define _R_NOT_W 0x04 1764 #define _S 0x08 1765 #define _P 0x10 1766 #define _D_NOT_A 0x20 1767 #define _CKE 0x40 1768 #define _SMP 0x80 1769 1770 //============================================================================== 1771 1772 1773 //============================================================================== 1774 // SSPSTAT Bits 1775 1776 extern __at(0x0214) __sfr SSPSTAT; 1777 1778 typedef struct 1779 { 1780 unsigned BF : 1; 1781 unsigned UA : 1; 1782 unsigned R_NOT_W : 1; 1783 unsigned S : 1; 1784 unsigned P : 1; 1785 unsigned D_NOT_A : 1; 1786 unsigned CKE : 1; 1787 unsigned SMP : 1; 1788 } __SSPSTATbits_t; 1789 1790 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 1791 1792 #define _SSPSTAT_BF 0x01 1793 #define _SSPSTAT_UA 0x02 1794 #define _SSPSTAT_R_NOT_W 0x04 1795 #define _SSPSTAT_S 0x08 1796 #define _SSPSTAT_P 0x10 1797 #define _SSPSTAT_D_NOT_A 0x20 1798 #define _SSPSTAT_CKE 0x40 1799 #define _SSPSTAT_SMP 0x80 1800 1801 //============================================================================== 1802 1803 1804 //============================================================================== 1805 // SSP1CON1 Bits 1806 1807 extern __at(0x0215) __sfr SSP1CON1; 1808 1809 typedef union 1810 { 1811 struct 1812 { 1813 unsigned SSPM0 : 1; 1814 unsigned SSPM1 : 1; 1815 unsigned SSPM2 : 1; 1816 unsigned SSPM3 : 1; 1817 unsigned CKP : 1; 1818 unsigned SSPEN : 1; 1819 unsigned SSPOV : 1; 1820 unsigned WCOL : 1; 1821 }; 1822 1823 struct 1824 { 1825 unsigned SSPM : 4; 1826 unsigned : 4; 1827 }; 1828 } __SSP1CON1bits_t; 1829 1830 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 1831 1832 #define _SSPM0 0x01 1833 #define _SSPM1 0x02 1834 #define _SSPM2 0x04 1835 #define _SSPM3 0x08 1836 #define _CKP 0x10 1837 #define _SSPEN 0x20 1838 #define _SSPOV 0x40 1839 #define _WCOL 0x80 1840 1841 //============================================================================== 1842 1843 1844 //============================================================================== 1845 // SSPCON Bits 1846 1847 extern __at(0x0215) __sfr SSPCON; 1848 1849 typedef union 1850 { 1851 struct 1852 { 1853 unsigned SSPM0 : 1; 1854 unsigned SSPM1 : 1; 1855 unsigned SSPM2 : 1; 1856 unsigned SSPM3 : 1; 1857 unsigned CKP : 1; 1858 unsigned SSPEN : 1; 1859 unsigned SSPOV : 1; 1860 unsigned WCOL : 1; 1861 }; 1862 1863 struct 1864 { 1865 unsigned SSPM : 4; 1866 unsigned : 4; 1867 }; 1868 } __SSPCONbits_t; 1869 1870 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 1871 1872 #define _SSPCON_SSPM0 0x01 1873 #define _SSPCON_SSPM1 0x02 1874 #define _SSPCON_SSPM2 0x04 1875 #define _SSPCON_SSPM3 0x08 1876 #define _SSPCON_CKP 0x10 1877 #define _SSPCON_SSPEN 0x20 1878 #define _SSPCON_SSPOV 0x40 1879 #define _SSPCON_WCOL 0x80 1880 1881 //============================================================================== 1882 1883 1884 //============================================================================== 1885 // SSPCON1 Bits 1886 1887 extern __at(0x0215) __sfr SSPCON1; 1888 1889 typedef union 1890 { 1891 struct 1892 { 1893 unsigned SSPM0 : 1; 1894 unsigned SSPM1 : 1; 1895 unsigned SSPM2 : 1; 1896 unsigned SSPM3 : 1; 1897 unsigned CKP : 1; 1898 unsigned SSPEN : 1; 1899 unsigned SSPOV : 1; 1900 unsigned WCOL : 1; 1901 }; 1902 1903 struct 1904 { 1905 unsigned SSPM : 4; 1906 unsigned : 4; 1907 }; 1908 } __SSPCON1bits_t; 1909 1910 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 1911 1912 #define _SSPCON1_SSPM0 0x01 1913 #define _SSPCON1_SSPM1 0x02 1914 #define _SSPCON1_SSPM2 0x04 1915 #define _SSPCON1_SSPM3 0x08 1916 #define _SSPCON1_CKP 0x10 1917 #define _SSPCON1_SSPEN 0x20 1918 #define _SSPCON1_SSPOV 0x40 1919 #define _SSPCON1_WCOL 0x80 1920 1921 //============================================================================== 1922 1923 1924 //============================================================================== 1925 // SSP1CON2 Bits 1926 1927 extern __at(0x0216) __sfr SSP1CON2; 1928 1929 typedef struct 1930 { 1931 unsigned SEN : 1; 1932 unsigned RSEN : 1; 1933 unsigned PEN : 1; 1934 unsigned RCEN : 1; 1935 unsigned ACKEN : 1; 1936 unsigned ACKDT : 1; 1937 unsigned ACKSTAT : 1; 1938 unsigned GCEN : 1; 1939 } __SSP1CON2bits_t; 1940 1941 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 1942 1943 #define _SEN 0x01 1944 #define _RSEN 0x02 1945 #define _PEN 0x04 1946 #define _RCEN 0x08 1947 #define _ACKEN 0x10 1948 #define _ACKDT 0x20 1949 #define _ACKSTAT 0x40 1950 #define _GCEN 0x80 1951 1952 //============================================================================== 1953 1954 1955 //============================================================================== 1956 // SSPCON2 Bits 1957 1958 extern __at(0x0216) __sfr SSPCON2; 1959 1960 typedef struct 1961 { 1962 unsigned SEN : 1; 1963 unsigned RSEN : 1; 1964 unsigned PEN : 1; 1965 unsigned RCEN : 1; 1966 unsigned ACKEN : 1; 1967 unsigned ACKDT : 1; 1968 unsigned ACKSTAT : 1; 1969 unsigned GCEN : 1; 1970 } __SSPCON2bits_t; 1971 1972 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 1973 1974 #define _SSPCON2_SEN 0x01 1975 #define _SSPCON2_RSEN 0x02 1976 #define _SSPCON2_PEN 0x04 1977 #define _SSPCON2_RCEN 0x08 1978 #define _SSPCON2_ACKEN 0x10 1979 #define _SSPCON2_ACKDT 0x20 1980 #define _SSPCON2_ACKSTAT 0x40 1981 #define _SSPCON2_GCEN 0x80 1982 1983 //============================================================================== 1984 1985 1986 //============================================================================== 1987 // SSP1CON3 Bits 1988 1989 extern __at(0x0217) __sfr SSP1CON3; 1990 1991 typedef struct 1992 { 1993 unsigned DHEN : 1; 1994 unsigned AHEN : 1; 1995 unsigned SBCDE : 1; 1996 unsigned SDAHT : 1; 1997 unsigned BOEN : 1; 1998 unsigned SCIE : 1; 1999 unsigned PCIE : 1; 2000 unsigned ACKTIM : 1; 2001 } __SSP1CON3bits_t; 2002 2003 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 2004 2005 #define _DHEN 0x01 2006 #define _AHEN 0x02 2007 #define _SBCDE 0x04 2008 #define _SDAHT 0x08 2009 #define _BOEN 0x10 2010 #define _SCIE 0x20 2011 #define _PCIE 0x40 2012 #define _ACKTIM 0x80 2013 2014 //============================================================================== 2015 2016 2017 //============================================================================== 2018 // SSPCON3 Bits 2019 2020 extern __at(0x0217) __sfr SSPCON3; 2021 2022 typedef struct 2023 { 2024 unsigned DHEN : 1; 2025 unsigned AHEN : 1; 2026 unsigned SBCDE : 1; 2027 unsigned SDAHT : 1; 2028 unsigned BOEN : 1; 2029 unsigned SCIE : 1; 2030 unsigned PCIE : 1; 2031 unsigned ACKTIM : 1; 2032 } __SSPCON3bits_t; 2033 2034 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 2035 2036 #define _SSPCON3_DHEN 0x01 2037 #define _SSPCON3_AHEN 0x02 2038 #define _SSPCON3_SBCDE 0x04 2039 #define _SSPCON3_SDAHT 0x08 2040 #define _SSPCON3_BOEN 0x10 2041 #define _SSPCON3_SCIE 0x20 2042 #define _SSPCON3_PCIE 0x40 2043 #define _SSPCON3_ACKTIM 0x80 2044 2045 //============================================================================== 2046 2047 extern __at(0x0291) __sfr CCPR1; 2048 extern __at(0x0291) __sfr CCPR1L; 2049 extern __at(0x0292) __sfr CCPR1H; 2050 2051 //============================================================================== 2052 // CCP1CON Bits 2053 2054 extern __at(0x0293) __sfr CCP1CON; 2055 2056 typedef union 2057 { 2058 struct 2059 { 2060 unsigned CCP1M0 : 1; 2061 unsigned CCP1M1 : 1; 2062 unsigned CCP1M2 : 1; 2063 unsigned CCP1M3 : 1; 2064 unsigned DC1B0 : 1; 2065 unsigned DC1B1 : 1; 2066 unsigned P1M0 : 1; 2067 unsigned P1M1 : 1; 2068 }; 2069 2070 struct 2071 { 2072 unsigned CCP1M : 4; 2073 unsigned : 4; 2074 }; 2075 2076 struct 2077 { 2078 unsigned : 4; 2079 unsigned DC1B : 2; 2080 unsigned : 2; 2081 }; 2082 2083 struct 2084 { 2085 unsigned : 6; 2086 unsigned P1M : 2; 2087 }; 2088 } __CCP1CONbits_t; 2089 2090 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 2091 2092 #define _CCP1M0 0x01 2093 #define _CCP1M1 0x02 2094 #define _CCP1M2 0x04 2095 #define _CCP1M3 0x08 2096 #define _DC1B0 0x10 2097 #define _DC1B1 0x20 2098 #define _P1M0 0x40 2099 #define _P1M1 0x80 2100 2101 //============================================================================== 2102 2103 2104 //============================================================================== 2105 // PWM1CON Bits 2106 2107 extern __at(0x0294) __sfr PWM1CON; 2108 2109 typedef union 2110 { 2111 struct 2112 { 2113 unsigned P1DC0 : 1; 2114 unsigned P1DC1 : 1; 2115 unsigned P1DC2 : 1; 2116 unsigned P1DC3 : 1; 2117 unsigned P1DC4 : 1; 2118 unsigned P1DC5 : 1; 2119 unsigned P1DC6 : 1; 2120 unsigned P1RSEN : 1; 2121 }; 2122 2123 struct 2124 { 2125 unsigned P1DC : 7; 2126 unsigned : 1; 2127 }; 2128 } __PWM1CONbits_t; 2129 2130 extern __at(0x0294) volatile __PWM1CONbits_t PWM1CONbits; 2131 2132 #define _P1DC0 0x01 2133 #define _P1DC1 0x02 2134 #define _P1DC2 0x04 2135 #define _P1DC3 0x08 2136 #define _P1DC4 0x10 2137 #define _P1DC5 0x20 2138 #define _P1DC6 0x40 2139 #define _P1RSEN 0x80 2140 2141 //============================================================================== 2142 2143 2144 //============================================================================== 2145 // CCP1AS Bits 2146 2147 extern __at(0x0295) __sfr CCP1AS; 2148 2149 typedef union 2150 { 2151 struct 2152 { 2153 unsigned PSS1BD0 : 1; 2154 unsigned PSS1BD1 : 1; 2155 unsigned PSS1AC0 : 1; 2156 unsigned PSS1AC1 : 1; 2157 unsigned CCP1AS0 : 1; 2158 unsigned CCP1AS1 : 1; 2159 unsigned CCP1AS2 : 1; 2160 unsigned CCP1ASE : 1; 2161 }; 2162 2163 struct 2164 { 2165 unsigned PSS1BD : 2; 2166 unsigned : 6; 2167 }; 2168 2169 struct 2170 { 2171 unsigned : 2; 2172 unsigned PSS1AC : 2; 2173 unsigned : 4; 2174 }; 2175 2176 struct 2177 { 2178 unsigned : 4; 2179 unsigned CCP1AS : 3; 2180 unsigned : 1; 2181 }; 2182 } __CCP1ASbits_t; 2183 2184 extern __at(0x0295) volatile __CCP1ASbits_t CCP1ASbits; 2185 2186 #define _PSS1BD0 0x01 2187 #define _PSS1BD1 0x02 2188 #define _PSS1AC0 0x04 2189 #define _PSS1AC1 0x08 2190 #define _CCP1AS0 0x10 2191 #define _CCP1AS1 0x20 2192 #define _CCP1AS2 0x40 2193 #define _CCP1ASE 0x80 2194 2195 //============================================================================== 2196 2197 2198 //============================================================================== 2199 // ECCP1AS Bits 2200 2201 extern __at(0x0295) __sfr ECCP1AS; 2202 2203 typedef union 2204 { 2205 struct 2206 { 2207 unsigned PSS1BD0 : 1; 2208 unsigned PSS1BD1 : 1; 2209 unsigned PSS1AC0 : 1; 2210 unsigned PSS1AC1 : 1; 2211 unsigned CCP1AS0 : 1; 2212 unsigned CCP1AS1 : 1; 2213 unsigned CCP1AS2 : 1; 2214 unsigned CCP1ASE : 1; 2215 }; 2216 2217 struct 2218 { 2219 unsigned PSS1BD : 2; 2220 unsigned : 6; 2221 }; 2222 2223 struct 2224 { 2225 unsigned : 2; 2226 unsigned PSS1AC : 2; 2227 unsigned : 4; 2228 }; 2229 2230 struct 2231 { 2232 unsigned : 4; 2233 unsigned CCP1AS : 3; 2234 unsigned : 1; 2235 }; 2236 } __ECCP1ASbits_t; 2237 2238 extern __at(0x0295) volatile __ECCP1ASbits_t ECCP1ASbits; 2239 2240 #define _ECCP1AS_PSS1BD0 0x01 2241 #define _ECCP1AS_PSS1BD1 0x02 2242 #define _ECCP1AS_PSS1AC0 0x04 2243 #define _ECCP1AS_PSS1AC1 0x08 2244 #define _ECCP1AS_CCP1AS0 0x10 2245 #define _ECCP1AS_CCP1AS1 0x20 2246 #define _ECCP1AS_CCP1AS2 0x40 2247 #define _ECCP1AS_CCP1ASE 0x80 2248 2249 //============================================================================== 2250 2251 2252 //============================================================================== 2253 // PSTR1CON Bits 2254 2255 extern __at(0x0296) __sfr PSTR1CON; 2256 2257 typedef struct 2258 { 2259 unsigned STR1A : 1; 2260 unsigned STR1B : 1; 2261 unsigned : 1; 2262 unsigned : 1; 2263 unsigned STR1SYNC : 1; 2264 unsigned : 1; 2265 unsigned : 1; 2266 unsigned : 1; 2267 } __PSTR1CONbits_t; 2268 2269 extern __at(0x0296) volatile __PSTR1CONbits_t PSTR1CONbits; 2270 2271 #define _STR1A 0x01 2272 #define _STR1B 0x02 2273 #define _STR1SYNC 0x10 2274 2275 //============================================================================== 2276 2277 2278 //============================================================================== 2279 // IOCAP Bits 2280 2281 extern __at(0x0391) __sfr IOCAP; 2282 2283 typedef union 2284 { 2285 struct 2286 { 2287 unsigned IOCAP0 : 1; 2288 unsigned IOCAP1 : 1; 2289 unsigned IOCAP2 : 1; 2290 unsigned IOCAP3 : 1; 2291 unsigned IOCAP4 : 1; 2292 unsigned IOCAP5 : 1; 2293 unsigned : 1; 2294 unsigned : 1; 2295 }; 2296 2297 struct 2298 { 2299 unsigned IOCAP : 6; 2300 unsigned : 2; 2301 }; 2302 } __IOCAPbits_t; 2303 2304 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 2305 2306 #define _IOCAP0 0x01 2307 #define _IOCAP1 0x02 2308 #define _IOCAP2 0x04 2309 #define _IOCAP3 0x08 2310 #define _IOCAP4 0x10 2311 #define _IOCAP5 0x20 2312 2313 //============================================================================== 2314 2315 2316 //============================================================================== 2317 // IOCAN Bits 2318 2319 extern __at(0x0392) __sfr IOCAN; 2320 2321 typedef union 2322 { 2323 struct 2324 { 2325 unsigned IOCAN0 : 1; 2326 unsigned IOCAN1 : 1; 2327 unsigned IOCAN2 : 1; 2328 unsigned IOCAN3 : 1; 2329 unsigned IOCAN4 : 1; 2330 unsigned IOCAN5 : 1; 2331 unsigned : 1; 2332 unsigned : 1; 2333 }; 2334 2335 struct 2336 { 2337 unsigned IOCAN : 6; 2338 unsigned : 2; 2339 }; 2340 } __IOCANbits_t; 2341 2342 extern __at(0x0392) volatile __IOCANbits_t IOCANbits; 2343 2344 #define _IOCAN0 0x01 2345 #define _IOCAN1 0x02 2346 #define _IOCAN2 0x04 2347 #define _IOCAN3 0x08 2348 #define _IOCAN4 0x10 2349 #define _IOCAN5 0x20 2350 2351 //============================================================================== 2352 2353 2354 //============================================================================== 2355 // IOCAF Bits 2356 2357 extern __at(0x0393) __sfr IOCAF; 2358 2359 typedef union 2360 { 2361 struct 2362 { 2363 unsigned IOCAF0 : 1; 2364 unsigned IOCAF1 : 1; 2365 unsigned IOCAF2 : 1; 2366 unsigned IOCAF3 : 1; 2367 unsigned IOCAF4 : 1; 2368 unsigned IOCAF5 : 1; 2369 unsigned : 1; 2370 unsigned : 1; 2371 }; 2372 2373 struct 2374 { 2375 unsigned IOCAF : 6; 2376 unsigned : 2; 2377 }; 2378 } __IOCAFbits_t; 2379 2380 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 2381 2382 #define _IOCAF0 0x01 2383 #define _IOCAF1 0x02 2384 #define _IOCAF2 0x04 2385 #define _IOCAF3 0x08 2386 #define _IOCAF4 0x10 2387 #define _IOCAF5 0x20 2388 2389 //============================================================================== 2390 2391 2392 //============================================================================== 2393 // CLKRCON Bits 2394 2395 extern __at(0x039A) __sfr CLKRCON; 2396 2397 typedef union 2398 { 2399 struct 2400 { 2401 unsigned CLKRDIV0 : 1; 2402 unsigned CLKRDIV1 : 1; 2403 unsigned CLKRDIV2 : 1; 2404 unsigned CLKRDC0 : 1; 2405 unsigned CLKRDC1 : 1; 2406 unsigned CLKRSLR : 1; 2407 unsigned CLKROE : 1; 2408 unsigned CLKREN : 1; 2409 }; 2410 2411 struct 2412 { 2413 unsigned CLKRDIV : 3; 2414 unsigned : 5; 2415 }; 2416 2417 struct 2418 { 2419 unsigned : 3; 2420 unsigned CLKRDC : 2; 2421 unsigned : 3; 2422 }; 2423 } __CLKRCONbits_t; 2424 2425 extern __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits; 2426 2427 #define _CLKRDIV0 0x01 2428 #define _CLKRDIV1 0x02 2429 #define _CLKRDIV2 0x04 2430 #define _CLKRDC0 0x08 2431 #define _CLKRDC1 0x10 2432 #define _CLKRSLR 0x20 2433 #define _CLKROE 0x40 2434 #define _CLKREN 0x80 2435 2436 //============================================================================== 2437 2438 2439 //============================================================================== 2440 // MDCON Bits 2441 2442 extern __at(0x039C) __sfr MDCON; 2443 2444 typedef struct 2445 { 2446 unsigned MDBIT : 1; 2447 unsigned : 1; 2448 unsigned : 1; 2449 unsigned MDOUT : 1; 2450 unsigned MDOPOL : 1; 2451 unsigned MDSLR : 1; 2452 unsigned MDOE : 1; 2453 unsigned MDEN : 1; 2454 } __MDCONbits_t; 2455 2456 extern __at(0x039C) volatile __MDCONbits_t MDCONbits; 2457 2458 #define _MDBIT 0x01 2459 #define _MDOUT 0x08 2460 #define _MDOPOL 0x10 2461 #define _MDSLR 0x20 2462 #define _MDOE 0x40 2463 #define _MDEN 0x80 2464 2465 //============================================================================== 2466 2467 2468 //============================================================================== 2469 // MDSRC Bits 2470 2471 extern __at(0x039D) __sfr MDSRC; 2472 2473 typedef union 2474 { 2475 struct 2476 { 2477 unsigned MDMS0 : 1; 2478 unsigned MDMS1 : 1; 2479 unsigned MDMS2 : 1; 2480 unsigned MDMS3 : 1; 2481 unsigned : 1; 2482 unsigned : 1; 2483 unsigned : 1; 2484 unsigned MDMSODIS : 1; 2485 }; 2486 2487 struct 2488 { 2489 unsigned MDMS : 4; 2490 unsigned : 4; 2491 }; 2492 } __MDSRCbits_t; 2493 2494 extern __at(0x039D) volatile __MDSRCbits_t MDSRCbits; 2495 2496 #define _MDMS0 0x01 2497 #define _MDMS1 0x02 2498 #define _MDMS2 0x04 2499 #define _MDMS3 0x08 2500 #define _MDMSODIS 0x80 2501 2502 //============================================================================== 2503 2504 2505 //============================================================================== 2506 // MDCARL Bits 2507 2508 extern __at(0x039E) __sfr MDCARL; 2509 2510 typedef union 2511 { 2512 struct 2513 { 2514 unsigned MDCL0 : 1; 2515 unsigned MDCL1 : 1; 2516 unsigned MDCL2 : 1; 2517 unsigned MDCL3 : 1; 2518 unsigned : 1; 2519 unsigned MDCLSYNC : 1; 2520 unsigned MDCLPOL : 1; 2521 unsigned MDCLODIS : 1; 2522 }; 2523 2524 struct 2525 { 2526 unsigned MDCL : 4; 2527 unsigned : 4; 2528 }; 2529 } __MDCARLbits_t; 2530 2531 extern __at(0x039E) volatile __MDCARLbits_t MDCARLbits; 2532 2533 #define _MDCL0 0x01 2534 #define _MDCL1 0x02 2535 #define _MDCL2 0x04 2536 #define _MDCL3 0x08 2537 #define _MDCLSYNC 0x20 2538 #define _MDCLPOL 0x40 2539 #define _MDCLODIS 0x80 2540 2541 //============================================================================== 2542 2543 2544 //============================================================================== 2545 // MDCARH Bits 2546 2547 extern __at(0x039F) __sfr MDCARH; 2548 2549 typedef union 2550 { 2551 struct 2552 { 2553 unsigned MDCH0 : 1; 2554 unsigned MDCH1 : 1; 2555 unsigned MDCH2 : 1; 2556 unsigned MDCH3 : 1; 2557 unsigned : 1; 2558 unsigned MDCHSYNC : 1; 2559 unsigned MDCHPOL : 1; 2560 unsigned MDCHODIS : 1; 2561 }; 2562 2563 struct 2564 { 2565 unsigned MDCH : 4; 2566 unsigned : 4; 2567 }; 2568 } __MDCARHbits_t; 2569 2570 extern __at(0x039F) volatile __MDCARHbits_t MDCARHbits; 2571 2572 #define _MDCH0 0x01 2573 #define _MDCH1 0x02 2574 #define _MDCH2 0x04 2575 #define _MDCH3 0x08 2576 #define _MDCHSYNC 0x20 2577 #define _MDCHPOL 0x40 2578 #define _MDCHODIS 0x80 2579 2580 //============================================================================== 2581 2582 2583 //============================================================================== 2584 // STATUS_SHAD Bits 2585 2586 extern __at(0x0FE4) __sfr STATUS_SHAD; 2587 2588 typedef struct 2589 { 2590 unsigned C_SHAD : 1; 2591 unsigned DC_SHAD : 1; 2592 unsigned Z_SHAD : 1; 2593 unsigned : 1; 2594 unsigned : 1; 2595 unsigned : 1; 2596 unsigned : 1; 2597 unsigned : 1; 2598 } __STATUS_SHADbits_t; 2599 2600 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 2601 2602 #define _C_SHAD 0x01 2603 #define _DC_SHAD 0x02 2604 #define _Z_SHAD 0x04 2605 2606 //============================================================================== 2607 2608 extern __at(0x0FE5) __sfr WREG_SHAD; 2609 extern __at(0x0FE6) __sfr BSR_SHAD; 2610 extern __at(0x0FE7) __sfr PCLATH_SHAD; 2611 extern __at(0x0FE8) __sfr FSR0L_SHAD; 2612 extern __at(0x0FE9) __sfr FSR0H_SHAD; 2613 extern __at(0x0FEA) __sfr FSR1L_SHAD; 2614 extern __at(0x0FEB) __sfr FSR1H_SHAD; 2615 extern __at(0x0FED) __sfr STKPTR; 2616 extern __at(0x0FEE) __sfr TOSL; 2617 extern __at(0x0FEF) __sfr TOSH; 2618 2619 //============================================================================== 2620 // 2621 // Configuration Bits 2622 // 2623 //============================================================================== 2624 2625 #define _CONFIG1 0x8007 2626 #define _CONFIG2 0x8008 2627 2628 //----------------------------- CONFIG1 Options ------------------------------- 2629 2630 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins. 2631 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins. 2632 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins. 2633 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin. 2634 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin. 2635 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin. 2636 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin. 2637 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin. 2638 #define _WDTE_OFF 0x3FE7 // WDT disabled. 2639 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register. 2640 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep. 2641 #define _WDTE_ON 0x3FFF // WDT enabled. 2642 #define _PWRTE_ON 0x3FDF // PWRT enabled. 2643 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 2644 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input. 2645 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR. 2646 #define _CP_ON 0x3F7F // Program memory code protection is enabled. 2647 #define _CP_OFF 0x3FFF // Program memory code protection is disabled. 2648 #define _CPD_ON 0x3EFF // Data memory code protection is enabled. 2649 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled. 2650 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled. 2651 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register. 2652 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep. 2653 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled. 2654 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin. 2655 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin. 2656 #define _IESO_OFF 0x2FFF // Internal/External Switchover mode is disabled. 2657 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled. 2658 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled. 2659 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled. 2660 2661 //----------------------------- CONFIG2 Options ------------------------------- 2662 2663 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control. 2664 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control. 2665 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control. 2666 #define _WRT_OFF 0x3FFF // Write protection off. 2667 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled. 2668 #define _PLLEN_ON 0x3FFF // 4x PLL enabled. 2669 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset. 2670 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset. 2671 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected. 2672 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 2673 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 2674 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled. 2675 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled. 2676 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming. 2677 #define _LVP_ON 0x3FFF // Low-voltage programming enabled. 2678 2679 //============================================================================== 2680 2681 #define _DEVID1 0x8006 2682 2683 #define _IDLOC0 0x8000 2684 #define _IDLOC1 0x8001 2685 #define _IDLOC2 0x8002 2686 #define _IDLOC3 0x8003 2687 2688 //============================================================================== 2689 2690 #ifndef NO_BIT_DEFINES 2691 2692 #define ADON ADCON0bits.ADON // bit 0 2693 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits 2694 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits 2695 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits 2696 #define CHS0 ADCON0bits.CHS0 // bit 2 2697 #define CHS1 ADCON0bits.CHS1 // bit 3 2698 #define CHS2 ADCON0bits.CHS2 // bit 4 2699 #define CHS3 ADCON0bits.CHS3 // bit 5 2700 #define CHS4 ADCON0bits.CHS4 // bit 6 2701 2702 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0 2703 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1 2704 #define ADCS0 ADCON1bits.ADCS0 // bit 4 2705 #define ADCS1 ADCON1bits.ADCS1 // bit 5 2706 #define ADCS2 ADCON1bits.ADCS2 // bit 6 2707 #define ADFM ADCON1bits.ADFM // bit 7 2708 2709 #define ANSA0 ANSELAbits.ANSA0 // bit 0 2710 #define ANSA1 ANSELAbits.ANSA1 // bit 1 2711 #define ANSA2 ANSELAbits.ANSA2 // bit 2 2712 #define ANSA4 ANSELAbits.ANSA4 // bit 4 2713 2714 #define CCP1SEL APFCONbits.CCP1SEL // bit 0 2715 #define P1BSEL APFCONbits.P1BSEL // bit 1 2716 #define TXCKSEL APFCONbits.TXCKSEL // bit 2 2717 #define T1GSEL APFCONbits.T1GSEL // bit 3 2718 #define SSSEL APFCONbits.SSSEL // bit 5, shadows bit in APFCONbits 2719 #define SS1SEL APFCONbits.SS1SEL // bit 5, shadows bit in APFCONbits 2720 #define SDOSEL APFCONbits.SDOSEL // bit 6, shadows bit in APFCONbits 2721 #define SDO1SEL APFCONbits.SDO1SEL // bit 6, shadows bit in APFCONbits 2722 #define RXDTSEL APFCONbits.RXDTSEL // bit 7 2723 2724 #define ABDEN BAUDCONbits.ABDEN // bit 0 2725 #define WUE BAUDCONbits.WUE // bit 1 2726 #define BRG16 BAUDCONbits.BRG16 // bit 3 2727 #define SCKP BAUDCONbits.SCKP // bit 4 2728 #define RCIDL BAUDCONbits.RCIDL // bit 6 2729 #define ABDOVF BAUDCONbits.ABDOVF // bit 7 2730 2731 #define BORRDY BORCONbits.BORRDY // bit 0 2732 #define BORFS BORCONbits.BORFS // bit 6 2733 #define SBOREN BORCONbits.SBOREN // bit 7 2734 2735 #define BSR0 BSRbits.BSR0 // bit 0 2736 #define BSR1 BSRbits.BSR1 // bit 1 2737 #define BSR2 BSRbits.BSR2 // bit 2 2738 #define BSR3 BSRbits.BSR3 // bit 3 2739 #define BSR4 BSRbits.BSR4 // bit 4 2740 2741 #define PSS1BD0 CCP1ASbits.PSS1BD0 // bit 0 2742 #define PSS1BD1 CCP1ASbits.PSS1BD1 // bit 1 2743 #define PSS1AC0 CCP1ASbits.PSS1AC0 // bit 2 2744 #define PSS1AC1 CCP1ASbits.PSS1AC1 // bit 3 2745 #define CCP1AS0 CCP1ASbits.CCP1AS0 // bit 4 2746 #define CCP1AS1 CCP1ASbits.CCP1AS1 // bit 5 2747 #define CCP1AS2 CCP1ASbits.CCP1AS2 // bit 6 2748 #define CCP1ASE CCP1ASbits.CCP1ASE // bit 7 2749 2750 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0 2751 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1 2752 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2 2753 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3 2754 #define DC1B0 CCP1CONbits.DC1B0 // bit 4 2755 #define DC1B1 CCP1CONbits.DC1B1 // bit 5 2756 #define P1M0 CCP1CONbits.P1M0 // bit 6 2757 #define P1M1 CCP1CONbits.P1M1 // bit 7 2758 2759 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0 2760 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1 2761 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2 2762 #define CLKRDC0 CLKRCONbits.CLKRDC0 // bit 3 2763 #define CLKRDC1 CLKRCONbits.CLKRDC1 // bit 4 2764 #define CLKRSLR CLKRCONbits.CLKRSLR // bit 5 2765 #define CLKROE CLKRCONbits.CLKROE // bit 6 2766 #define CLKREN CLKRCONbits.CLKREN // bit 7 2767 2768 #define C1SYNC CM1CON0bits.C1SYNC // bit 0 2769 #define C1HYS CM1CON0bits.C1HYS // bit 1 2770 #define C1SP CM1CON0bits.C1SP // bit 2 2771 #define C1POL CM1CON0bits.C1POL // bit 4 2772 #define C1OE CM1CON0bits.C1OE // bit 5 2773 #define C1OUT CM1CON0bits.C1OUT // bit 6 2774 #define C1ON CM1CON0bits.C1ON // bit 7 2775 2776 #define C1NCH CM1CON1bits.C1NCH // bit 0, shadows bit in CM1CON1bits 2777 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0, shadows bit in CM1CON1bits 2778 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4 2779 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5 2780 #define C1INTN CM1CON1bits.C1INTN // bit 6 2781 #define C1INTP CM1CON1bits.C1INTP // bit 7 2782 2783 #define MC1OUT CMOUTbits.MC1OUT // bit 0 2784 2785 #define T0XCS CPSCON0bits.T0XCS // bit 0 2786 #define CPSOUT CPSCON0bits.CPSOUT // bit 1 2787 #define CPSRNG0 CPSCON0bits.CPSRNG0 // bit 2 2788 #define CPSRNG1 CPSCON0bits.CPSRNG1 // bit 3 2789 #define CPSRM CPSCON0bits.CPSRM // bit 6 2790 #define CPSON CPSCON0bits.CPSON // bit 7 2791 2792 #define CPSCH0 CPSCON1bits.CPSCH0 // bit 0 2793 #define CPSCH1 CPSCON1bits.CPSCH1 // bit 1 2794 2795 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2 2796 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3 2797 #define DACOE DACCON0bits.DACOE // bit 5 2798 #define DACLPS DACCON0bits.DACLPS // bit 6 2799 #define DACEN DACCON0bits.DACEN // bit 7 2800 2801 #define DACR0 DACCON1bits.DACR0 // bit 0 2802 #define DACR1 DACCON1bits.DACR1 // bit 1 2803 #define DACR2 DACCON1bits.DACR2 // bit 2 2804 #define DACR3 DACCON1bits.DACR3 // bit 3 2805 #define DACR4 DACCON1bits.DACR4 // bit 4 2806 2807 #define RD EECON1bits.RD // bit 0 2808 #define WR EECON1bits.WR // bit 1 2809 #define WREN EECON1bits.WREN // bit 2 2810 #define WRERR EECON1bits.WRERR // bit 3 2811 #define FREE EECON1bits.FREE // bit 4 2812 #define LWLO EECON1bits.LWLO // bit 5 2813 #define CFGS EECON1bits.CFGS // bit 6 2814 #define EEPGD EECON1bits.EEPGD // bit 7 2815 2816 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0 2817 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1 2818 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2 2819 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3 2820 #define TSRNG FVRCONbits.TSRNG // bit 4 2821 #define TSEN FVRCONbits.TSEN // bit 5 2822 #define FVRRDY FVRCONbits.FVRRDY // bit 6 2823 #define FVREN FVRCONbits.FVREN // bit 7 2824 2825 #define IOCIF INTCONbits.IOCIF // bit 0 2826 #define INTF INTCONbits.INTF // bit 1 2827 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 2828 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 2829 #define IOCIE INTCONbits.IOCIE // bit 3 2830 #define INTE INTCONbits.INTE // bit 4 2831 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 2832 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 2833 #define PEIE INTCONbits.PEIE // bit 6 2834 #define GIE INTCONbits.GIE // bit 7 2835 2836 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0 2837 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1 2838 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2 2839 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3 2840 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4 2841 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5 2842 2843 #define IOCAN0 IOCANbits.IOCAN0 // bit 0 2844 #define IOCAN1 IOCANbits.IOCAN1 // bit 1 2845 #define IOCAN2 IOCANbits.IOCAN2 // bit 2 2846 #define IOCAN3 IOCANbits.IOCAN3 // bit 3 2847 #define IOCAN4 IOCANbits.IOCAN4 // bit 4 2848 #define IOCAN5 IOCANbits.IOCAN5 // bit 5 2849 2850 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0 2851 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1 2852 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2 2853 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3 2854 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4 2855 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5 2856 2857 #define LATA0 LATAbits.LATA0 // bit 0 2858 #define LATA1 LATAbits.LATA1 // bit 1 2859 #define LATA2 LATAbits.LATA2 // bit 2 2860 #define LATA4 LATAbits.LATA4 // bit 4 2861 #define LATA5 LATAbits.LATA5 // bit 5 2862 2863 #define MDCH0 MDCARHbits.MDCH0 // bit 0 2864 #define MDCH1 MDCARHbits.MDCH1 // bit 1 2865 #define MDCH2 MDCARHbits.MDCH2 // bit 2 2866 #define MDCH3 MDCARHbits.MDCH3 // bit 3 2867 #define MDCHSYNC MDCARHbits.MDCHSYNC // bit 5 2868 #define MDCHPOL MDCARHbits.MDCHPOL // bit 6 2869 #define MDCHODIS MDCARHbits.MDCHODIS // bit 7 2870 2871 #define MDCL0 MDCARLbits.MDCL0 // bit 0 2872 #define MDCL1 MDCARLbits.MDCL1 // bit 1 2873 #define MDCL2 MDCARLbits.MDCL2 // bit 2 2874 #define MDCL3 MDCARLbits.MDCL3 // bit 3 2875 #define MDCLSYNC MDCARLbits.MDCLSYNC // bit 5 2876 #define MDCLPOL MDCARLbits.MDCLPOL // bit 6 2877 #define MDCLODIS MDCARLbits.MDCLODIS // bit 7 2878 2879 #define MDBIT MDCONbits.MDBIT // bit 0 2880 #define MDOUT MDCONbits.MDOUT // bit 3 2881 #define MDOPOL MDCONbits.MDOPOL // bit 4 2882 #define MDSLR MDCONbits.MDSLR // bit 5 2883 #define MDOE MDCONbits.MDOE // bit 6 2884 #define MDEN MDCONbits.MDEN // bit 7 2885 2886 #define MDMS0 MDSRCbits.MDMS0 // bit 0 2887 #define MDMS1 MDSRCbits.MDMS1 // bit 1 2888 #define MDMS2 MDSRCbits.MDMS2 // bit 2 2889 #define MDMS3 MDSRCbits.MDMS3 // bit 3 2890 #define MDMSODIS MDSRCbits.MDMSODIS // bit 7 2891 2892 #define PS0 OPTION_REGbits.PS0 // bit 0 2893 #define PS1 OPTION_REGbits.PS1 // bit 1 2894 #define PS2 OPTION_REGbits.PS2 // bit 2 2895 #define PSA OPTION_REGbits.PSA // bit 3 2896 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits 2897 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits 2898 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits 2899 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits 2900 #define INTEDG OPTION_REGbits.INTEDG // bit 6 2901 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7 2902 2903 #define SCS0 OSCCONbits.SCS0 // bit 0 2904 #define SCS1 OSCCONbits.SCS1 // bit 1 2905 #define IRCF0 OSCCONbits.IRCF0 // bit 3 2906 #define IRCF1 OSCCONbits.IRCF1 // bit 4 2907 #define IRCF2 OSCCONbits.IRCF2 // bit 5 2908 #define IRCF3 OSCCONbits.IRCF3 // bit 6 2909 #define SPLLEN OSCCONbits.SPLLEN // bit 7 2910 2911 #define HFIOFS OSCSTATbits.HFIOFS // bit 0 2912 #define LFIOFR OSCSTATbits.LFIOFR // bit 1 2913 #define MFIOFR OSCSTATbits.MFIOFR // bit 2 2914 #define HFIOFL OSCSTATbits.HFIOFL // bit 3 2915 #define HFIOFR OSCSTATbits.HFIOFR // bit 4 2916 #define OSTS OSCSTATbits.OSTS // bit 5 2917 #define PLLR OSCSTATbits.PLLR // bit 6 2918 #define T1OSCR OSCSTATbits.T1OSCR // bit 7 2919 2920 #define TUN0 OSCTUNEbits.TUN0 // bit 0 2921 #define TUN1 OSCTUNEbits.TUN1 // bit 1 2922 #define TUN2 OSCTUNEbits.TUN2 // bit 2 2923 #define TUN3 OSCTUNEbits.TUN3 // bit 3 2924 #define TUN4 OSCTUNEbits.TUN4 // bit 4 2925 #define TUN5 OSCTUNEbits.TUN5 // bit 5 2926 2927 #define NOT_BOR PCONbits.NOT_BOR // bit 0 2928 #define NOT_POR PCONbits.NOT_POR // bit 1 2929 #define NOT_RI PCONbits.NOT_RI // bit 2 2930 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3 2931 #define STKUNF PCONbits.STKUNF // bit 6 2932 #define STKOVF PCONbits.STKOVF // bit 7 2933 2934 #define TMR1IE PIE1bits.TMR1IE // bit 0 2935 #define TMR2IE PIE1bits.TMR2IE // bit 1 2936 #define CCP1IE PIE1bits.CCP1IE // bit 2 2937 #define SSP1IE PIE1bits.SSP1IE // bit 3 2938 #define TXIE PIE1bits.TXIE // bit 4 2939 #define RCIE PIE1bits.RCIE // bit 5 2940 #define ADIE PIE1bits.ADIE // bit 6 2941 #define TMR1GIE PIE1bits.TMR1GIE // bit 7 2942 2943 #define BCL1IE PIE2bits.BCL1IE // bit 3 2944 #define EEIE PIE2bits.EEIE // bit 4 2945 #define C1IE PIE2bits.C1IE // bit 5 2946 #define OSFIE PIE2bits.OSFIE // bit 7 2947 2948 #define TMR1IF PIR1bits.TMR1IF // bit 0 2949 #define TMR2IF PIR1bits.TMR2IF // bit 1 2950 #define CCP1IF PIR1bits.CCP1IF // bit 2 2951 #define SSP1IF PIR1bits.SSP1IF // bit 3 2952 #define TXIF PIR1bits.TXIF // bit 4 2953 #define RCIF PIR1bits.RCIF // bit 5 2954 #define ADIF PIR1bits.ADIF // bit 6 2955 #define TMR1GIF PIR1bits.TMR1GIF // bit 7 2956 2957 #define BCL1IF PIR2bits.BCL1IF // bit 3 2958 #define EEIF PIR2bits.EEIF // bit 4 2959 #define C1IF PIR2bits.C1IF // bit 5 2960 #define OSFIF PIR2bits.OSFIF // bit 7 2961 2962 #define RA0 PORTAbits.RA0 // bit 0 2963 #define RA1 PORTAbits.RA1 // bit 1 2964 #define RA2 PORTAbits.RA2 // bit 2 2965 #define RA3 PORTAbits.RA3 // bit 3 2966 #define RA4 PORTAbits.RA4 // bit 4 2967 #define RA5 PORTAbits.RA5 // bit 5 2968 2969 #define STR1A PSTR1CONbits.STR1A // bit 0 2970 #define STR1B PSTR1CONbits.STR1B // bit 1 2971 #define STR1SYNC PSTR1CONbits.STR1SYNC // bit 4 2972 2973 #define P1DC0 PWM1CONbits.P1DC0 // bit 0 2974 #define P1DC1 PWM1CONbits.P1DC1 // bit 1 2975 #define P1DC2 PWM1CONbits.P1DC2 // bit 2 2976 #define P1DC3 PWM1CONbits.P1DC3 // bit 3 2977 #define P1DC4 PWM1CONbits.P1DC4 // bit 4 2978 #define P1DC5 PWM1CONbits.P1DC5 // bit 5 2979 #define P1DC6 PWM1CONbits.P1DC6 // bit 6 2980 #define P1RSEN PWM1CONbits.P1RSEN // bit 7 2981 2982 #define RX9D RCSTAbits.RX9D // bit 0 2983 #define OERR RCSTAbits.OERR // bit 1 2984 #define FERR RCSTAbits.FERR // bit 2 2985 #define ADDEN RCSTAbits.ADDEN // bit 3 2986 #define CREN RCSTAbits.CREN // bit 4 2987 #define SREN RCSTAbits.SREN // bit 5 2988 #define RX9 RCSTAbits.RX9 // bit 6 2989 #define SPEN RCSTAbits.SPEN // bit 7 2990 2991 #define SRPR SRCON0bits.SRPR // bit 0 2992 #define SRPS SRCON0bits.SRPS // bit 1 2993 #define SRNQEN SRCON0bits.SRNQEN // bit 2 2994 #define SRQEN SRCON0bits.SRQEN // bit 3 2995 #define SRCLK0 SRCON0bits.SRCLK0 // bit 4 2996 #define SRCLK1 SRCON0bits.SRCLK1 // bit 5 2997 #define SRCLK2 SRCON0bits.SRCLK2 // bit 6 2998 #define SRLEN SRCON0bits.SRLEN // bit 7 2999 3000 #define SRRC1E SRCON1bits.SRRC1E // bit 0 3001 #define SRRCKE SRCON1bits.SRRCKE // bit 2 3002 #define SRRPE SRCON1bits.SRRPE // bit 3 3003 #define SRSC1E SRCON1bits.SRSC1E // bit 4 3004 #define SRSCKE SRCON1bits.SRSCKE // bit 6 3005 #define SRSPE SRCON1bits.SRSPE // bit 7 3006 3007 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0 3008 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1 3009 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2 3010 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3 3011 #define CKP SSP1CON1bits.CKP // bit 4 3012 #define SSPEN SSP1CON1bits.SSPEN // bit 5 3013 #define SSPOV SSP1CON1bits.SSPOV // bit 6 3014 #define WCOL SSP1CON1bits.WCOL // bit 7 3015 3016 #define SEN SSP1CON2bits.SEN // bit 0 3017 #define RSEN SSP1CON2bits.RSEN // bit 1 3018 #define PEN SSP1CON2bits.PEN // bit 2 3019 #define RCEN SSP1CON2bits.RCEN // bit 3 3020 #define ACKEN SSP1CON2bits.ACKEN // bit 4 3021 #define ACKDT SSP1CON2bits.ACKDT // bit 5 3022 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6 3023 #define GCEN SSP1CON2bits.GCEN // bit 7 3024 3025 #define DHEN SSP1CON3bits.DHEN // bit 0 3026 #define AHEN SSP1CON3bits.AHEN // bit 1 3027 #define SBCDE SSP1CON3bits.SBCDE // bit 2 3028 #define SDAHT SSP1CON3bits.SDAHT // bit 3 3029 #define BOEN SSP1CON3bits.BOEN // bit 4 3030 #define SCIE SSP1CON3bits.SCIE // bit 5 3031 #define PCIE SSP1CON3bits.PCIE // bit 6 3032 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7 3033 3034 #define BF SSP1STATbits.BF // bit 0 3035 #define UA SSP1STATbits.UA // bit 1 3036 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2 3037 #define S SSP1STATbits.S // bit 3 3038 #define P SSP1STATbits.P // bit 4 3039 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5 3040 #define CKE SSP1STATbits.CKE // bit 6 3041 #define SMP SSP1STATbits.SMP // bit 7 3042 3043 #define C STATUSbits.C // bit 0 3044 #define DC STATUSbits.DC // bit 1 3045 #define Z STATUSbits.Z // bit 2 3046 #define NOT_PD STATUSbits.NOT_PD // bit 3 3047 #define NOT_TO STATUSbits.NOT_TO // bit 4 3048 3049 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0 3050 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1 3051 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2 3052 3053 #define TMR1ON T1CONbits.TMR1ON // bit 0 3054 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 3055 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 3056 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 3057 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 3058 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6 3059 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7 3060 3061 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0 3062 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1 3063 #define T1GVAL T1GCONbits.T1GVAL // bit 2 3064 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits 3065 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits 3066 #define T1GSPM T1GCONbits.T1GSPM // bit 4 3067 #define T1GTM T1GCONbits.T1GTM // bit 5 3068 #define T1GPOL T1GCONbits.T1GPOL // bit 6 3069 #define TMR1GE T1GCONbits.TMR1GE // bit 7 3070 3071 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 3072 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 3073 #define TMR2ON T2CONbits.TMR2ON // bit 2 3074 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3 3075 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4 3076 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5 3077 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6 3078 3079 #define TRISA0 TRISAbits.TRISA0 // bit 0 3080 #define TRISA1 TRISAbits.TRISA1 // bit 1 3081 #define TRISA2 TRISAbits.TRISA2 // bit 2 3082 #define TRISA3 TRISAbits.TRISA3 // bit 3 3083 #define TRISA4 TRISAbits.TRISA4 // bit 4 3084 #define TRISA5 TRISAbits.TRISA5 // bit 5 3085 3086 #define TX9D TXSTAbits.TX9D // bit 0 3087 #define TRMT TXSTAbits.TRMT // bit 1 3088 #define BRGH TXSTAbits.BRGH // bit 2 3089 #define SENDB TXSTAbits.SENDB // bit 3 3090 #define SYNC TXSTAbits.SYNC // bit 4 3091 #define TXEN TXSTAbits.TXEN // bit 5 3092 #define TX9 TXSTAbits.TX9 // bit 6 3093 #define CSRC TXSTAbits.CSRC // bit 7 3094 3095 #define VREGPM0 VREGCONbits.VREGPM0 // bit 0 3096 #define VREGPM1 VREGCONbits.VREGPM1 // bit 1 3097 3098 #define SWDTEN WDTCONbits.SWDTEN // bit 0 3099 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 3100 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 3101 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 3102 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 3103 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5 3104 3105 #define WPUA0 WPUAbits.WPUA0 // bit 0 3106 #define WPUA1 WPUAbits.WPUA1 // bit 1 3107 #define WPUA2 WPUAbits.WPUA2 // bit 2 3108 #define WPUA3 WPUAbits.WPUA3 // bit 3 3109 #define WPUA4 WPUAbits.WPUA4 // bit 4 3110 #define WPUA5 WPUAbits.WPUA5 // bit 5 3111 3112 #endif // #ifndef NO_BIT_DEFINES 3113 3114 #endif // #ifndef __PIC12F1840_H__ 3115