1 /* 2 * This declarations of the PIC12LF1840 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:21 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC12LF1840_H__ 26 #define __PIC12LF1840_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF0_ADDR 0x0000 37 #define INDF1_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR0_ADDR 0x0004 41 #define FSR0L_ADDR 0x0004 42 #define FSR0H_ADDR 0x0005 43 #define FSR1_ADDR 0x0006 44 #define FSR1L_ADDR 0x0006 45 #define FSR1H_ADDR 0x0007 46 #define BSR_ADDR 0x0008 47 #define WREG_ADDR 0x0009 48 #define PCLATH_ADDR 0x000A 49 #define INTCON_ADDR 0x000B 50 #define PORTA_ADDR 0x000C 51 #define PIR1_ADDR 0x0011 52 #define PIR2_ADDR 0x0012 53 #define TMR0_ADDR 0x0015 54 #define TMR1_ADDR 0x0016 55 #define TMR1L_ADDR 0x0016 56 #define TMR1H_ADDR 0x0017 57 #define T1CON_ADDR 0x0018 58 #define T1GCON_ADDR 0x0019 59 #define TMR2_ADDR 0x001A 60 #define PR2_ADDR 0x001B 61 #define T2CON_ADDR 0x001C 62 #define CPSCON0_ADDR 0x001E 63 #define CPSCON1_ADDR 0x001F 64 #define TRISA_ADDR 0x008C 65 #define PIE1_ADDR 0x0091 66 #define PIE2_ADDR 0x0092 67 #define OPTION_REG_ADDR 0x0095 68 #define PCON_ADDR 0x0096 69 #define WDTCON_ADDR 0x0097 70 #define OSCTUNE_ADDR 0x0098 71 #define OSCCON_ADDR 0x0099 72 #define OSCSTAT_ADDR 0x009A 73 #define ADRES_ADDR 0x009B 74 #define ADRESL_ADDR 0x009B 75 #define ADRESH_ADDR 0x009C 76 #define ADCON0_ADDR 0x009D 77 #define ADCON1_ADDR 0x009E 78 #define LATA_ADDR 0x010C 79 #define CM1CON0_ADDR 0x0111 80 #define CM1CON1_ADDR 0x0112 81 #define CMOUT_ADDR 0x0115 82 #define BORCON_ADDR 0x0116 83 #define FVRCON_ADDR 0x0117 84 #define DACCON0_ADDR 0x0118 85 #define DACCON1_ADDR 0x0119 86 #define SRCON0_ADDR 0x011A 87 #define SRCON1_ADDR 0x011B 88 #define APFCON_ADDR 0x011D 89 #define APFCON0_ADDR 0x011D 90 #define ANSELA_ADDR 0x018C 91 #define EEADR_ADDR 0x0191 92 #define EEADRL_ADDR 0x0191 93 #define EEADRH_ADDR 0x0192 94 #define EEDAT_ADDR 0x0193 95 #define EEDATL_ADDR 0x0193 96 #define EEDATH_ADDR 0x0194 97 #define EECON1_ADDR 0x0195 98 #define EECON2_ADDR 0x0196 99 #define RCREG_ADDR 0x0199 100 #define TXREG_ADDR 0x019A 101 #define SP1BRG_ADDR 0x019B 102 #define SP1BRGL_ADDR 0x019B 103 #define SPBRG_ADDR 0x019B 104 #define SPBRGL_ADDR 0x019B 105 #define SP1BRGH_ADDR 0x019C 106 #define SPBRGH_ADDR 0x019C 107 #define RCSTA_ADDR 0x019D 108 #define TXSTA_ADDR 0x019E 109 #define BAUDCON_ADDR 0x019F 110 #define WPUA_ADDR 0x020C 111 #define SSP1BUF_ADDR 0x0211 112 #define SSPBUF_ADDR 0x0211 113 #define SSP1ADD_ADDR 0x0212 114 #define SSPADD_ADDR 0x0212 115 #define SSP1MSK_ADDR 0x0213 116 #define SSPMSK_ADDR 0x0213 117 #define SSP1STAT_ADDR 0x0214 118 #define SSPSTAT_ADDR 0x0214 119 #define SSP1CON1_ADDR 0x0215 120 #define SSPCON_ADDR 0x0215 121 #define SSPCON1_ADDR 0x0215 122 #define SSP1CON2_ADDR 0x0216 123 #define SSPCON2_ADDR 0x0216 124 #define SSP1CON3_ADDR 0x0217 125 #define SSPCON3_ADDR 0x0217 126 #define CCPR1_ADDR 0x0291 127 #define CCPR1L_ADDR 0x0291 128 #define CCPR1H_ADDR 0x0292 129 #define CCP1CON_ADDR 0x0293 130 #define PWM1CON_ADDR 0x0294 131 #define CCP1AS_ADDR 0x0295 132 #define ECCP1AS_ADDR 0x0295 133 #define PSTR1CON_ADDR 0x0296 134 #define IOCAP_ADDR 0x0391 135 #define IOCAN_ADDR 0x0392 136 #define IOCAF_ADDR 0x0393 137 #define CLKRCON_ADDR 0x039A 138 #define MDCON_ADDR 0x039C 139 #define MDSRC_ADDR 0x039D 140 #define MDCARL_ADDR 0x039E 141 #define MDCARH_ADDR 0x039F 142 #define STATUS_SHAD_ADDR 0x0FE4 143 #define WREG_SHAD_ADDR 0x0FE5 144 #define BSR_SHAD_ADDR 0x0FE6 145 #define PCLATH_SHAD_ADDR 0x0FE7 146 #define FSR0L_SHAD_ADDR 0x0FE8 147 #define FSR0H_SHAD_ADDR 0x0FE9 148 #define FSR1L_SHAD_ADDR 0x0FEA 149 #define FSR1H_SHAD_ADDR 0x0FEB 150 #define STKPTR_ADDR 0x0FED 151 #define TOSL_ADDR 0x0FEE 152 #define TOSH_ADDR 0x0FEF 153 154 #endif // #ifndef NO_ADDR_DEFINES 155 156 //============================================================================== 157 // 158 // Register Definitions 159 // 160 //============================================================================== 161 162 extern __at(0x0000) __sfr INDF0; 163 extern __at(0x0001) __sfr INDF1; 164 extern __at(0x0002) __sfr PCL; 165 166 //============================================================================== 167 // STATUS Bits 168 169 extern __at(0x0003) __sfr STATUS; 170 171 typedef struct 172 { 173 unsigned C : 1; 174 unsigned DC : 1; 175 unsigned Z : 1; 176 unsigned NOT_PD : 1; 177 unsigned NOT_TO : 1; 178 unsigned : 1; 179 unsigned : 1; 180 unsigned : 1; 181 } __STATUSbits_t; 182 183 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 184 185 #define _C 0x01 186 #define _DC 0x02 187 #define _Z 0x04 188 #define _NOT_PD 0x08 189 #define _NOT_TO 0x10 190 191 //============================================================================== 192 193 extern __at(0x0004) __sfr FSR0; 194 extern __at(0x0004) __sfr FSR0L; 195 extern __at(0x0005) __sfr FSR0H; 196 extern __at(0x0006) __sfr FSR1; 197 extern __at(0x0006) __sfr FSR1L; 198 extern __at(0x0007) __sfr FSR1H; 199 200 //============================================================================== 201 // BSR Bits 202 203 extern __at(0x0008) __sfr BSR; 204 205 typedef union 206 { 207 struct 208 { 209 unsigned BSR0 : 1; 210 unsigned BSR1 : 1; 211 unsigned BSR2 : 1; 212 unsigned BSR3 : 1; 213 unsigned BSR4 : 1; 214 unsigned : 1; 215 unsigned : 1; 216 unsigned : 1; 217 }; 218 219 struct 220 { 221 unsigned BSR : 5; 222 unsigned : 3; 223 }; 224 } __BSRbits_t; 225 226 extern __at(0x0008) volatile __BSRbits_t BSRbits; 227 228 #define _BSR0 0x01 229 #define _BSR1 0x02 230 #define _BSR2 0x04 231 #define _BSR3 0x08 232 #define _BSR4 0x10 233 234 //============================================================================== 235 236 extern __at(0x0009) __sfr WREG; 237 extern __at(0x000A) __sfr PCLATH; 238 239 //============================================================================== 240 // INTCON Bits 241 242 extern __at(0x000B) __sfr INTCON; 243 244 typedef union 245 { 246 struct 247 { 248 unsigned IOCIF : 1; 249 unsigned INTF : 1; 250 unsigned TMR0IF : 1; 251 unsigned IOCIE : 1; 252 unsigned INTE : 1; 253 unsigned TMR0IE : 1; 254 unsigned PEIE : 1; 255 unsigned GIE : 1; 256 }; 257 258 struct 259 { 260 unsigned : 1; 261 unsigned : 1; 262 unsigned T0IF : 1; 263 unsigned : 1; 264 unsigned : 1; 265 unsigned T0IE : 1; 266 unsigned : 1; 267 unsigned : 1; 268 }; 269 } __INTCONbits_t; 270 271 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 272 273 #define _IOCIF 0x01 274 #define _INTF 0x02 275 #define _TMR0IF 0x04 276 #define _T0IF 0x04 277 #define _IOCIE 0x08 278 #define _INTE 0x10 279 #define _TMR0IE 0x20 280 #define _T0IE 0x20 281 #define _PEIE 0x40 282 #define _GIE 0x80 283 284 //============================================================================== 285 286 287 //============================================================================== 288 // PORTA Bits 289 290 extern __at(0x000C) __sfr PORTA; 291 292 typedef union 293 { 294 struct 295 { 296 unsigned RA0 : 1; 297 unsigned RA1 : 1; 298 unsigned RA2 : 1; 299 unsigned RA3 : 1; 300 unsigned RA4 : 1; 301 unsigned RA5 : 1; 302 unsigned : 1; 303 unsigned : 1; 304 }; 305 306 struct 307 { 308 unsigned RA : 6; 309 unsigned : 2; 310 }; 311 } __PORTAbits_t; 312 313 extern __at(0x000C) volatile __PORTAbits_t PORTAbits; 314 315 #define _RA0 0x01 316 #define _RA1 0x02 317 #define _RA2 0x04 318 #define _RA3 0x08 319 #define _RA4 0x10 320 #define _RA5 0x20 321 322 //============================================================================== 323 324 325 //============================================================================== 326 // PIR1 Bits 327 328 extern __at(0x0011) __sfr PIR1; 329 330 typedef struct 331 { 332 unsigned TMR1IF : 1; 333 unsigned TMR2IF : 1; 334 unsigned CCP1IF : 1; 335 unsigned SSP1IF : 1; 336 unsigned TXIF : 1; 337 unsigned RCIF : 1; 338 unsigned ADIF : 1; 339 unsigned TMR1GIF : 1; 340 } __PIR1bits_t; 341 342 extern __at(0x0011) volatile __PIR1bits_t PIR1bits; 343 344 #define _TMR1IF 0x01 345 #define _TMR2IF 0x02 346 #define _CCP1IF 0x04 347 #define _SSP1IF 0x08 348 #define _TXIF 0x10 349 #define _RCIF 0x20 350 #define _ADIF 0x40 351 #define _TMR1GIF 0x80 352 353 //============================================================================== 354 355 356 //============================================================================== 357 // PIR2 Bits 358 359 extern __at(0x0012) __sfr PIR2; 360 361 typedef struct 362 { 363 unsigned : 1; 364 unsigned : 1; 365 unsigned : 1; 366 unsigned BCL1IF : 1; 367 unsigned EEIF : 1; 368 unsigned C1IF : 1; 369 unsigned : 1; 370 unsigned OSFIF : 1; 371 } __PIR2bits_t; 372 373 extern __at(0x0012) volatile __PIR2bits_t PIR2bits; 374 375 #define _BCL1IF 0x08 376 #define _EEIF 0x10 377 #define _C1IF 0x20 378 #define _OSFIF 0x80 379 380 //============================================================================== 381 382 extern __at(0x0015) __sfr TMR0; 383 extern __at(0x0016) __sfr TMR1; 384 extern __at(0x0016) __sfr TMR1L; 385 extern __at(0x0017) __sfr TMR1H; 386 387 //============================================================================== 388 // T1CON Bits 389 390 extern __at(0x0018) __sfr T1CON; 391 392 typedef union 393 { 394 struct 395 { 396 unsigned TMR1ON : 1; 397 unsigned : 1; 398 unsigned NOT_T1SYNC : 1; 399 unsigned T1OSCEN : 1; 400 unsigned T1CKPS0 : 1; 401 unsigned T1CKPS1 : 1; 402 unsigned TMR1CS0 : 1; 403 unsigned TMR1CS1 : 1; 404 }; 405 406 struct 407 { 408 unsigned : 4; 409 unsigned T1CKPS : 2; 410 unsigned : 2; 411 }; 412 413 struct 414 { 415 unsigned : 6; 416 unsigned TMR1CS : 2; 417 }; 418 } __T1CONbits_t; 419 420 extern __at(0x0018) volatile __T1CONbits_t T1CONbits; 421 422 #define _TMR1ON 0x01 423 #define _NOT_T1SYNC 0x04 424 #define _T1OSCEN 0x08 425 #define _T1CKPS0 0x10 426 #define _T1CKPS1 0x20 427 #define _TMR1CS0 0x40 428 #define _TMR1CS1 0x80 429 430 //============================================================================== 431 432 433 //============================================================================== 434 // T1GCON Bits 435 436 extern __at(0x0019) __sfr T1GCON; 437 438 typedef union 439 { 440 struct 441 { 442 unsigned T1GSS0 : 1; 443 unsigned T1GSS1 : 1; 444 unsigned T1GVAL : 1; 445 unsigned T1GGO_NOT_DONE : 1; 446 unsigned T1GSPM : 1; 447 unsigned T1GTM : 1; 448 unsigned T1GPOL : 1; 449 unsigned TMR1GE : 1; 450 }; 451 452 struct 453 { 454 unsigned : 1; 455 unsigned : 1; 456 unsigned : 1; 457 unsigned T1GGO : 1; 458 unsigned : 1; 459 unsigned : 1; 460 unsigned : 1; 461 unsigned : 1; 462 }; 463 464 struct 465 { 466 unsigned T1GSS : 2; 467 unsigned : 6; 468 }; 469 } __T1GCONbits_t; 470 471 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 472 473 #define _T1GSS0 0x01 474 #define _T1GSS1 0x02 475 #define _T1GVAL 0x04 476 #define _T1GGO_NOT_DONE 0x08 477 #define _T1GGO 0x08 478 #define _T1GSPM 0x10 479 #define _T1GTM 0x20 480 #define _T1GPOL 0x40 481 #define _TMR1GE 0x80 482 483 //============================================================================== 484 485 extern __at(0x001A) __sfr TMR2; 486 extern __at(0x001B) __sfr PR2; 487 488 //============================================================================== 489 // T2CON Bits 490 491 extern __at(0x001C) __sfr T2CON; 492 493 typedef union 494 { 495 struct 496 { 497 unsigned T2CKPS0 : 1; 498 unsigned T2CKPS1 : 1; 499 unsigned TMR2ON : 1; 500 unsigned T2OUTPS0 : 1; 501 unsigned T2OUTPS1 : 1; 502 unsigned T2OUTPS2 : 1; 503 unsigned T2OUTPS3 : 1; 504 unsigned : 1; 505 }; 506 507 struct 508 { 509 unsigned T2CKPS : 2; 510 unsigned : 6; 511 }; 512 513 struct 514 { 515 unsigned : 3; 516 unsigned T2OUTPS : 4; 517 unsigned : 1; 518 }; 519 } __T2CONbits_t; 520 521 extern __at(0x001C) volatile __T2CONbits_t T2CONbits; 522 523 #define _T2CKPS0 0x01 524 #define _T2CKPS1 0x02 525 #define _TMR2ON 0x04 526 #define _T2OUTPS0 0x08 527 #define _T2OUTPS1 0x10 528 #define _T2OUTPS2 0x20 529 #define _T2OUTPS3 0x40 530 531 //============================================================================== 532 533 534 //============================================================================== 535 // CPSCON0 Bits 536 537 extern __at(0x001E) __sfr CPSCON0; 538 539 typedef union 540 { 541 struct 542 { 543 unsigned T0XCS : 1; 544 unsigned CPSOUT : 1; 545 unsigned CPSRNG0 : 1; 546 unsigned CPSRNG1 : 1; 547 unsigned : 1; 548 unsigned : 1; 549 unsigned CPSRM : 1; 550 unsigned CPSON : 1; 551 }; 552 553 struct 554 { 555 unsigned : 2; 556 unsigned CPSRNG : 2; 557 unsigned : 4; 558 }; 559 } __CPSCON0bits_t; 560 561 extern __at(0x001E) volatile __CPSCON0bits_t CPSCON0bits; 562 563 #define _T0XCS 0x01 564 #define _CPSOUT 0x02 565 #define _CPSRNG0 0x04 566 #define _CPSRNG1 0x08 567 #define _CPSRM 0x40 568 #define _CPSON 0x80 569 570 //============================================================================== 571 572 573 //============================================================================== 574 // CPSCON1 Bits 575 576 extern __at(0x001F) __sfr CPSCON1; 577 578 typedef union 579 { 580 struct 581 { 582 unsigned CPSCH0 : 1; 583 unsigned CPSCH1 : 1; 584 unsigned : 1; 585 unsigned : 1; 586 unsigned : 1; 587 unsigned : 1; 588 unsigned : 1; 589 unsigned : 1; 590 }; 591 592 struct 593 { 594 unsigned CPSCH : 2; 595 unsigned : 6; 596 }; 597 } __CPSCON1bits_t; 598 599 extern __at(0x001F) volatile __CPSCON1bits_t CPSCON1bits; 600 601 #define _CPSCH0 0x01 602 #define _CPSCH1 0x02 603 604 //============================================================================== 605 606 607 //============================================================================== 608 // TRISA Bits 609 610 extern __at(0x008C) __sfr TRISA; 611 612 typedef union 613 { 614 struct 615 { 616 unsigned TRISA0 : 1; 617 unsigned TRISA1 : 1; 618 unsigned TRISA2 : 1; 619 unsigned TRISA3 : 1; 620 unsigned TRISA4 : 1; 621 unsigned TRISA5 : 1; 622 unsigned : 1; 623 unsigned : 1; 624 }; 625 626 struct 627 { 628 unsigned TRISA : 6; 629 unsigned : 2; 630 }; 631 } __TRISAbits_t; 632 633 extern __at(0x008C) volatile __TRISAbits_t TRISAbits; 634 635 #define _TRISA0 0x01 636 #define _TRISA1 0x02 637 #define _TRISA2 0x04 638 #define _TRISA3 0x08 639 #define _TRISA4 0x10 640 #define _TRISA5 0x20 641 642 //============================================================================== 643 644 645 //============================================================================== 646 // PIE1 Bits 647 648 extern __at(0x0091) __sfr PIE1; 649 650 typedef struct 651 { 652 unsigned TMR1IE : 1; 653 unsigned TMR2IE : 1; 654 unsigned CCP1IE : 1; 655 unsigned SSP1IE : 1; 656 unsigned TXIE : 1; 657 unsigned RCIE : 1; 658 unsigned ADIE : 1; 659 unsigned TMR1GIE : 1; 660 } __PIE1bits_t; 661 662 extern __at(0x0091) volatile __PIE1bits_t PIE1bits; 663 664 #define _TMR1IE 0x01 665 #define _TMR2IE 0x02 666 #define _CCP1IE 0x04 667 #define _SSP1IE 0x08 668 #define _TXIE 0x10 669 #define _RCIE 0x20 670 #define _ADIE 0x40 671 #define _TMR1GIE 0x80 672 673 //============================================================================== 674 675 676 //============================================================================== 677 // PIE2 Bits 678 679 extern __at(0x0092) __sfr PIE2; 680 681 typedef struct 682 { 683 unsigned : 1; 684 unsigned : 1; 685 unsigned : 1; 686 unsigned BCL1IE : 1; 687 unsigned EEIE : 1; 688 unsigned C1IE : 1; 689 unsigned : 1; 690 unsigned OSFIE : 1; 691 } __PIE2bits_t; 692 693 extern __at(0x0092) volatile __PIE2bits_t PIE2bits; 694 695 #define _BCL1IE 0x08 696 #define _EEIE 0x10 697 #define _C1IE 0x20 698 #define _OSFIE 0x80 699 700 //============================================================================== 701 702 703 //============================================================================== 704 // OPTION_REG Bits 705 706 extern __at(0x0095) __sfr OPTION_REG; 707 708 typedef union 709 { 710 struct 711 { 712 unsigned PS0 : 1; 713 unsigned PS1 : 1; 714 unsigned PS2 : 1; 715 unsigned PSA : 1; 716 unsigned TMR0SE : 1; 717 unsigned TMR0CS : 1; 718 unsigned INTEDG : 1; 719 unsigned NOT_WPUEN : 1; 720 }; 721 722 struct 723 { 724 unsigned : 1; 725 unsigned : 1; 726 unsigned : 1; 727 unsigned : 1; 728 unsigned T0SE : 1; 729 unsigned T0CS : 1; 730 unsigned : 1; 731 unsigned : 1; 732 }; 733 734 struct 735 { 736 unsigned PS : 3; 737 unsigned : 5; 738 }; 739 } __OPTION_REGbits_t; 740 741 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 742 743 #define _PS0 0x01 744 #define _PS1 0x02 745 #define _PS2 0x04 746 #define _PSA 0x08 747 #define _TMR0SE 0x10 748 #define _T0SE 0x10 749 #define _TMR0CS 0x20 750 #define _T0CS 0x20 751 #define _INTEDG 0x40 752 #define _NOT_WPUEN 0x80 753 754 //============================================================================== 755 756 757 //============================================================================== 758 // PCON Bits 759 760 extern __at(0x0096) __sfr PCON; 761 762 typedef struct 763 { 764 unsigned NOT_BOR : 1; 765 unsigned NOT_POR : 1; 766 unsigned NOT_RI : 1; 767 unsigned NOT_RMCLR : 1; 768 unsigned : 1; 769 unsigned : 1; 770 unsigned STKUNF : 1; 771 unsigned STKOVF : 1; 772 } __PCONbits_t; 773 774 extern __at(0x0096) volatile __PCONbits_t PCONbits; 775 776 #define _NOT_BOR 0x01 777 #define _NOT_POR 0x02 778 #define _NOT_RI 0x04 779 #define _NOT_RMCLR 0x08 780 #define _STKUNF 0x40 781 #define _STKOVF 0x80 782 783 //============================================================================== 784 785 786 //============================================================================== 787 // WDTCON Bits 788 789 extern __at(0x0097) __sfr WDTCON; 790 791 typedef union 792 { 793 struct 794 { 795 unsigned SWDTEN : 1; 796 unsigned WDTPS0 : 1; 797 unsigned WDTPS1 : 1; 798 unsigned WDTPS2 : 1; 799 unsigned WDTPS3 : 1; 800 unsigned WDTPS4 : 1; 801 unsigned : 1; 802 unsigned : 1; 803 }; 804 805 struct 806 { 807 unsigned : 1; 808 unsigned WDTPS : 5; 809 unsigned : 2; 810 }; 811 } __WDTCONbits_t; 812 813 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 814 815 #define _SWDTEN 0x01 816 #define _WDTPS0 0x02 817 #define _WDTPS1 0x04 818 #define _WDTPS2 0x08 819 #define _WDTPS3 0x10 820 #define _WDTPS4 0x20 821 822 //============================================================================== 823 824 825 //============================================================================== 826 // OSCTUNE Bits 827 828 extern __at(0x0098) __sfr OSCTUNE; 829 830 typedef union 831 { 832 struct 833 { 834 unsigned TUN0 : 1; 835 unsigned TUN1 : 1; 836 unsigned TUN2 : 1; 837 unsigned TUN3 : 1; 838 unsigned TUN4 : 1; 839 unsigned TUN5 : 1; 840 unsigned : 1; 841 unsigned : 1; 842 }; 843 844 struct 845 { 846 unsigned TUN : 6; 847 unsigned : 2; 848 }; 849 } __OSCTUNEbits_t; 850 851 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 852 853 #define _TUN0 0x01 854 #define _TUN1 0x02 855 #define _TUN2 0x04 856 #define _TUN3 0x08 857 #define _TUN4 0x10 858 #define _TUN5 0x20 859 860 //============================================================================== 861 862 863 //============================================================================== 864 // OSCCON Bits 865 866 extern __at(0x0099) __sfr OSCCON; 867 868 typedef union 869 { 870 struct 871 { 872 unsigned SCS0 : 1; 873 unsigned SCS1 : 1; 874 unsigned : 1; 875 unsigned IRCF0 : 1; 876 unsigned IRCF1 : 1; 877 unsigned IRCF2 : 1; 878 unsigned IRCF3 : 1; 879 unsigned SPLLEN : 1; 880 }; 881 882 struct 883 { 884 unsigned SCS : 2; 885 unsigned : 6; 886 }; 887 888 struct 889 { 890 unsigned : 3; 891 unsigned IRCF : 4; 892 unsigned : 1; 893 }; 894 } __OSCCONbits_t; 895 896 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 897 898 #define _SCS0 0x01 899 #define _SCS1 0x02 900 #define _IRCF0 0x08 901 #define _IRCF1 0x10 902 #define _IRCF2 0x20 903 #define _IRCF3 0x40 904 #define _SPLLEN 0x80 905 906 //============================================================================== 907 908 909 //============================================================================== 910 // OSCSTAT Bits 911 912 extern __at(0x009A) __sfr OSCSTAT; 913 914 typedef struct 915 { 916 unsigned HFIOFS : 1; 917 unsigned LFIOFR : 1; 918 unsigned MFIOFR : 1; 919 unsigned HFIOFL : 1; 920 unsigned HFIOFR : 1; 921 unsigned OSTS : 1; 922 unsigned PLLR : 1; 923 unsigned T1OSCR : 1; 924 } __OSCSTATbits_t; 925 926 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 927 928 #define _HFIOFS 0x01 929 #define _LFIOFR 0x02 930 #define _MFIOFR 0x04 931 #define _HFIOFL 0x08 932 #define _HFIOFR 0x10 933 #define _OSTS 0x20 934 #define _PLLR 0x40 935 #define _T1OSCR 0x80 936 937 //============================================================================== 938 939 extern __at(0x009B) __sfr ADRES; 940 extern __at(0x009B) __sfr ADRESL; 941 extern __at(0x009C) __sfr ADRESH; 942 943 //============================================================================== 944 // ADCON0 Bits 945 946 extern __at(0x009D) __sfr ADCON0; 947 948 typedef union 949 { 950 struct 951 { 952 unsigned ADON : 1; 953 unsigned GO_NOT_DONE : 1; 954 unsigned CHS0 : 1; 955 unsigned CHS1 : 1; 956 unsigned CHS2 : 1; 957 unsigned CHS3 : 1; 958 unsigned CHS4 : 1; 959 unsigned : 1; 960 }; 961 962 struct 963 { 964 unsigned : 1; 965 unsigned ADGO : 1; 966 unsigned : 1; 967 unsigned : 1; 968 unsigned : 1; 969 unsigned : 1; 970 unsigned : 1; 971 unsigned : 1; 972 }; 973 974 struct 975 { 976 unsigned : 1; 977 unsigned GO : 1; 978 unsigned : 1; 979 unsigned : 1; 980 unsigned : 1; 981 unsigned : 1; 982 unsigned : 1; 983 unsigned : 1; 984 }; 985 986 struct 987 { 988 unsigned : 2; 989 unsigned CHS : 5; 990 unsigned : 1; 991 }; 992 } __ADCON0bits_t; 993 994 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 995 996 #define _ADON 0x01 997 #define _GO_NOT_DONE 0x02 998 #define _ADGO 0x02 999 #define _GO 0x02 1000 #define _CHS0 0x04 1001 #define _CHS1 0x08 1002 #define _CHS2 0x10 1003 #define _CHS3 0x20 1004 #define _CHS4 0x40 1005 1006 //============================================================================== 1007 1008 1009 //============================================================================== 1010 // ADCON1 Bits 1011 1012 extern __at(0x009E) __sfr ADCON1; 1013 1014 typedef union 1015 { 1016 struct 1017 { 1018 unsigned ADPREF0 : 1; 1019 unsigned ADPREF1 : 1; 1020 unsigned : 1; 1021 unsigned : 1; 1022 unsigned ADCS0 : 1; 1023 unsigned ADCS1 : 1; 1024 unsigned ADCS2 : 1; 1025 unsigned ADFM : 1; 1026 }; 1027 1028 struct 1029 { 1030 unsigned ADPREF : 2; 1031 unsigned : 6; 1032 }; 1033 1034 struct 1035 { 1036 unsigned : 4; 1037 unsigned ADCS : 3; 1038 unsigned : 1; 1039 }; 1040 } __ADCON1bits_t; 1041 1042 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 1043 1044 #define _ADPREF0 0x01 1045 #define _ADPREF1 0x02 1046 #define _ADCS0 0x10 1047 #define _ADCS1 0x20 1048 #define _ADCS2 0x40 1049 #define _ADFM 0x80 1050 1051 //============================================================================== 1052 1053 1054 //============================================================================== 1055 // LATA Bits 1056 1057 extern __at(0x010C) __sfr LATA; 1058 1059 typedef struct 1060 { 1061 unsigned LATA0 : 1; 1062 unsigned LATA1 : 1; 1063 unsigned LATA2 : 1; 1064 unsigned : 1; 1065 unsigned LATA4 : 1; 1066 unsigned LATA5 : 1; 1067 unsigned : 1; 1068 unsigned : 1; 1069 } __LATAbits_t; 1070 1071 extern __at(0x010C) volatile __LATAbits_t LATAbits; 1072 1073 #define _LATA0 0x01 1074 #define _LATA1 0x02 1075 #define _LATA2 0x04 1076 #define _LATA4 0x10 1077 #define _LATA5 0x20 1078 1079 //============================================================================== 1080 1081 1082 //============================================================================== 1083 // CM1CON0 Bits 1084 1085 extern __at(0x0111) __sfr CM1CON0; 1086 1087 typedef struct 1088 { 1089 unsigned C1SYNC : 1; 1090 unsigned C1HYS : 1; 1091 unsigned C1SP : 1; 1092 unsigned : 1; 1093 unsigned C1POL : 1; 1094 unsigned C1OE : 1; 1095 unsigned C1OUT : 1; 1096 unsigned C1ON : 1; 1097 } __CM1CON0bits_t; 1098 1099 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 1100 1101 #define _C1SYNC 0x01 1102 #define _C1HYS 0x02 1103 #define _C1SP 0x04 1104 #define _C1POL 0x10 1105 #define _C1OE 0x20 1106 #define _C1OUT 0x40 1107 #define _C1ON 0x80 1108 1109 //============================================================================== 1110 1111 1112 //============================================================================== 1113 // CM1CON1 Bits 1114 1115 extern __at(0x0112) __sfr CM1CON1; 1116 1117 typedef union 1118 { 1119 struct 1120 { 1121 unsigned C1NCH : 1; 1122 unsigned : 1; 1123 unsigned : 1; 1124 unsigned : 1; 1125 unsigned C1PCH0 : 1; 1126 unsigned C1PCH1 : 1; 1127 unsigned C1INTN : 1; 1128 unsigned C1INTP : 1; 1129 }; 1130 1131 struct 1132 { 1133 unsigned C1NCH0 : 1; 1134 unsigned : 1; 1135 unsigned : 1; 1136 unsigned : 1; 1137 unsigned : 1; 1138 unsigned : 1; 1139 unsigned : 1; 1140 unsigned : 1; 1141 }; 1142 1143 struct 1144 { 1145 unsigned : 4; 1146 unsigned C1PCH : 2; 1147 unsigned : 2; 1148 }; 1149 } __CM1CON1bits_t; 1150 1151 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 1152 1153 #define _C1NCH 0x01 1154 #define _C1NCH0 0x01 1155 #define _C1PCH0 0x10 1156 #define _C1PCH1 0x20 1157 #define _C1INTN 0x40 1158 #define _C1INTP 0x80 1159 1160 //============================================================================== 1161 1162 1163 //============================================================================== 1164 // CMOUT Bits 1165 1166 extern __at(0x0115) __sfr CMOUT; 1167 1168 typedef struct 1169 { 1170 unsigned MC1OUT : 1; 1171 unsigned : 1; 1172 unsigned : 1; 1173 unsigned : 1; 1174 unsigned : 1; 1175 unsigned : 1; 1176 unsigned : 1; 1177 unsigned : 1; 1178 } __CMOUTbits_t; 1179 1180 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 1181 1182 #define _MC1OUT 0x01 1183 1184 //============================================================================== 1185 1186 1187 //============================================================================== 1188 // BORCON Bits 1189 1190 extern __at(0x0116) __sfr BORCON; 1191 1192 typedef struct 1193 { 1194 unsigned BORRDY : 1; 1195 unsigned : 1; 1196 unsigned : 1; 1197 unsigned : 1; 1198 unsigned : 1; 1199 unsigned : 1; 1200 unsigned BORFS : 1; 1201 unsigned SBOREN : 1; 1202 } __BORCONbits_t; 1203 1204 extern __at(0x0116) volatile __BORCONbits_t BORCONbits; 1205 1206 #define _BORRDY 0x01 1207 #define _BORFS 0x40 1208 #define _SBOREN 0x80 1209 1210 //============================================================================== 1211 1212 1213 //============================================================================== 1214 // FVRCON Bits 1215 1216 extern __at(0x0117) __sfr FVRCON; 1217 1218 typedef union 1219 { 1220 struct 1221 { 1222 unsigned ADFVR0 : 1; 1223 unsigned ADFVR1 : 1; 1224 unsigned CDAFVR0 : 1; 1225 unsigned CDAFVR1 : 1; 1226 unsigned TSRNG : 1; 1227 unsigned TSEN : 1; 1228 unsigned FVRRDY : 1; 1229 unsigned FVREN : 1; 1230 }; 1231 1232 struct 1233 { 1234 unsigned ADFVR : 2; 1235 unsigned : 6; 1236 }; 1237 1238 struct 1239 { 1240 unsigned : 2; 1241 unsigned CDAFVR : 2; 1242 unsigned : 4; 1243 }; 1244 } __FVRCONbits_t; 1245 1246 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 1247 1248 #define _ADFVR0 0x01 1249 #define _ADFVR1 0x02 1250 #define _CDAFVR0 0x04 1251 #define _CDAFVR1 0x08 1252 #define _TSRNG 0x10 1253 #define _TSEN 0x20 1254 #define _FVRRDY 0x40 1255 #define _FVREN 0x80 1256 1257 //============================================================================== 1258 1259 1260 //============================================================================== 1261 // DACCON0 Bits 1262 1263 extern __at(0x0118) __sfr DACCON0; 1264 1265 typedef union 1266 { 1267 struct 1268 { 1269 unsigned : 1; 1270 unsigned : 1; 1271 unsigned DACPSS0 : 1; 1272 unsigned DACPSS1 : 1; 1273 unsigned : 1; 1274 unsigned DACOE : 1; 1275 unsigned DACLPS : 1; 1276 unsigned DACEN : 1; 1277 }; 1278 1279 struct 1280 { 1281 unsigned : 2; 1282 unsigned DACPSS : 2; 1283 unsigned : 4; 1284 }; 1285 } __DACCON0bits_t; 1286 1287 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits; 1288 1289 #define _DACPSS0 0x04 1290 #define _DACPSS1 0x08 1291 #define _DACOE 0x20 1292 #define _DACLPS 0x40 1293 #define _DACEN 0x80 1294 1295 //============================================================================== 1296 1297 1298 //============================================================================== 1299 // DACCON1 Bits 1300 1301 extern __at(0x0119) __sfr DACCON1; 1302 1303 typedef union 1304 { 1305 struct 1306 { 1307 unsigned DACR0 : 1; 1308 unsigned DACR1 : 1; 1309 unsigned DACR2 : 1; 1310 unsigned DACR3 : 1; 1311 unsigned DACR4 : 1; 1312 unsigned : 1; 1313 unsigned : 1; 1314 unsigned : 1; 1315 }; 1316 1317 struct 1318 { 1319 unsigned DACR : 5; 1320 unsigned : 3; 1321 }; 1322 } __DACCON1bits_t; 1323 1324 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits; 1325 1326 #define _DACR0 0x01 1327 #define _DACR1 0x02 1328 #define _DACR2 0x04 1329 #define _DACR3 0x08 1330 #define _DACR4 0x10 1331 1332 //============================================================================== 1333 1334 1335 //============================================================================== 1336 // SRCON0 Bits 1337 1338 extern __at(0x011A) __sfr SRCON0; 1339 1340 typedef union 1341 { 1342 struct 1343 { 1344 unsigned SRPR : 1; 1345 unsigned SRPS : 1; 1346 unsigned SRNQEN : 1; 1347 unsigned SRQEN : 1; 1348 unsigned SRCLK0 : 1; 1349 unsigned SRCLK1 : 1; 1350 unsigned SRCLK2 : 1; 1351 unsigned SRLEN : 1; 1352 }; 1353 1354 struct 1355 { 1356 unsigned : 4; 1357 unsigned SRCLK : 3; 1358 unsigned : 1; 1359 }; 1360 } __SRCON0bits_t; 1361 1362 extern __at(0x011A) volatile __SRCON0bits_t SRCON0bits; 1363 1364 #define _SRPR 0x01 1365 #define _SRPS 0x02 1366 #define _SRNQEN 0x04 1367 #define _SRQEN 0x08 1368 #define _SRCLK0 0x10 1369 #define _SRCLK1 0x20 1370 #define _SRCLK2 0x40 1371 #define _SRLEN 0x80 1372 1373 //============================================================================== 1374 1375 1376 //============================================================================== 1377 // SRCON1 Bits 1378 1379 extern __at(0x011B) __sfr SRCON1; 1380 1381 typedef struct 1382 { 1383 unsigned SRRC1E : 1; 1384 unsigned : 1; 1385 unsigned SRRCKE : 1; 1386 unsigned SRRPE : 1; 1387 unsigned SRSC1E : 1; 1388 unsigned : 1; 1389 unsigned SRSCKE : 1; 1390 unsigned SRSPE : 1; 1391 } __SRCON1bits_t; 1392 1393 extern __at(0x011B) volatile __SRCON1bits_t SRCON1bits; 1394 1395 #define _SRRC1E 0x01 1396 #define _SRRCKE 0x04 1397 #define _SRRPE 0x08 1398 #define _SRSC1E 0x10 1399 #define _SRSCKE 0x40 1400 #define _SRSPE 0x80 1401 1402 //============================================================================== 1403 1404 1405 //============================================================================== 1406 // APFCON Bits 1407 1408 extern __at(0x011D) __sfr APFCON; 1409 1410 typedef union 1411 { 1412 struct 1413 { 1414 unsigned CCP1SEL : 1; 1415 unsigned P1BSEL : 1; 1416 unsigned TXCKSEL : 1; 1417 unsigned T1GSEL : 1; 1418 unsigned : 1; 1419 unsigned SSSEL : 1; 1420 unsigned SDOSEL : 1; 1421 unsigned RXDTSEL : 1; 1422 }; 1423 1424 struct 1425 { 1426 unsigned : 1; 1427 unsigned : 1; 1428 unsigned : 1; 1429 unsigned : 1; 1430 unsigned : 1; 1431 unsigned SS1SEL : 1; 1432 unsigned SDO1SEL : 1; 1433 unsigned : 1; 1434 }; 1435 } __APFCONbits_t; 1436 1437 extern __at(0x011D) volatile __APFCONbits_t APFCONbits; 1438 1439 #define _CCP1SEL 0x01 1440 #define _P1BSEL 0x02 1441 #define _TXCKSEL 0x04 1442 #define _T1GSEL 0x08 1443 #define _SSSEL 0x20 1444 #define _SS1SEL 0x20 1445 #define _SDOSEL 0x40 1446 #define _SDO1SEL 0x40 1447 #define _RXDTSEL 0x80 1448 1449 //============================================================================== 1450 1451 1452 //============================================================================== 1453 // APFCON0 Bits 1454 1455 extern __at(0x011D) __sfr APFCON0; 1456 1457 typedef union 1458 { 1459 struct 1460 { 1461 unsigned CCP1SEL : 1; 1462 unsigned P1BSEL : 1; 1463 unsigned TXCKSEL : 1; 1464 unsigned T1GSEL : 1; 1465 unsigned : 1; 1466 unsigned SSSEL : 1; 1467 unsigned SDOSEL : 1; 1468 unsigned RXDTSEL : 1; 1469 }; 1470 1471 struct 1472 { 1473 unsigned : 1; 1474 unsigned : 1; 1475 unsigned : 1; 1476 unsigned : 1; 1477 unsigned : 1; 1478 unsigned SS1SEL : 1; 1479 unsigned SDO1SEL : 1; 1480 unsigned : 1; 1481 }; 1482 } __APFCON0bits_t; 1483 1484 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits; 1485 1486 #define _APFCON0_CCP1SEL 0x01 1487 #define _APFCON0_P1BSEL 0x02 1488 #define _APFCON0_TXCKSEL 0x04 1489 #define _APFCON0_T1GSEL 0x08 1490 #define _APFCON0_SSSEL 0x20 1491 #define _APFCON0_SS1SEL 0x20 1492 #define _APFCON0_SDOSEL 0x40 1493 #define _APFCON0_SDO1SEL 0x40 1494 #define _APFCON0_RXDTSEL 0x80 1495 1496 //============================================================================== 1497 1498 1499 //============================================================================== 1500 // ANSELA Bits 1501 1502 extern __at(0x018C) __sfr ANSELA; 1503 1504 typedef struct 1505 { 1506 unsigned ANSA0 : 1; 1507 unsigned ANSA1 : 1; 1508 unsigned ANSA2 : 1; 1509 unsigned : 1; 1510 unsigned ANSA4 : 1; 1511 unsigned : 1; 1512 unsigned : 1; 1513 unsigned : 1; 1514 } __ANSELAbits_t; 1515 1516 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 1517 1518 #define _ANSA0 0x01 1519 #define _ANSA1 0x02 1520 #define _ANSA2 0x04 1521 #define _ANSA4 0x10 1522 1523 //============================================================================== 1524 1525 extern __at(0x0191) __sfr EEADR; 1526 extern __at(0x0191) __sfr EEADRL; 1527 extern __at(0x0192) __sfr EEADRH; 1528 extern __at(0x0193) __sfr EEDAT; 1529 extern __at(0x0193) __sfr EEDATL; 1530 extern __at(0x0194) __sfr EEDATH; 1531 1532 //============================================================================== 1533 // EECON1 Bits 1534 1535 extern __at(0x0195) __sfr EECON1; 1536 1537 typedef struct 1538 { 1539 unsigned RD : 1; 1540 unsigned WR : 1; 1541 unsigned WREN : 1; 1542 unsigned WRERR : 1; 1543 unsigned FREE : 1; 1544 unsigned LWLO : 1; 1545 unsigned CFGS : 1; 1546 unsigned EEPGD : 1; 1547 } __EECON1bits_t; 1548 1549 extern __at(0x0195) volatile __EECON1bits_t EECON1bits; 1550 1551 #define _RD 0x01 1552 #define _WR 0x02 1553 #define _WREN 0x04 1554 #define _WRERR 0x08 1555 #define _FREE 0x10 1556 #define _LWLO 0x20 1557 #define _CFGS 0x40 1558 #define _EEPGD 0x80 1559 1560 //============================================================================== 1561 1562 extern __at(0x0196) __sfr EECON2; 1563 extern __at(0x0199) __sfr RCREG; 1564 extern __at(0x019A) __sfr TXREG; 1565 extern __at(0x019B) __sfr SP1BRG; 1566 extern __at(0x019B) __sfr SP1BRGL; 1567 extern __at(0x019B) __sfr SPBRG; 1568 extern __at(0x019B) __sfr SPBRGL; 1569 extern __at(0x019C) __sfr SP1BRGH; 1570 extern __at(0x019C) __sfr SPBRGH; 1571 1572 //============================================================================== 1573 // RCSTA Bits 1574 1575 extern __at(0x019D) __sfr RCSTA; 1576 1577 typedef struct 1578 { 1579 unsigned RX9D : 1; 1580 unsigned OERR : 1; 1581 unsigned FERR : 1; 1582 unsigned ADDEN : 1; 1583 unsigned CREN : 1; 1584 unsigned SREN : 1; 1585 unsigned RX9 : 1; 1586 unsigned SPEN : 1; 1587 } __RCSTAbits_t; 1588 1589 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 1590 1591 #define _RX9D 0x01 1592 #define _OERR 0x02 1593 #define _FERR 0x04 1594 #define _ADDEN 0x08 1595 #define _CREN 0x10 1596 #define _SREN 0x20 1597 #define _RX9 0x40 1598 #define _SPEN 0x80 1599 1600 //============================================================================== 1601 1602 1603 //============================================================================== 1604 // TXSTA Bits 1605 1606 extern __at(0x019E) __sfr TXSTA; 1607 1608 typedef struct 1609 { 1610 unsigned TX9D : 1; 1611 unsigned TRMT : 1; 1612 unsigned BRGH : 1; 1613 unsigned SENDB : 1; 1614 unsigned SYNC : 1; 1615 unsigned TXEN : 1; 1616 unsigned TX9 : 1; 1617 unsigned CSRC : 1; 1618 } __TXSTAbits_t; 1619 1620 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 1621 1622 #define _TX9D 0x01 1623 #define _TRMT 0x02 1624 #define _BRGH 0x04 1625 #define _SENDB 0x08 1626 #define _SYNC 0x10 1627 #define _TXEN 0x20 1628 #define _TX9 0x40 1629 #define _CSRC 0x80 1630 1631 //============================================================================== 1632 1633 1634 //============================================================================== 1635 // BAUDCON Bits 1636 1637 extern __at(0x019F) __sfr BAUDCON; 1638 1639 typedef struct 1640 { 1641 unsigned ABDEN : 1; 1642 unsigned WUE : 1; 1643 unsigned : 1; 1644 unsigned BRG16 : 1; 1645 unsigned SCKP : 1; 1646 unsigned : 1; 1647 unsigned RCIDL : 1; 1648 unsigned ABDOVF : 1; 1649 } __BAUDCONbits_t; 1650 1651 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 1652 1653 #define _ABDEN 0x01 1654 #define _WUE 0x02 1655 #define _BRG16 0x08 1656 #define _SCKP 0x10 1657 #define _RCIDL 0x40 1658 #define _ABDOVF 0x80 1659 1660 //============================================================================== 1661 1662 1663 //============================================================================== 1664 // WPUA Bits 1665 1666 extern __at(0x020C) __sfr WPUA; 1667 1668 typedef union 1669 { 1670 struct 1671 { 1672 unsigned WPUA0 : 1; 1673 unsigned WPUA1 : 1; 1674 unsigned WPUA2 : 1; 1675 unsigned WPUA3 : 1; 1676 unsigned WPUA4 : 1; 1677 unsigned WPUA5 : 1; 1678 unsigned : 1; 1679 unsigned : 1; 1680 }; 1681 1682 struct 1683 { 1684 unsigned WPUA : 6; 1685 unsigned : 2; 1686 }; 1687 } __WPUAbits_t; 1688 1689 extern __at(0x020C) volatile __WPUAbits_t WPUAbits; 1690 1691 #define _WPUA0 0x01 1692 #define _WPUA1 0x02 1693 #define _WPUA2 0x04 1694 #define _WPUA3 0x08 1695 #define _WPUA4 0x10 1696 #define _WPUA5 0x20 1697 1698 //============================================================================== 1699 1700 extern __at(0x0211) __sfr SSP1BUF; 1701 extern __at(0x0211) __sfr SSPBUF; 1702 extern __at(0x0212) __sfr SSP1ADD; 1703 extern __at(0x0212) __sfr SSPADD; 1704 extern __at(0x0213) __sfr SSP1MSK; 1705 extern __at(0x0213) __sfr SSPMSK; 1706 1707 //============================================================================== 1708 // SSP1STAT Bits 1709 1710 extern __at(0x0214) __sfr SSP1STAT; 1711 1712 typedef struct 1713 { 1714 unsigned BF : 1; 1715 unsigned UA : 1; 1716 unsigned R_NOT_W : 1; 1717 unsigned S : 1; 1718 unsigned P : 1; 1719 unsigned D_NOT_A : 1; 1720 unsigned CKE : 1; 1721 unsigned SMP : 1; 1722 } __SSP1STATbits_t; 1723 1724 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 1725 1726 #define _BF 0x01 1727 #define _UA 0x02 1728 #define _R_NOT_W 0x04 1729 #define _S 0x08 1730 #define _P 0x10 1731 #define _D_NOT_A 0x20 1732 #define _CKE 0x40 1733 #define _SMP 0x80 1734 1735 //============================================================================== 1736 1737 1738 //============================================================================== 1739 // SSPSTAT Bits 1740 1741 extern __at(0x0214) __sfr SSPSTAT; 1742 1743 typedef struct 1744 { 1745 unsigned BF : 1; 1746 unsigned UA : 1; 1747 unsigned R_NOT_W : 1; 1748 unsigned S : 1; 1749 unsigned P : 1; 1750 unsigned D_NOT_A : 1; 1751 unsigned CKE : 1; 1752 unsigned SMP : 1; 1753 } __SSPSTATbits_t; 1754 1755 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 1756 1757 #define _SSPSTAT_BF 0x01 1758 #define _SSPSTAT_UA 0x02 1759 #define _SSPSTAT_R_NOT_W 0x04 1760 #define _SSPSTAT_S 0x08 1761 #define _SSPSTAT_P 0x10 1762 #define _SSPSTAT_D_NOT_A 0x20 1763 #define _SSPSTAT_CKE 0x40 1764 #define _SSPSTAT_SMP 0x80 1765 1766 //============================================================================== 1767 1768 1769 //============================================================================== 1770 // SSP1CON1 Bits 1771 1772 extern __at(0x0215) __sfr SSP1CON1; 1773 1774 typedef union 1775 { 1776 struct 1777 { 1778 unsigned SSPM0 : 1; 1779 unsigned SSPM1 : 1; 1780 unsigned SSPM2 : 1; 1781 unsigned SSPM3 : 1; 1782 unsigned CKP : 1; 1783 unsigned SSPEN : 1; 1784 unsigned SSPOV : 1; 1785 unsigned WCOL : 1; 1786 }; 1787 1788 struct 1789 { 1790 unsigned SSPM : 4; 1791 unsigned : 4; 1792 }; 1793 } __SSP1CON1bits_t; 1794 1795 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 1796 1797 #define _SSPM0 0x01 1798 #define _SSPM1 0x02 1799 #define _SSPM2 0x04 1800 #define _SSPM3 0x08 1801 #define _CKP 0x10 1802 #define _SSPEN 0x20 1803 #define _SSPOV 0x40 1804 #define _WCOL 0x80 1805 1806 //============================================================================== 1807 1808 1809 //============================================================================== 1810 // SSPCON Bits 1811 1812 extern __at(0x0215) __sfr SSPCON; 1813 1814 typedef union 1815 { 1816 struct 1817 { 1818 unsigned SSPM0 : 1; 1819 unsigned SSPM1 : 1; 1820 unsigned SSPM2 : 1; 1821 unsigned SSPM3 : 1; 1822 unsigned CKP : 1; 1823 unsigned SSPEN : 1; 1824 unsigned SSPOV : 1; 1825 unsigned WCOL : 1; 1826 }; 1827 1828 struct 1829 { 1830 unsigned SSPM : 4; 1831 unsigned : 4; 1832 }; 1833 } __SSPCONbits_t; 1834 1835 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 1836 1837 #define _SSPCON_SSPM0 0x01 1838 #define _SSPCON_SSPM1 0x02 1839 #define _SSPCON_SSPM2 0x04 1840 #define _SSPCON_SSPM3 0x08 1841 #define _SSPCON_CKP 0x10 1842 #define _SSPCON_SSPEN 0x20 1843 #define _SSPCON_SSPOV 0x40 1844 #define _SSPCON_WCOL 0x80 1845 1846 //============================================================================== 1847 1848 1849 //============================================================================== 1850 // SSPCON1 Bits 1851 1852 extern __at(0x0215) __sfr SSPCON1; 1853 1854 typedef union 1855 { 1856 struct 1857 { 1858 unsigned SSPM0 : 1; 1859 unsigned SSPM1 : 1; 1860 unsigned SSPM2 : 1; 1861 unsigned SSPM3 : 1; 1862 unsigned CKP : 1; 1863 unsigned SSPEN : 1; 1864 unsigned SSPOV : 1; 1865 unsigned WCOL : 1; 1866 }; 1867 1868 struct 1869 { 1870 unsigned SSPM : 4; 1871 unsigned : 4; 1872 }; 1873 } __SSPCON1bits_t; 1874 1875 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 1876 1877 #define _SSPCON1_SSPM0 0x01 1878 #define _SSPCON1_SSPM1 0x02 1879 #define _SSPCON1_SSPM2 0x04 1880 #define _SSPCON1_SSPM3 0x08 1881 #define _SSPCON1_CKP 0x10 1882 #define _SSPCON1_SSPEN 0x20 1883 #define _SSPCON1_SSPOV 0x40 1884 #define _SSPCON1_WCOL 0x80 1885 1886 //============================================================================== 1887 1888 1889 //============================================================================== 1890 // SSP1CON2 Bits 1891 1892 extern __at(0x0216) __sfr SSP1CON2; 1893 1894 typedef struct 1895 { 1896 unsigned SEN : 1; 1897 unsigned RSEN : 1; 1898 unsigned PEN : 1; 1899 unsigned RCEN : 1; 1900 unsigned ACKEN : 1; 1901 unsigned ACKDT : 1; 1902 unsigned ACKSTAT : 1; 1903 unsigned GCEN : 1; 1904 } __SSP1CON2bits_t; 1905 1906 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 1907 1908 #define _SEN 0x01 1909 #define _RSEN 0x02 1910 #define _PEN 0x04 1911 #define _RCEN 0x08 1912 #define _ACKEN 0x10 1913 #define _ACKDT 0x20 1914 #define _ACKSTAT 0x40 1915 #define _GCEN 0x80 1916 1917 //============================================================================== 1918 1919 1920 //============================================================================== 1921 // SSPCON2 Bits 1922 1923 extern __at(0x0216) __sfr SSPCON2; 1924 1925 typedef struct 1926 { 1927 unsigned SEN : 1; 1928 unsigned RSEN : 1; 1929 unsigned PEN : 1; 1930 unsigned RCEN : 1; 1931 unsigned ACKEN : 1; 1932 unsigned ACKDT : 1; 1933 unsigned ACKSTAT : 1; 1934 unsigned GCEN : 1; 1935 } __SSPCON2bits_t; 1936 1937 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 1938 1939 #define _SSPCON2_SEN 0x01 1940 #define _SSPCON2_RSEN 0x02 1941 #define _SSPCON2_PEN 0x04 1942 #define _SSPCON2_RCEN 0x08 1943 #define _SSPCON2_ACKEN 0x10 1944 #define _SSPCON2_ACKDT 0x20 1945 #define _SSPCON2_ACKSTAT 0x40 1946 #define _SSPCON2_GCEN 0x80 1947 1948 //============================================================================== 1949 1950 1951 //============================================================================== 1952 // SSP1CON3 Bits 1953 1954 extern __at(0x0217) __sfr SSP1CON3; 1955 1956 typedef struct 1957 { 1958 unsigned DHEN : 1; 1959 unsigned AHEN : 1; 1960 unsigned SBCDE : 1; 1961 unsigned SDAHT : 1; 1962 unsigned BOEN : 1; 1963 unsigned SCIE : 1; 1964 unsigned PCIE : 1; 1965 unsigned ACKTIM : 1; 1966 } __SSP1CON3bits_t; 1967 1968 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 1969 1970 #define _DHEN 0x01 1971 #define _AHEN 0x02 1972 #define _SBCDE 0x04 1973 #define _SDAHT 0x08 1974 #define _BOEN 0x10 1975 #define _SCIE 0x20 1976 #define _PCIE 0x40 1977 #define _ACKTIM 0x80 1978 1979 //============================================================================== 1980 1981 1982 //============================================================================== 1983 // SSPCON3 Bits 1984 1985 extern __at(0x0217) __sfr SSPCON3; 1986 1987 typedef struct 1988 { 1989 unsigned DHEN : 1; 1990 unsigned AHEN : 1; 1991 unsigned SBCDE : 1; 1992 unsigned SDAHT : 1; 1993 unsigned BOEN : 1; 1994 unsigned SCIE : 1; 1995 unsigned PCIE : 1; 1996 unsigned ACKTIM : 1; 1997 } __SSPCON3bits_t; 1998 1999 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 2000 2001 #define _SSPCON3_DHEN 0x01 2002 #define _SSPCON3_AHEN 0x02 2003 #define _SSPCON3_SBCDE 0x04 2004 #define _SSPCON3_SDAHT 0x08 2005 #define _SSPCON3_BOEN 0x10 2006 #define _SSPCON3_SCIE 0x20 2007 #define _SSPCON3_PCIE 0x40 2008 #define _SSPCON3_ACKTIM 0x80 2009 2010 //============================================================================== 2011 2012 extern __at(0x0291) __sfr CCPR1; 2013 extern __at(0x0291) __sfr CCPR1L; 2014 extern __at(0x0292) __sfr CCPR1H; 2015 2016 //============================================================================== 2017 // CCP1CON Bits 2018 2019 extern __at(0x0293) __sfr CCP1CON; 2020 2021 typedef union 2022 { 2023 struct 2024 { 2025 unsigned CCP1M0 : 1; 2026 unsigned CCP1M1 : 1; 2027 unsigned CCP1M2 : 1; 2028 unsigned CCP1M3 : 1; 2029 unsigned DC1B0 : 1; 2030 unsigned DC1B1 : 1; 2031 unsigned P1M0 : 1; 2032 unsigned P1M1 : 1; 2033 }; 2034 2035 struct 2036 { 2037 unsigned CCP1M : 4; 2038 unsigned : 4; 2039 }; 2040 2041 struct 2042 { 2043 unsigned : 4; 2044 unsigned DC1B : 2; 2045 unsigned : 2; 2046 }; 2047 2048 struct 2049 { 2050 unsigned : 6; 2051 unsigned P1M : 2; 2052 }; 2053 } __CCP1CONbits_t; 2054 2055 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 2056 2057 #define _CCP1M0 0x01 2058 #define _CCP1M1 0x02 2059 #define _CCP1M2 0x04 2060 #define _CCP1M3 0x08 2061 #define _DC1B0 0x10 2062 #define _DC1B1 0x20 2063 #define _P1M0 0x40 2064 #define _P1M1 0x80 2065 2066 //============================================================================== 2067 2068 2069 //============================================================================== 2070 // PWM1CON Bits 2071 2072 extern __at(0x0294) __sfr PWM1CON; 2073 2074 typedef union 2075 { 2076 struct 2077 { 2078 unsigned P1DC0 : 1; 2079 unsigned P1DC1 : 1; 2080 unsigned P1DC2 : 1; 2081 unsigned P1DC3 : 1; 2082 unsigned P1DC4 : 1; 2083 unsigned P1DC5 : 1; 2084 unsigned P1DC6 : 1; 2085 unsigned P1RSEN : 1; 2086 }; 2087 2088 struct 2089 { 2090 unsigned P1DC : 7; 2091 unsigned : 1; 2092 }; 2093 } __PWM1CONbits_t; 2094 2095 extern __at(0x0294) volatile __PWM1CONbits_t PWM1CONbits; 2096 2097 #define _P1DC0 0x01 2098 #define _P1DC1 0x02 2099 #define _P1DC2 0x04 2100 #define _P1DC3 0x08 2101 #define _P1DC4 0x10 2102 #define _P1DC5 0x20 2103 #define _P1DC6 0x40 2104 #define _P1RSEN 0x80 2105 2106 //============================================================================== 2107 2108 2109 //============================================================================== 2110 // CCP1AS Bits 2111 2112 extern __at(0x0295) __sfr CCP1AS; 2113 2114 typedef union 2115 { 2116 struct 2117 { 2118 unsigned PSS1BD0 : 1; 2119 unsigned PSS1BD1 : 1; 2120 unsigned PSS1AC0 : 1; 2121 unsigned PSS1AC1 : 1; 2122 unsigned CCP1AS0 : 1; 2123 unsigned CCP1AS1 : 1; 2124 unsigned CCP1AS2 : 1; 2125 unsigned CCP1ASE : 1; 2126 }; 2127 2128 struct 2129 { 2130 unsigned PSS1BD : 2; 2131 unsigned : 6; 2132 }; 2133 2134 struct 2135 { 2136 unsigned : 2; 2137 unsigned PSS1AC : 2; 2138 unsigned : 4; 2139 }; 2140 2141 struct 2142 { 2143 unsigned : 4; 2144 unsigned CCP1AS : 3; 2145 unsigned : 1; 2146 }; 2147 } __CCP1ASbits_t; 2148 2149 extern __at(0x0295) volatile __CCP1ASbits_t CCP1ASbits; 2150 2151 #define _PSS1BD0 0x01 2152 #define _PSS1BD1 0x02 2153 #define _PSS1AC0 0x04 2154 #define _PSS1AC1 0x08 2155 #define _CCP1AS0 0x10 2156 #define _CCP1AS1 0x20 2157 #define _CCP1AS2 0x40 2158 #define _CCP1ASE 0x80 2159 2160 //============================================================================== 2161 2162 2163 //============================================================================== 2164 // ECCP1AS Bits 2165 2166 extern __at(0x0295) __sfr ECCP1AS; 2167 2168 typedef union 2169 { 2170 struct 2171 { 2172 unsigned PSS1BD0 : 1; 2173 unsigned PSS1BD1 : 1; 2174 unsigned PSS1AC0 : 1; 2175 unsigned PSS1AC1 : 1; 2176 unsigned CCP1AS0 : 1; 2177 unsigned CCP1AS1 : 1; 2178 unsigned CCP1AS2 : 1; 2179 unsigned CCP1ASE : 1; 2180 }; 2181 2182 struct 2183 { 2184 unsigned PSS1BD : 2; 2185 unsigned : 6; 2186 }; 2187 2188 struct 2189 { 2190 unsigned : 2; 2191 unsigned PSS1AC : 2; 2192 unsigned : 4; 2193 }; 2194 2195 struct 2196 { 2197 unsigned : 4; 2198 unsigned CCP1AS : 3; 2199 unsigned : 1; 2200 }; 2201 } __ECCP1ASbits_t; 2202 2203 extern __at(0x0295) volatile __ECCP1ASbits_t ECCP1ASbits; 2204 2205 #define _ECCP1AS_PSS1BD0 0x01 2206 #define _ECCP1AS_PSS1BD1 0x02 2207 #define _ECCP1AS_PSS1AC0 0x04 2208 #define _ECCP1AS_PSS1AC1 0x08 2209 #define _ECCP1AS_CCP1AS0 0x10 2210 #define _ECCP1AS_CCP1AS1 0x20 2211 #define _ECCP1AS_CCP1AS2 0x40 2212 #define _ECCP1AS_CCP1ASE 0x80 2213 2214 //============================================================================== 2215 2216 2217 //============================================================================== 2218 // PSTR1CON Bits 2219 2220 extern __at(0x0296) __sfr PSTR1CON; 2221 2222 typedef struct 2223 { 2224 unsigned STR1A : 1; 2225 unsigned STR1B : 1; 2226 unsigned : 1; 2227 unsigned : 1; 2228 unsigned STR1SYNC : 1; 2229 unsigned : 1; 2230 unsigned : 1; 2231 unsigned : 1; 2232 } __PSTR1CONbits_t; 2233 2234 extern __at(0x0296) volatile __PSTR1CONbits_t PSTR1CONbits; 2235 2236 #define _STR1A 0x01 2237 #define _STR1B 0x02 2238 #define _STR1SYNC 0x10 2239 2240 //============================================================================== 2241 2242 2243 //============================================================================== 2244 // IOCAP Bits 2245 2246 extern __at(0x0391) __sfr IOCAP; 2247 2248 typedef union 2249 { 2250 struct 2251 { 2252 unsigned IOCAP0 : 1; 2253 unsigned IOCAP1 : 1; 2254 unsigned IOCAP2 : 1; 2255 unsigned IOCAP3 : 1; 2256 unsigned IOCAP4 : 1; 2257 unsigned IOCAP5 : 1; 2258 unsigned : 1; 2259 unsigned : 1; 2260 }; 2261 2262 struct 2263 { 2264 unsigned IOCAP : 6; 2265 unsigned : 2; 2266 }; 2267 } __IOCAPbits_t; 2268 2269 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 2270 2271 #define _IOCAP0 0x01 2272 #define _IOCAP1 0x02 2273 #define _IOCAP2 0x04 2274 #define _IOCAP3 0x08 2275 #define _IOCAP4 0x10 2276 #define _IOCAP5 0x20 2277 2278 //============================================================================== 2279 2280 2281 //============================================================================== 2282 // IOCAN Bits 2283 2284 extern __at(0x0392) __sfr IOCAN; 2285 2286 typedef union 2287 { 2288 struct 2289 { 2290 unsigned IOCAN0 : 1; 2291 unsigned IOCAN1 : 1; 2292 unsigned IOCAN2 : 1; 2293 unsigned IOCAN3 : 1; 2294 unsigned IOCAN4 : 1; 2295 unsigned IOCAN5 : 1; 2296 unsigned : 1; 2297 unsigned : 1; 2298 }; 2299 2300 struct 2301 { 2302 unsigned IOCAN : 6; 2303 unsigned : 2; 2304 }; 2305 } __IOCANbits_t; 2306 2307 extern __at(0x0392) volatile __IOCANbits_t IOCANbits; 2308 2309 #define _IOCAN0 0x01 2310 #define _IOCAN1 0x02 2311 #define _IOCAN2 0x04 2312 #define _IOCAN3 0x08 2313 #define _IOCAN4 0x10 2314 #define _IOCAN5 0x20 2315 2316 //============================================================================== 2317 2318 2319 //============================================================================== 2320 // IOCAF Bits 2321 2322 extern __at(0x0393) __sfr IOCAF; 2323 2324 typedef union 2325 { 2326 struct 2327 { 2328 unsigned IOCAF0 : 1; 2329 unsigned IOCAF1 : 1; 2330 unsigned IOCAF2 : 1; 2331 unsigned IOCAF3 : 1; 2332 unsigned IOCAF4 : 1; 2333 unsigned IOCAF5 : 1; 2334 unsigned : 1; 2335 unsigned : 1; 2336 }; 2337 2338 struct 2339 { 2340 unsigned IOCAF : 6; 2341 unsigned : 2; 2342 }; 2343 } __IOCAFbits_t; 2344 2345 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 2346 2347 #define _IOCAF0 0x01 2348 #define _IOCAF1 0x02 2349 #define _IOCAF2 0x04 2350 #define _IOCAF3 0x08 2351 #define _IOCAF4 0x10 2352 #define _IOCAF5 0x20 2353 2354 //============================================================================== 2355 2356 2357 //============================================================================== 2358 // CLKRCON Bits 2359 2360 extern __at(0x039A) __sfr CLKRCON; 2361 2362 typedef union 2363 { 2364 struct 2365 { 2366 unsigned CLKRDIV0 : 1; 2367 unsigned CLKRDIV1 : 1; 2368 unsigned CLKRDIV2 : 1; 2369 unsigned CLKRDC0 : 1; 2370 unsigned CLKRDC1 : 1; 2371 unsigned CLKRSLR : 1; 2372 unsigned CLKROE : 1; 2373 unsigned CLKREN : 1; 2374 }; 2375 2376 struct 2377 { 2378 unsigned CLKRDIV : 3; 2379 unsigned : 5; 2380 }; 2381 2382 struct 2383 { 2384 unsigned : 3; 2385 unsigned CLKRDC : 2; 2386 unsigned : 3; 2387 }; 2388 } __CLKRCONbits_t; 2389 2390 extern __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits; 2391 2392 #define _CLKRDIV0 0x01 2393 #define _CLKRDIV1 0x02 2394 #define _CLKRDIV2 0x04 2395 #define _CLKRDC0 0x08 2396 #define _CLKRDC1 0x10 2397 #define _CLKRSLR 0x20 2398 #define _CLKROE 0x40 2399 #define _CLKREN 0x80 2400 2401 //============================================================================== 2402 2403 2404 //============================================================================== 2405 // MDCON Bits 2406 2407 extern __at(0x039C) __sfr MDCON; 2408 2409 typedef struct 2410 { 2411 unsigned MDBIT : 1; 2412 unsigned : 1; 2413 unsigned : 1; 2414 unsigned MDOUT : 1; 2415 unsigned MDOPOL : 1; 2416 unsigned MDSLR : 1; 2417 unsigned MDOE : 1; 2418 unsigned MDEN : 1; 2419 } __MDCONbits_t; 2420 2421 extern __at(0x039C) volatile __MDCONbits_t MDCONbits; 2422 2423 #define _MDBIT 0x01 2424 #define _MDOUT 0x08 2425 #define _MDOPOL 0x10 2426 #define _MDSLR 0x20 2427 #define _MDOE 0x40 2428 #define _MDEN 0x80 2429 2430 //============================================================================== 2431 2432 2433 //============================================================================== 2434 // MDSRC Bits 2435 2436 extern __at(0x039D) __sfr MDSRC; 2437 2438 typedef union 2439 { 2440 struct 2441 { 2442 unsigned MDMS0 : 1; 2443 unsigned MDMS1 : 1; 2444 unsigned MDMS2 : 1; 2445 unsigned MDMS3 : 1; 2446 unsigned : 1; 2447 unsigned : 1; 2448 unsigned : 1; 2449 unsigned MDMSODIS : 1; 2450 }; 2451 2452 struct 2453 { 2454 unsigned MDMS : 4; 2455 unsigned : 4; 2456 }; 2457 } __MDSRCbits_t; 2458 2459 extern __at(0x039D) volatile __MDSRCbits_t MDSRCbits; 2460 2461 #define _MDMS0 0x01 2462 #define _MDMS1 0x02 2463 #define _MDMS2 0x04 2464 #define _MDMS3 0x08 2465 #define _MDMSODIS 0x80 2466 2467 //============================================================================== 2468 2469 2470 //============================================================================== 2471 // MDCARL Bits 2472 2473 extern __at(0x039E) __sfr MDCARL; 2474 2475 typedef union 2476 { 2477 struct 2478 { 2479 unsigned MDCL0 : 1; 2480 unsigned MDCL1 : 1; 2481 unsigned MDCL2 : 1; 2482 unsigned MDCL3 : 1; 2483 unsigned : 1; 2484 unsigned MDCLSYNC : 1; 2485 unsigned MDCLPOL : 1; 2486 unsigned MDCLODIS : 1; 2487 }; 2488 2489 struct 2490 { 2491 unsigned MDCL : 4; 2492 unsigned : 4; 2493 }; 2494 } __MDCARLbits_t; 2495 2496 extern __at(0x039E) volatile __MDCARLbits_t MDCARLbits; 2497 2498 #define _MDCL0 0x01 2499 #define _MDCL1 0x02 2500 #define _MDCL2 0x04 2501 #define _MDCL3 0x08 2502 #define _MDCLSYNC 0x20 2503 #define _MDCLPOL 0x40 2504 #define _MDCLODIS 0x80 2505 2506 //============================================================================== 2507 2508 2509 //============================================================================== 2510 // MDCARH Bits 2511 2512 extern __at(0x039F) __sfr MDCARH; 2513 2514 typedef union 2515 { 2516 struct 2517 { 2518 unsigned MDCH0 : 1; 2519 unsigned MDCH1 : 1; 2520 unsigned MDCH2 : 1; 2521 unsigned MDCH3 : 1; 2522 unsigned : 1; 2523 unsigned MDCHSYNC : 1; 2524 unsigned MDCHPOL : 1; 2525 unsigned MDCHODIS : 1; 2526 }; 2527 2528 struct 2529 { 2530 unsigned MDCH : 4; 2531 unsigned : 4; 2532 }; 2533 } __MDCARHbits_t; 2534 2535 extern __at(0x039F) volatile __MDCARHbits_t MDCARHbits; 2536 2537 #define _MDCH0 0x01 2538 #define _MDCH1 0x02 2539 #define _MDCH2 0x04 2540 #define _MDCH3 0x08 2541 #define _MDCHSYNC 0x20 2542 #define _MDCHPOL 0x40 2543 #define _MDCHODIS 0x80 2544 2545 //============================================================================== 2546 2547 2548 //============================================================================== 2549 // STATUS_SHAD Bits 2550 2551 extern __at(0x0FE4) __sfr STATUS_SHAD; 2552 2553 typedef struct 2554 { 2555 unsigned C_SHAD : 1; 2556 unsigned DC_SHAD : 1; 2557 unsigned Z_SHAD : 1; 2558 unsigned : 1; 2559 unsigned : 1; 2560 unsigned : 1; 2561 unsigned : 1; 2562 unsigned : 1; 2563 } __STATUS_SHADbits_t; 2564 2565 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 2566 2567 #define _C_SHAD 0x01 2568 #define _DC_SHAD 0x02 2569 #define _Z_SHAD 0x04 2570 2571 //============================================================================== 2572 2573 extern __at(0x0FE5) __sfr WREG_SHAD; 2574 extern __at(0x0FE6) __sfr BSR_SHAD; 2575 extern __at(0x0FE7) __sfr PCLATH_SHAD; 2576 extern __at(0x0FE8) __sfr FSR0L_SHAD; 2577 extern __at(0x0FE9) __sfr FSR0H_SHAD; 2578 extern __at(0x0FEA) __sfr FSR1L_SHAD; 2579 extern __at(0x0FEB) __sfr FSR1H_SHAD; 2580 extern __at(0x0FED) __sfr STKPTR; 2581 extern __at(0x0FEE) __sfr TOSL; 2582 extern __at(0x0FEF) __sfr TOSH; 2583 2584 //============================================================================== 2585 // 2586 // Configuration Bits 2587 // 2588 //============================================================================== 2589 2590 #define _CONFIG1 0x8007 2591 #define _CONFIG2 0x8008 2592 2593 //----------------------------- CONFIG1 Options ------------------------------- 2594 2595 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins. 2596 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins. 2597 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins. 2598 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin. 2599 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin. 2600 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin. 2601 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin. 2602 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin. 2603 #define _WDTE_OFF 0x3FE7 // WDT disabled. 2604 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register. 2605 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep. 2606 #define _WDTE_ON 0x3FFF // WDT enabled. 2607 #define _PWRTE_ON 0x3FDF // PWRT enabled. 2608 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 2609 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input. 2610 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR. 2611 #define _CP_ON 0x3F7F // Program memory code protection is enabled. 2612 #define _CP_OFF 0x3FFF // Program memory code protection is disabled. 2613 #define _CPD_ON 0x3EFF // Data memory code protection is enabled. 2614 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled. 2615 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled. 2616 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register. 2617 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep. 2618 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled. 2619 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin. 2620 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin. 2621 #define _IESO_OFF 0x2FFF // Internal/External Switchover mode is disabled. 2622 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled. 2623 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled. 2624 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled. 2625 2626 //----------------------------- CONFIG2 Options ------------------------------- 2627 2628 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control. 2629 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control. 2630 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control. 2631 #define _WRT_OFF 0x3FFF // Write protection off. 2632 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled. 2633 #define _PLLEN_ON 0x3FFF // 4x PLL enabled. 2634 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset. 2635 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset. 2636 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected. 2637 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 2638 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 2639 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled. 2640 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled. 2641 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming. 2642 #define _LVP_ON 0x3FFF // Low-voltage programming enabled. 2643 2644 //============================================================================== 2645 2646 #define _DEVID1 0x8006 2647 2648 #define _IDLOC0 0x8000 2649 #define _IDLOC1 0x8001 2650 #define _IDLOC2 0x8002 2651 #define _IDLOC3 0x8003 2652 2653 //============================================================================== 2654 2655 #ifndef NO_BIT_DEFINES 2656 2657 #define ADON ADCON0bits.ADON // bit 0 2658 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits 2659 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits 2660 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits 2661 #define CHS0 ADCON0bits.CHS0 // bit 2 2662 #define CHS1 ADCON0bits.CHS1 // bit 3 2663 #define CHS2 ADCON0bits.CHS2 // bit 4 2664 #define CHS3 ADCON0bits.CHS3 // bit 5 2665 #define CHS4 ADCON0bits.CHS4 // bit 6 2666 2667 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0 2668 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1 2669 #define ADCS0 ADCON1bits.ADCS0 // bit 4 2670 #define ADCS1 ADCON1bits.ADCS1 // bit 5 2671 #define ADCS2 ADCON1bits.ADCS2 // bit 6 2672 #define ADFM ADCON1bits.ADFM // bit 7 2673 2674 #define ANSA0 ANSELAbits.ANSA0 // bit 0 2675 #define ANSA1 ANSELAbits.ANSA1 // bit 1 2676 #define ANSA2 ANSELAbits.ANSA2 // bit 2 2677 #define ANSA4 ANSELAbits.ANSA4 // bit 4 2678 2679 #define CCP1SEL APFCONbits.CCP1SEL // bit 0 2680 #define P1BSEL APFCONbits.P1BSEL // bit 1 2681 #define TXCKSEL APFCONbits.TXCKSEL // bit 2 2682 #define T1GSEL APFCONbits.T1GSEL // bit 3 2683 #define SSSEL APFCONbits.SSSEL // bit 5, shadows bit in APFCONbits 2684 #define SS1SEL APFCONbits.SS1SEL // bit 5, shadows bit in APFCONbits 2685 #define SDOSEL APFCONbits.SDOSEL // bit 6, shadows bit in APFCONbits 2686 #define SDO1SEL APFCONbits.SDO1SEL // bit 6, shadows bit in APFCONbits 2687 #define RXDTSEL APFCONbits.RXDTSEL // bit 7 2688 2689 #define ABDEN BAUDCONbits.ABDEN // bit 0 2690 #define WUE BAUDCONbits.WUE // bit 1 2691 #define BRG16 BAUDCONbits.BRG16 // bit 3 2692 #define SCKP BAUDCONbits.SCKP // bit 4 2693 #define RCIDL BAUDCONbits.RCIDL // bit 6 2694 #define ABDOVF BAUDCONbits.ABDOVF // bit 7 2695 2696 #define BORRDY BORCONbits.BORRDY // bit 0 2697 #define BORFS BORCONbits.BORFS // bit 6 2698 #define SBOREN BORCONbits.SBOREN // bit 7 2699 2700 #define BSR0 BSRbits.BSR0 // bit 0 2701 #define BSR1 BSRbits.BSR1 // bit 1 2702 #define BSR2 BSRbits.BSR2 // bit 2 2703 #define BSR3 BSRbits.BSR3 // bit 3 2704 #define BSR4 BSRbits.BSR4 // bit 4 2705 2706 #define PSS1BD0 CCP1ASbits.PSS1BD0 // bit 0 2707 #define PSS1BD1 CCP1ASbits.PSS1BD1 // bit 1 2708 #define PSS1AC0 CCP1ASbits.PSS1AC0 // bit 2 2709 #define PSS1AC1 CCP1ASbits.PSS1AC1 // bit 3 2710 #define CCP1AS0 CCP1ASbits.CCP1AS0 // bit 4 2711 #define CCP1AS1 CCP1ASbits.CCP1AS1 // bit 5 2712 #define CCP1AS2 CCP1ASbits.CCP1AS2 // bit 6 2713 #define CCP1ASE CCP1ASbits.CCP1ASE // bit 7 2714 2715 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0 2716 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1 2717 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2 2718 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3 2719 #define DC1B0 CCP1CONbits.DC1B0 // bit 4 2720 #define DC1B1 CCP1CONbits.DC1B1 // bit 5 2721 #define P1M0 CCP1CONbits.P1M0 // bit 6 2722 #define P1M1 CCP1CONbits.P1M1 // bit 7 2723 2724 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0 2725 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1 2726 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2 2727 #define CLKRDC0 CLKRCONbits.CLKRDC0 // bit 3 2728 #define CLKRDC1 CLKRCONbits.CLKRDC1 // bit 4 2729 #define CLKRSLR CLKRCONbits.CLKRSLR // bit 5 2730 #define CLKROE CLKRCONbits.CLKROE // bit 6 2731 #define CLKREN CLKRCONbits.CLKREN // bit 7 2732 2733 #define C1SYNC CM1CON0bits.C1SYNC // bit 0 2734 #define C1HYS CM1CON0bits.C1HYS // bit 1 2735 #define C1SP CM1CON0bits.C1SP // bit 2 2736 #define C1POL CM1CON0bits.C1POL // bit 4 2737 #define C1OE CM1CON0bits.C1OE // bit 5 2738 #define C1OUT CM1CON0bits.C1OUT // bit 6 2739 #define C1ON CM1CON0bits.C1ON // bit 7 2740 2741 #define C1NCH CM1CON1bits.C1NCH // bit 0, shadows bit in CM1CON1bits 2742 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0, shadows bit in CM1CON1bits 2743 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4 2744 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5 2745 #define C1INTN CM1CON1bits.C1INTN // bit 6 2746 #define C1INTP CM1CON1bits.C1INTP // bit 7 2747 2748 #define MC1OUT CMOUTbits.MC1OUT // bit 0 2749 2750 #define T0XCS CPSCON0bits.T0XCS // bit 0 2751 #define CPSOUT CPSCON0bits.CPSOUT // bit 1 2752 #define CPSRNG0 CPSCON0bits.CPSRNG0 // bit 2 2753 #define CPSRNG1 CPSCON0bits.CPSRNG1 // bit 3 2754 #define CPSRM CPSCON0bits.CPSRM // bit 6 2755 #define CPSON CPSCON0bits.CPSON // bit 7 2756 2757 #define CPSCH0 CPSCON1bits.CPSCH0 // bit 0 2758 #define CPSCH1 CPSCON1bits.CPSCH1 // bit 1 2759 2760 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2 2761 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3 2762 #define DACOE DACCON0bits.DACOE // bit 5 2763 #define DACLPS DACCON0bits.DACLPS // bit 6 2764 #define DACEN DACCON0bits.DACEN // bit 7 2765 2766 #define DACR0 DACCON1bits.DACR0 // bit 0 2767 #define DACR1 DACCON1bits.DACR1 // bit 1 2768 #define DACR2 DACCON1bits.DACR2 // bit 2 2769 #define DACR3 DACCON1bits.DACR3 // bit 3 2770 #define DACR4 DACCON1bits.DACR4 // bit 4 2771 2772 #define RD EECON1bits.RD // bit 0 2773 #define WR EECON1bits.WR // bit 1 2774 #define WREN EECON1bits.WREN // bit 2 2775 #define WRERR EECON1bits.WRERR // bit 3 2776 #define FREE EECON1bits.FREE // bit 4 2777 #define LWLO EECON1bits.LWLO // bit 5 2778 #define CFGS EECON1bits.CFGS // bit 6 2779 #define EEPGD EECON1bits.EEPGD // bit 7 2780 2781 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0 2782 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1 2783 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2 2784 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3 2785 #define TSRNG FVRCONbits.TSRNG // bit 4 2786 #define TSEN FVRCONbits.TSEN // bit 5 2787 #define FVRRDY FVRCONbits.FVRRDY // bit 6 2788 #define FVREN FVRCONbits.FVREN // bit 7 2789 2790 #define IOCIF INTCONbits.IOCIF // bit 0 2791 #define INTF INTCONbits.INTF // bit 1 2792 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 2793 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 2794 #define IOCIE INTCONbits.IOCIE // bit 3 2795 #define INTE INTCONbits.INTE // bit 4 2796 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 2797 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 2798 #define PEIE INTCONbits.PEIE // bit 6 2799 #define GIE INTCONbits.GIE // bit 7 2800 2801 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0 2802 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1 2803 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2 2804 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3 2805 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4 2806 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5 2807 2808 #define IOCAN0 IOCANbits.IOCAN0 // bit 0 2809 #define IOCAN1 IOCANbits.IOCAN1 // bit 1 2810 #define IOCAN2 IOCANbits.IOCAN2 // bit 2 2811 #define IOCAN3 IOCANbits.IOCAN3 // bit 3 2812 #define IOCAN4 IOCANbits.IOCAN4 // bit 4 2813 #define IOCAN5 IOCANbits.IOCAN5 // bit 5 2814 2815 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0 2816 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1 2817 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2 2818 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3 2819 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4 2820 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5 2821 2822 #define LATA0 LATAbits.LATA0 // bit 0 2823 #define LATA1 LATAbits.LATA1 // bit 1 2824 #define LATA2 LATAbits.LATA2 // bit 2 2825 #define LATA4 LATAbits.LATA4 // bit 4 2826 #define LATA5 LATAbits.LATA5 // bit 5 2827 2828 #define MDCH0 MDCARHbits.MDCH0 // bit 0 2829 #define MDCH1 MDCARHbits.MDCH1 // bit 1 2830 #define MDCH2 MDCARHbits.MDCH2 // bit 2 2831 #define MDCH3 MDCARHbits.MDCH3 // bit 3 2832 #define MDCHSYNC MDCARHbits.MDCHSYNC // bit 5 2833 #define MDCHPOL MDCARHbits.MDCHPOL // bit 6 2834 #define MDCHODIS MDCARHbits.MDCHODIS // bit 7 2835 2836 #define MDCL0 MDCARLbits.MDCL0 // bit 0 2837 #define MDCL1 MDCARLbits.MDCL1 // bit 1 2838 #define MDCL2 MDCARLbits.MDCL2 // bit 2 2839 #define MDCL3 MDCARLbits.MDCL3 // bit 3 2840 #define MDCLSYNC MDCARLbits.MDCLSYNC // bit 5 2841 #define MDCLPOL MDCARLbits.MDCLPOL // bit 6 2842 #define MDCLODIS MDCARLbits.MDCLODIS // bit 7 2843 2844 #define MDBIT MDCONbits.MDBIT // bit 0 2845 #define MDOUT MDCONbits.MDOUT // bit 3 2846 #define MDOPOL MDCONbits.MDOPOL // bit 4 2847 #define MDSLR MDCONbits.MDSLR // bit 5 2848 #define MDOE MDCONbits.MDOE // bit 6 2849 #define MDEN MDCONbits.MDEN // bit 7 2850 2851 #define MDMS0 MDSRCbits.MDMS0 // bit 0 2852 #define MDMS1 MDSRCbits.MDMS1 // bit 1 2853 #define MDMS2 MDSRCbits.MDMS2 // bit 2 2854 #define MDMS3 MDSRCbits.MDMS3 // bit 3 2855 #define MDMSODIS MDSRCbits.MDMSODIS // bit 7 2856 2857 #define PS0 OPTION_REGbits.PS0 // bit 0 2858 #define PS1 OPTION_REGbits.PS1 // bit 1 2859 #define PS2 OPTION_REGbits.PS2 // bit 2 2860 #define PSA OPTION_REGbits.PSA // bit 3 2861 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits 2862 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits 2863 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits 2864 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits 2865 #define INTEDG OPTION_REGbits.INTEDG // bit 6 2866 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7 2867 2868 #define SCS0 OSCCONbits.SCS0 // bit 0 2869 #define SCS1 OSCCONbits.SCS1 // bit 1 2870 #define IRCF0 OSCCONbits.IRCF0 // bit 3 2871 #define IRCF1 OSCCONbits.IRCF1 // bit 4 2872 #define IRCF2 OSCCONbits.IRCF2 // bit 5 2873 #define IRCF3 OSCCONbits.IRCF3 // bit 6 2874 #define SPLLEN OSCCONbits.SPLLEN // bit 7 2875 2876 #define HFIOFS OSCSTATbits.HFIOFS // bit 0 2877 #define LFIOFR OSCSTATbits.LFIOFR // bit 1 2878 #define MFIOFR OSCSTATbits.MFIOFR // bit 2 2879 #define HFIOFL OSCSTATbits.HFIOFL // bit 3 2880 #define HFIOFR OSCSTATbits.HFIOFR // bit 4 2881 #define OSTS OSCSTATbits.OSTS // bit 5 2882 #define PLLR OSCSTATbits.PLLR // bit 6 2883 #define T1OSCR OSCSTATbits.T1OSCR // bit 7 2884 2885 #define TUN0 OSCTUNEbits.TUN0 // bit 0 2886 #define TUN1 OSCTUNEbits.TUN1 // bit 1 2887 #define TUN2 OSCTUNEbits.TUN2 // bit 2 2888 #define TUN3 OSCTUNEbits.TUN3 // bit 3 2889 #define TUN4 OSCTUNEbits.TUN4 // bit 4 2890 #define TUN5 OSCTUNEbits.TUN5 // bit 5 2891 2892 #define NOT_BOR PCONbits.NOT_BOR // bit 0 2893 #define NOT_POR PCONbits.NOT_POR // bit 1 2894 #define NOT_RI PCONbits.NOT_RI // bit 2 2895 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3 2896 #define STKUNF PCONbits.STKUNF // bit 6 2897 #define STKOVF PCONbits.STKOVF // bit 7 2898 2899 #define TMR1IE PIE1bits.TMR1IE // bit 0 2900 #define TMR2IE PIE1bits.TMR2IE // bit 1 2901 #define CCP1IE PIE1bits.CCP1IE // bit 2 2902 #define SSP1IE PIE1bits.SSP1IE // bit 3 2903 #define TXIE PIE1bits.TXIE // bit 4 2904 #define RCIE PIE1bits.RCIE // bit 5 2905 #define ADIE PIE1bits.ADIE // bit 6 2906 #define TMR1GIE PIE1bits.TMR1GIE // bit 7 2907 2908 #define BCL1IE PIE2bits.BCL1IE // bit 3 2909 #define EEIE PIE2bits.EEIE // bit 4 2910 #define C1IE PIE2bits.C1IE // bit 5 2911 #define OSFIE PIE2bits.OSFIE // bit 7 2912 2913 #define TMR1IF PIR1bits.TMR1IF // bit 0 2914 #define TMR2IF PIR1bits.TMR2IF // bit 1 2915 #define CCP1IF PIR1bits.CCP1IF // bit 2 2916 #define SSP1IF PIR1bits.SSP1IF // bit 3 2917 #define TXIF PIR1bits.TXIF // bit 4 2918 #define RCIF PIR1bits.RCIF // bit 5 2919 #define ADIF PIR1bits.ADIF // bit 6 2920 #define TMR1GIF PIR1bits.TMR1GIF // bit 7 2921 2922 #define BCL1IF PIR2bits.BCL1IF // bit 3 2923 #define EEIF PIR2bits.EEIF // bit 4 2924 #define C1IF PIR2bits.C1IF // bit 5 2925 #define OSFIF PIR2bits.OSFIF // bit 7 2926 2927 #define RA0 PORTAbits.RA0 // bit 0 2928 #define RA1 PORTAbits.RA1 // bit 1 2929 #define RA2 PORTAbits.RA2 // bit 2 2930 #define RA3 PORTAbits.RA3 // bit 3 2931 #define RA4 PORTAbits.RA4 // bit 4 2932 #define RA5 PORTAbits.RA5 // bit 5 2933 2934 #define STR1A PSTR1CONbits.STR1A // bit 0 2935 #define STR1B PSTR1CONbits.STR1B // bit 1 2936 #define STR1SYNC PSTR1CONbits.STR1SYNC // bit 4 2937 2938 #define P1DC0 PWM1CONbits.P1DC0 // bit 0 2939 #define P1DC1 PWM1CONbits.P1DC1 // bit 1 2940 #define P1DC2 PWM1CONbits.P1DC2 // bit 2 2941 #define P1DC3 PWM1CONbits.P1DC3 // bit 3 2942 #define P1DC4 PWM1CONbits.P1DC4 // bit 4 2943 #define P1DC5 PWM1CONbits.P1DC5 // bit 5 2944 #define P1DC6 PWM1CONbits.P1DC6 // bit 6 2945 #define P1RSEN PWM1CONbits.P1RSEN // bit 7 2946 2947 #define RX9D RCSTAbits.RX9D // bit 0 2948 #define OERR RCSTAbits.OERR // bit 1 2949 #define FERR RCSTAbits.FERR // bit 2 2950 #define ADDEN RCSTAbits.ADDEN // bit 3 2951 #define CREN RCSTAbits.CREN // bit 4 2952 #define SREN RCSTAbits.SREN // bit 5 2953 #define RX9 RCSTAbits.RX9 // bit 6 2954 #define SPEN RCSTAbits.SPEN // bit 7 2955 2956 #define SRPR SRCON0bits.SRPR // bit 0 2957 #define SRPS SRCON0bits.SRPS // bit 1 2958 #define SRNQEN SRCON0bits.SRNQEN // bit 2 2959 #define SRQEN SRCON0bits.SRQEN // bit 3 2960 #define SRCLK0 SRCON0bits.SRCLK0 // bit 4 2961 #define SRCLK1 SRCON0bits.SRCLK1 // bit 5 2962 #define SRCLK2 SRCON0bits.SRCLK2 // bit 6 2963 #define SRLEN SRCON0bits.SRLEN // bit 7 2964 2965 #define SRRC1E SRCON1bits.SRRC1E // bit 0 2966 #define SRRCKE SRCON1bits.SRRCKE // bit 2 2967 #define SRRPE SRCON1bits.SRRPE // bit 3 2968 #define SRSC1E SRCON1bits.SRSC1E // bit 4 2969 #define SRSCKE SRCON1bits.SRSCKE // bit 6 2970 #define SRSPE SRCON1bits.SRSPE // bit 7 2971 2972 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0 2973 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1 2974 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2 2975 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3 2976 #define CKP SSP1CON1bits.CKP // bit 4 2977 #define SSPEN SSP1CON1bits.SSPEN // bit 5 2978 #define SSPOV SSP1CON1bits.SSPOV // bit 6 2979 #define WCOL SSP1CON1bits.WCOL // bit 7 2980 2981 #define SEN SSP1CON2bits.SEN // bit 0 2982 #define RSEN SSP1CON2bits.RSEN // bit 1 2983 #define PEN SSP1CON2bits.PEN // bit 2 2984 #define RCEN SSP1CON2bits.RCEN // bit 3 2985 #define ACKEN SSP1CON2bits.ACKEN // bit 4 2986 #define ACKDT SSP1CON2bits.ACKDT // bit 5 2987 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6 2988 #define GCEN SSP1CON2bits.GCEN // bit 7 2989 2990 #define DHEN SSP1CON3bits.DHEN // bit 0 2991 #define AHEN SSP1CON3bits.AHEN // bit 1 2992 #define SBCDE SSP1CON3bits.SBCDE // bit 2 2993 #define SDAHT SSP1CON3bits.SDAHT // bit 3 2994 #define BOEN SSP1CON3bits.BOEN // bit 4 2995 #define SCIE SSP1CON3bits.SCIE // bit 5 2996 #define PCIE SSP1CON3bits.PCIE // bit 6 2997 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7 2998 2999 #define BF SSP1STATbits.BF // bit 0 3000 #define UA SSP1STATbits.UA // bit 1 3001 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2 3002 #define S SSP1STATbits.S // bit 3 3003 #define P SSP1STATbits.P // bit 4 3004 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5 3005 #define CKE SSP1STATbits.CKE // bit 6 3006 #define SMP SSP1STATbits.SMP // bit 7 3007 3008 #define C STATUSbits.C // bit 0 3009 #define DC STATUSbits.DC // bit 1 3010 #define Z STATUSbits.Z // bit 2 3011 #define NOT_PD STATUSbits.NOT_PD // bit 3 3012 #define NOT_TO STATUSbits.NOT_TO // bit 4 3013 3014 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0 3015 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1 3016 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2 3017 3018 #define TMR1ON T1CONbits.TMR1ON // bit 0 3019 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 3020 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 3021 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 3022 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 3023 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6 3024 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7 3025 3026 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0 3027 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1 3028 #define T1GVAL T1GCONbits.T1GVAL // bit 2 3029 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits 3030 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits 3031 #define T1GSPM T1GCONbits.T1GSPM // bit 4 3032 #define T1GTM T1GCONbits.T1GTM // bit 5 3033 #define T1GPOL T1GCONbits.T1GPOL // bit 6 3034 #define TMR1GE T1GCONbits.TMR1GE // bit 7 3035 3036 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 3037 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 3038 #define TMR2ON T2CONbits.TMR2ON // bit 2 3039 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3 3040 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4 3041 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5 3042 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6 3043 3044 #define TRISA0 TRISAbits.TRISA0 // bit 0 3045 #define TRISA1 TRISAbits.TRISA1 // bit 1 3046 #define TRISA2 TRISAbits.TRISA2 // bit 2 3047 #define TRISA3 TRISAbits.TRISA3 // bit 3 3048 #define TRISA4 TRISAbits.TRISA4 // bit 4 3049 #define TRISA5 TRISAbits.TRISA5 // bit 5 3050 3051 #define TX9D TXSTAbits.TX9D // bit 0 3052 #define TRMT TXSTAbits.TRMT // bit 1 3053 #define BRGH TXSTAbits.BRGH // bit 2 3054 #define SENDB TXSTAbits.SENDB // bit 3 3055 #define SYNC TXSTAbits.SYNC // bit 4 3056 #define TXEN TXSTAbits.TXEN // bit 5 3057 #define TX9 TXSTAbits.TX9 // bit 6 3058 #define CSRC TXSTAbits.CSRC // bit 7 3059 3060 #define SWDTEN WDTCONbits.SWDTEN // bit 0 3061 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 3062 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 3063 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 3064 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 3065 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5 3066 3067 #define WPUA0 WPUAbits.WPUA0 // bit 0 3068 #define WPUA1 WPUAbits.WPUA1 // bit 1 3069 #define WPUA2 WPUAbits.WPUA2 // bit 2 3070 #define WPUA3 WPUAbits.WPUA3 // bit 3 3071 #define WPUA4 WPUAbits.WPUA4 // bit 4 3072 #define WPUA5 WPUAbits.WPUA5 // bit 5 3073 3074 #endif // #ifndef NO_BIT_DEFINES 3075 3076 #endif // #ifndef __PIC12LF1840_H__ 3077