1 /*
2  * This declarations of the PIC16C554 MCU.
3  *
4  * This file is part of the GNU PIC library for SDCC, originally
5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6  *
7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:02 UTC.
8  *
9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10  * this license covers the code to the compiler and other executables,
11  * but explicitly does not cover any code or objects generated by sdcc.
12  *
13  * For pic device libraries and header files which are derived from
14  * Microchip header (.inc) and linker script (.lkr) files Microchip
15  * requires that "The header files should state that they are only to be
16  * used with authentic Microchip devices" which makes them incompatible
17  * with the GPL. Pic device libraries and header files are located at
18  * non-free/lib and non-free/include directories respectively.
19  * Sdcc should be run with the --use-non-free command line option in
20  * order to include non-free header files and libraries.
21  *
22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23  */
24 
25 #ifndef __PIC16C554_H__
26 #define __PIC16C554_H__
27 
28 //==============================================================================
29 //
30 //	Register Addresses
31 //
32 //==============================================================================
33 
34 #ifndef NO_ADDR_DEFINES
35 
36 #define INDF_ADDR               0x0000
37 #define TMR0_ADDR               0x0001
38 #define PCL_ADDR                0x0002
39 #define STATUS_ADDR             0x0003
40 #define FSR_ADDR                0x0004
41 #define PORTA_ADDR              0x0005
42 #define PORTB_ADDR              0x0006
43 #define PCLATH_ADDR             0x000A
44 #define INTCON_ADDR             0x000B
45 #define OPTION_REG_ADDR         0x0081
46 #define TRISA_ADDR              0x0085
47 #define TRISB_ADDR              0x0086
48 #define PCON_ADDR               0x008E
49 
50 #endif // #ifndef NO_ADDR_DEFINES
51 
52 //==============================================================================
53 //
54 //	Register Definitions
55 //
56 //==============================================================================
57 
58 extern __at(0x0000) __sfr INDF;
59 extern __at(0x0001) __sfr TMR0;
60 extern __at(0x0002) __sfr PCL;
61 
62 //==============================================================================
63 //        STATUS Bits
64 
65 extern __at(0x0003) __sfr STATUS;
66 
67 typedef union
68   {
69   struct
70     {
71     unsigned C                  : 1;
72     unsigned DC                 : 1;
73     unsigned Z                  : 1;
74     unsigned NOT_PD             : 1;
75     unsigned NOT_TO             : 1;
76     unsigned RP0                : 1;
77     unsigned RP1                : 1;
78     unsigned IRP                : 1;
79     };
80 
81   struct
82     {
83     unsigned                    : 5;
84     unsigned RP                 : 2;
85     unsigned                    : 1;
86     };
87   } __STATUSbits_t;
88 
89 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
90 
91 #define _C                      0x01
92 #define _DC                     0x02
93 #define _Z                      0x04
94 #define _NOT_PD                 0x08
95 #define _NOT_TO                 0x10
96 #define _RP0                    0x20
97 #define _RP1                    0x40
98 #define _IRP                    0x80
99 
100 //==============================================================================
101 
102 extern __at(0x0004) __sfr FSR;
103 
104 //==============================================================================
105 //        PORTA Bits
106 
107 extern __at(0x0005) __sfr PORTA;
108 
109 typedef union
110   {
111   struct
112     {
113     unsigned RA0                : 1;
114     unsigned RA1                : 1;
115     unsigned RA2                : 1;
116     unsigned RA3                : 1;
117     unsigned RA4                : 1;
118     unsigned                    : 1;
119     unsigned                    : 1;
120     unsigned                    : 1;
121     };
122 
123   struct
124     {
125     unsigned RA                 : 5;
126     unsigned                    : 3;
127     };
128   } __PORTAbits_t;
129 
130 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
131 
132 #define _RA0                    0x01
133 #define _RA1                    0x02
134 #define _RA2                    0x04
135 #define _RA3                    0x08
136 #define _RA4                    0x10
137 
138 //==============================================================================
139 
140 
141 //==============================================================================
142 //        PORTB Bits
143 
144 extern __at(0x0006) __sfr PORTB;
145 
146 typedef struct
147   {
148   unsigned RB0                  : 1;
149   unsigned RB1                  : 1;
150   unsigned RB2                  : 1;
151   unsigned RB3                  : 1;
152   unsigned RB4                  : 1;
153   unsigned RB5                  : 1;
154   unsigned RB6                  : 1;
155   unsigned RB7                  : 1;
156   } __PORTBbits_t;
157 
158 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
159 
160 #define _RB0                    0x01
161 #define _RB1                    0x02
162 #define _RB2                    0x04
163 #define _RB3                    0x08
164 #define _RB4                    0x10
165 #define _RB5                    0x20
166 #define _RB6                    0x40
167 #define _RB7                    0x80
168 
169 //==============================================================================
170 
171 extern __at(0x000A) __sfr PCLATH;
172 
173 //==============================================================================
174 //        INTCON Bits
175 
176 extern __at(0x000B) __sfr INTCON;
177 
178 typedef union
179   {
180   struct
181     {
182     unsigned RBIF               : 1;
183     unsigned INTF               : 1;
184     unsigned T0IF               : 1;
185     unsigned RBIE               : 1;
186     unsigned INTE               : 1;
187     unsigned T0IE               : 1;
188     unsigned                    : 1;
189     unsigned GIE                : 1;
190     };
191 
192   struct
193     {
194     unsigned                    : 1;
195     unsigned                    : 1;
196     unsigned TMR0IF             : 1;
197     unsigned                    : 1;
198     unsigned                    : 1;
199     unsigned TMR0IE             : 1;
200     unsigned                    : 1;
201     unsigned                    : 1;
202     };
203   } __INTCONbits_t;
204 
205 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
206 
207 #define _RBIF                   0x01
208 #define _INTF                   0x02
209 #define _T0IF                   0x04
210 #define _TMR0IF                 0x04
211 #define _RBIE                   0x08
212 #define _INTE                   0x10
213 #define _T0IE                   0x20
214 #define _TMR0IE                 0x20
215 #define _GIE                    0x80
216 
217 //==============================================================================
218 
219 
220 //==============================================================================
221 //        OPTION_REG Bits
222 
223 extern __at(0x0081) __sfr OPTION_REG;
224 
225 typedef union
226   {
227   struct
228     {
229     unsigned PS0                : 1;
230     unsigned PS1                : 1;
231     unsigned PS2                : 1;
232     unsigned PSA                : 1;
233     unsigned T0SE               : 1;
234     unsigned T0CS               : 1;
235     unsigned INTEDG             : 1;
236     unsigned NOT_RBPU           : 1;
237     };
238 
239   struct
240     {
241     unsigned PS                 : 3;
242     unsigned                    : 5;
243     };
244   } __OPTION_REGbits_t;
245 
246 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
247 
248 #define _PS0                    0x01
249 #define _PS1                    0x02
250 #define _PS2                    0x04
251 #define _PSA                    0x08
252 #define _T0SE                   0x10
253 #define _T0CS                   0x20
254 #define _INTEDG                 0x40
255 #define _NOT_RBPU               0x80
256 
257 //==============================================================================
258 
259 
260 //==============================================================================
261 //        TRISA Bits
262 
263 extern __at(0x0085) __sfr TRISA;
264 
265 typedef union
266   {
267   struct
268     {
269     unsigned TRISA0             : 1;
270     unsigned TRISA1             : 1;
271     unsigned TRISA2             : 1;
272     unsigned TRISA3             : 1;
273     unsigned TRISA4             : 1;
274     unsigned                    : 1;
275     unsigned                    : 1;
276     unsigned                    : 1;
277     };
278 
279   struct
280     {
281     unsigned TRISA              : 5;
282     unsigned                    : 3;
283     };
284   } __TRISAbits_t;
285 
286 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
287 
288 #define _TRISA0                 0x01
289 #define _TRISA1                 0x02
290 #define _TRISA2                 0x04
291 #define _TRISA3                 0x08
292 #define _TRISA4                 0x10
293 
294 //==============================================================================
295 
296 
297 //==============================================================================
298 //        TRISB Bits
299 
300 extern __at(0x0086) __sfr TRISB;
301 
302 typedef struct
303   {
304   unsigned TRISB0               : 1;
305   unsigned TRISB1               : 1;
306   unsigned TRISB2               : 1;
307   unsigned TRISB3               : 1;
308   unsigned TRISB4               : 1;
309   unsigned TRISB5               : 1;
310   unsigned TRISB6               : 1;
311   unsigned TRISB7               : 1;
312   } __TRISBbits_t;
313 
314 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
315 
316 #define _TRISB0                 0x01
317 #define _TRISB1                 0x02
318 #define _TRISB2                 0x04
319 #define _TRISB3                 0x08
320 #define _TRISB4                 0x10
321 #define _TRISB5                 0x20
322 #define _TRISB6                 0x40
323 #define _TRISB7                 0x80
324 
325 //==============================================================================
326 
327 
328 //==============================================================================
329 //        PCON Bits
330 
331 extern __at(0x008E) __sfr PCON;
332 
333 typedef struct
334   {
335   unsigned                      : 1;
336   unsigned NOT_POR              : 1;
337   unsigned                      : 1;
338   unsigned                      : 1;
339   unsigned                      : 1;
340   unsigned                      : 1;
341   unsigned                      : 1;
342   unsigned                      : 1;
343   } __PCONbits_t;
344 
345 extern __at(0x008E) volatile __PCONbits_t PCONbits;
346 
347 #define _NOT_POR                0x02
348 
349 //==============================================================================
350 
351 
352 //==============================================================================
353 //
354 //        Configuration Bits
355 //
356 //==============================================================================
357 
358 #define _CONFIG1                0x2007
359 
360 //----------------------------- CONFIG1 Options -------------------------------
361 
362 #define _FOSC_LP                0x3FFC  // LP oscillator.
363 #define _LP_OSC                 0x3FFC  // LP oscillator.
364 #define _FOSC_XT                0x3FFD  // XT oscillator.
365 #define _XT_OSC                 0x3FFD  // XT oscillator.
366 #define _FOSC_HS                0x3FFE  // HS oscillator.
367 #define _HS_OSC                 0x3FFE  // HS oscillator.
368 #define _FOSC_RC                0x3FFF  // RC oscillator.
369 #define _RC_OSC                 0x3FFF  // RC oscillator.
370 #define _WDTE_OFF               0x3FFB  // WDT disabled.
371 #define _WDT_OFF                0x3FFB  // WDT disabled.
372 #define _WDTE_ON                0x3FFF  // WDT enabled.
373 #define _WDT_ON                 0x3FFF  // WDT enabled.
374 #define _PWRTE_ON               0x3FF7  // PWRT enabled.
375 #define _PWRTE_OFF              0x3FFF  // PWRT disabled.
376 #define _CP_ON                  0x00CF  // 0000h:01FFh code protected.
377 #define _CP_OFF                 0x3FFF  // Program Memory code protection off.
378 
379 //==============================================================================
380 
381 #define _IDLOC0                 0x2000
382 #define _IDLOC1                 0x2001
383 #define _IDLOC2                 0x2002
384 #define _IDLOC3                 0x2003
385 
386 //==============================================================================
387 
388 #ifndef NO_BIT_DEFINES
389 
390 #define RBIF                    INTCONbits.RBIF                 // bit 0
391 #define INTF                    INTCONbits.INTF                 // bit 1
392 #define T0IF                    INTCONbits.T0IF                 // bit 2, shadows bit in INTCONbits
393 #define TMR0IF                  INTCONbits.TMR0IF               // bit 2, shadows bit in INTCONbits
394 #define RBIE                    INTCONbits.RBIE                 // bit 3
395 #define INTE                    INTCONbits.INTE                 // bit 4
396 #define T0IE                    INTCONbits.T0IE                 // bit 5, shadows bit in INTCONbits
397 #define TMR0IE                  INTCONbits.TMR0IE               // bit 5, shadows bit in INTCONbits
398 #define GIE                     INTCONbits.GIE                  // bit 7
399 
400 #define PS0                     OPTION_REGbits.PS0              // bit 0
401 #define PS1                     OPTION_REGbits.PS1              // bit 1
402 #define PS2                     OPTION_REGbits.PS2              // bit 2
403 #define PSA                     OPTION_REGbits.PSA              // bit 3
404 #define T0SE                    OPTION_REGbits.T0SE             // bit 4
405 #define T0CS                    OPTION_REGbits.T0CS             // bit 5
406 #define INTEDG                  OPTION_REGbits.INTEDG           // bit 6
407 #define NOT_RBPU                OPTION_REGbits.NOT_RBPU         // bit 7
408 
409 #define NOT_POR                 PCONbits.NOT_POR                // bit 1
410 
411 #define RA0                     PORTAbits.RA0                   // bit 0
412 #define RA1                     PORTAbits.RA1                   // bit 1
413 #define RA2                     PORTAbits.RA2                   // bit 2
414 #define RA3                     PORTAbits.RA3                   // bit 3
415 #define RA4                     PORTAbits.RA4                   // bit 4
416 
417 #define RB0                     PORTBbits.RB0                   // bit 0
418 #define RB1                     PORTBbits.RB1                   // bit 1
419 #define RB2                     PORTBbits.RB2                   // bit 2
420 #define RB3                     PORTBbits.RB3                   // bit 3
421 #define RB4                     PORTBbits.RB4                   // bit 4
422 #define RB5                     PORTBbits.RB5                   // bit 5
423 #define RB6                     PORTBbits.RB6                   // bit 6
424 #define RB7                     PORTBbits.RB7                   // bit 7
425 
426 #define C                       STATUSbits.C                    // bit 0
427 #define DC                      STATUSbits.DC                   // bit 1
428 #define Z                       STATUSbits.Z                    // bit 2
429 #define NOT_PD                  STATUSbits.NOT_PD               // bit 3
430 #define NOT_TO                  STATUSbits.NOT_TO               // bit 4
431 #define RP0                     STATUSbits.RP0                  // bit 5
432 #define RP1                     STATUSbits.RP1                  // bit 6
433 #define IRP                     STATUSbits.IRP                  // bit 7
434 
435 #define TRISA0                  TRISAbits.TRISA0                // bit 0
436 #define TRISA1                  TRISAbits.TRISA1                // bit 1
437 #define TRISA2                  TRISAbits.TRISA2                // bit 2
438 #define TRISA3                  TRISAbits.TRISA3                // bit 3
439 #define TRISA4                  TRISAbits.TRISA4                // bit 4
440 
441 #define TRISB0                  TRISBbits.TRISB0                // bit 0
442 #define TRISB1                  TRISBbits.TRISB1                // bit 1
443 #define TRISB2                  TRISBbits.TRISB2                // bit 2
444 #define TRISB3                  TRISBbits.TRISB3                // bit 3
445 #define TRISB4                  TRISBbits.TRISB4                // bit 4
446 #define TRISB5                  TRISBbits.TRISB5                // bit 5
447 #define TRISB6                  TRISBbits.TRISB6                // bit 6
448 #define TRISB7                  TRISBbits.TRISB7                // bit 7
449 
450 #endif // #ifndef NO_BIT_DEFINES
451 
452 #endif // #ifndef __PIC16C554_H__
453