1 /// @file xed-init-reg-class.c 2 3 // This file was automatically generated. 4 // Do not edit this file. 5 6 /*BEGIN_LEGAL 7 8 Copyright (c) 2018 Intel Corporation 9 10 Licensed under the Apache License, Version 2.0 (the "License"); 11 you may not use this file except in compliance with the License. 12 You may obtain a copy of the License at 13 14 http://www.apache.org/licenses/LICENSE-2.0 15 16 Unless required by applicable law or agreed to in writing, software 17 distributed under the License is distributed on an "AS IS" BASIS, 18 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 19 See the License for the specific language governing permissions and 20 limitations under the License. 21 22 END_LEGAL */ 23 #include "xed-internal-header.h" xed_init_reg_mappings(void)24void xed_init_reg_mappings(void) 25 { 26 xed_reg_class_array[XED_REG_INVALID]= XED_REG_CLASS_INVALID; 27 xed_reg_class_array[XED_REG_ERROR]= XED_REG_CLASS_INVALID; 28 xed_reg_class_array[XED_REG_RAX]= XED_REG_CLASS_GPR; 29 xed_reg_class_array[XED_REG_EAX]= XED_REG_CLASS_GPR; 30 xed_reg_class_array[XED_REG_AX]= XED_REG_CLASS_GPR; 31 xed_reg_class_array[XED_REG_AH]= XED_REG_CLASS_GPR; 32 xed_reg_class_array[XED_REG_AL]= XED_REG_CLASS_GPR; 33 xed_reg_class_array[XED_REG_RCX]= XED_REG_CLASS_GPR; 34 xed_reg_class_array[XED_REG_ECX]= XED_REG_CLASS_GPR; 35 xed_reg_class_array[XED_REG_CX]= XED_REG_CLASS_GPR; 36 xed_reg_class_array[XED_REG_CH]= XED_REG_CLASS_GPR; 37 xed_reg_class_array[XED_REG_CL]= XED_REG_CLASS_GPR; 38 xed_reg_class_array[XED_REG_RDX]= XED_REG_CLASS_GPR; 39 xed_reg_class_array[XED_REG_EDX]= XED_REG_CLASS_GPR; 40 xed_reg_class_array[XED_REG_DX]= XED_REG_CLASS_GPR; 41 xed_reg_class_array[XED_REG_DH]= XED_REG_CLASS_GPR; 42 xed_reg_class_array[XED_REG_DL]= XED_REG_CLASS_GPR; 43 xed_reg_class_array[XED_REG_RBX]= XED_REG_CLASS_GPR; 44 xed_reg_class_array[XED_REG_EBX]= XED_REG_CLASS_GPR; 45 xed_reg_class_array[XED_REG_BX]= XED_REG_CLASS_GPR; 46 xed_reg_class_array[XED_REG_BH]= XED_REG_CLASS_GPR; 47 xed_reg_class_array[XED_REG_BL]= XED_REG_CLASS_GPR; 48 xed_reg_class_array[XED_REG_RSP]= XED_REG_CLASS_GPR; 49 xed_reg_class_array[XED_REG_ESP]= XED_REG_CLASS_GPR; 50 xed_reg_class_array[XED_REG_SP]= XED_REG_CLASS_GPR; 51 xed_reg_class_array[XED_REG_SPL]= XED_REG_CLASS_GPR; 52 xed_reg_class_array[XED_REG_RBP]= XED_REG_CLASS_GPR; 53 xed_reg_class_array[XED_REG_EBP]= XED_REG_CLASS_GPR; 54 xed_reg_class_array[XED_REG_BP]= XED_REG_CLASS_GPR; 55 xed_reg_class_array[XED_REG_BPL]= XED_REG_CLASS_GPR; 56 xed_reg_class_array[XED_REG_RSI]= XED_REG_CLASS_GPR; 57 xed_reg_class_array[XED_REG_ESI]= XED_REG_CLASS_GPR; 58 xed_reg_class_array[XED_REG_SI]= XED_REG_CLASS_GPR; 59 xed_reg_class_array[XED_REG_SIL]= XED_REG_CLASS_GPR; 60 xed_reg_class_array[XED_REG_RDI]= XED_REG_CLASS_GPR; 61 xed_reg_class_array[XED_REG_EDI]= XED_REG_CLASS_GPR; 62 xed_reg_class_array[XED_REG_DI]= XED_REG_CLASS_GPR; 63 xed_reg_class_array[XED_REG_DIL]= XED_REG_CLASS_GPR; 64 xed_reg_class_array[XED_REG_R8]= XED_REG_CLASS_GPR; 65 xed_reg_class_array[XED_REG_R8D]= XED_REG_CLASS_GPR; 66 xed_reg_class_array[XED_REG_R8W]= XED_REG_CLASS_GPR; 67 xed_reg_class_array[XED_REG_R8B]= XED_REG_CLASS_GPR; 68 xed_reg_class_array[XED_REG_R9]= XED_REG_CLASS_GPR; 69 xed_reg_class_array[XED_REG_R9D]= XED_REG_CLASS_GPR; 70 xed_reg_class_array[XED_REG_R9W]= XED_REG_CLASS_GPR; 71 xed_reg_class_array[XED_REG_R9B]= XED_REG_CLASS_GPR; 72 xed_reg_class_array[XED_REG_R10]= XED_REG_CLASS_GPR; 73 xed_reg_class_array[XED_REG_R10D]= XED_REG_CLASS_GPR; 74 xed_reg_class_array[XED_REG_R10W]= XED_REG_CLASS_GPR; 75 xed_reg_class_array[XED_REG_R10B]= XED_REG_CLASS_GPR; 76 xed_reg_class_array[XED_REG_R11]= XED_REG_CLASS_GPR; 77 xed_reg_class_array[XED_REG_R11D]= XED_REG_CLASS_GPR; 78 xed_reg_class_array[XED_REG_R11W]= XED_REG_CLASS_GPR; 79 xed_reg_class_array[XED_REG_R11B]= XED_REG_CLASS_GPR; 80 xed_reg_class_array[XED_REG_R12]= XED_REG_CLASS_GPR; 81 xed_reg_class_array[XED_REG_R12D]= XED_REG_CLASS_GPR; 82 xed_reg_class_array[XED_REG_R12W]= XED_REG_CLASS_GPR; 83 xed_reg_class_array[XED_REG_R12B]= XED_REG_CLASS_GPR; 84 xed_reg_class_array[XED_REG_R13]= XED_REG_CLASS_GPR; 85 xed_reg_class_array[XED_REG_R13D]= XED_REG_CLASS_GPR; 86 xed_reg_class_array[XED_REG_R13W]= XED_REG_CLASS_GPR; 87 xed_reg_class_array[XED_REG_R13B]= XED_REG_CLASS_GPR; 88 xed_reg_class_array[XED_REG_R14]= XED_REG_CLASS_GPR; 89 xed_reg_class_array[XED_REG_R14D]= XED_REG_CLASS_GPR; 90 xed_reg_class_array[XED_REG_R14W]= XED_REG_CLASS_GPR; 91 xed_reg_class_array[XED_REG_R14B]= XED_REG_CLASS_GPR; 92 xed_reg_class_array[XED_REG_R15]= XED_REG_CLASS_GPR; 93 xed_reg_class_array[XED_REG_R15D]= XED_REG_CLASS_GPR; 94 xed_reg_class_array[XED_REG_R15W]= XED_REG_CLASS_GPR; 95 xed_reg_class_array[XED_REG_R15B]= XED_REG_CLASS_GPR; 96 xed_reg_class_array[XED_REG_RIP]= XED_REG_CLASS_IP; 97 xed_reg_class_array[XED_REG_EIP]= XED_REG_CLASS_IP; 98 xed_reg_class_array[XED_REG_IP]= XED_REG_CLASS_IP; 99 xed_reg_class_array[XED_REG_FLAGS]= XED_REG_CLASS_FLAGS; 100 xed_reg_class_array[XED_REG_EFLAGS]= XED_REG_CLASS_FLAGS; 101 xed_reg_class_array[XED_REG_RFLAGS]= XED_REG_CLASS_FLAGS; 102 xed_reg_class_array[XED_REG_CS]= XED_REG_CLASS_SR; 103 xed_reg_class_array[XED_REG_DS]= XED_REG_CLASS_SR; 104 xed_reg_class_array[XED_REG_ES]= XED_REG_CLASS_SR; 105 xed_reg_class_array[XED_REG_SS]= XED_REG_CLASS_SR; 106 xed_reg_class_array[XED_REG_FS]= XED_REG_CLASS_SR; 107 xed_reg_class_array[XED_REG_GS]= XED_REG_CLASS_SR; 108 xed_reg_class_array[XED_REG_MMX0]= XED_REG_CLASS_MMX; 109 xed_reg_class_array[XED_REG_MMX1]= XED_REG_CLASS_MMX; 110 xed_reg_class_array[XED_REG_MMX2]= XED_REG_CLASS_MMX; 111 xed_reg_class_array[XED_REG_MMX3]= XED_REG_CLASS_MMX; 112 xed_reg_class_array[XED_REG_MMX4]= XED_REG_CLASS_MMX; 113 xed_reg_class_array[XED_REG_MMX5]= XED_REG_CLASS_MMX; 114 xed_reg_class_array[XED_REG_MMX6]= XED_REG_CLASS_MMX; 115 xed_reg_class_array[XED_REG_MMX7]= XED_REG_CLASS_MMX; 116 xed_reg_class_array[XED_REG_ST0]= XED_REG_CLASS_X87; 117 xed_reg_class_array[XED_REG_ST1]= XED_REG_CLASS_X87; 118 xed_reg_class_array[XED_REG_ST2]= XED_REG_CLASS_X87; 119 xed_reg_class_array[XED_REG_ST3]= XED_REG_CLASS_X87; 120 xed_reg_class_array[XED_REG_ST4]= XED_REG_CLASS_X87; 121 xed_reg_class_array[XED_REG_ST5]= XED_REG_CLASS_X87; 122 xed_reg_class_array[XED_REG_ST6]= XED_REG_CLASS_X87; 123 xed_reg_class_array[XED_REG_ST7]= XED_REG_CLASS_X87; 124 xed_reg_class_array[XED_REG_CR0]= XED_REG_CLASS_CR; 125 xed_reg_class_array[XED_REG_CR1]= XED_REG_CLASS_CR; 126 xed_reg_class_array[XED_REG_CR2]= XED_REG_CLASS_CR; 127 xed_reg_class_array[XED_REG_CR3]= XED_REG_CLASS_CR; 128 xed_reg_class_array[XED_REG_CR4]= XED_REG_CLASS_CR; 129 xed_reg_class_array[XED_REG_CR5]= XED_REG_CLASS_CR; 130 xed_reg_class_array[XED_REG_CR6]= XED_REG_CLASS_CR; 131 xed_reg_class_array[XED_REG_CR7]= XED_REG_CLASS_CR; 132 xed_reg_class_array[XED_REG_CR8]= XED_REG_CLASS_CR; 133 xed_reg_class_array[XED_REG_CR9]= XED_REG_CLASS_CR; 134 xed_reg_class_array[XED_REG_CR10]= XED_REG_CLASS_CR; 135 xed_reg_class_array[XED_REG_CR11]= XED_REG_CLASS_CR; 136 xed_reg_class_array[XED_REG_CR12]= XED_REG_CLASS_CR; 137 xed_reg_class_array[XED_REG_CR13]= XED_REG_CLASS_CR; 138 xed_reg_class_array[XED_REG_CR14]= XED_REG_CLASS_CR; 139 xed_reg_class_array[XED_REG_CR15]= XED_REG_CLASS_CR; 140 xed_reg_class_array[XED_REG_DR0]= XED_REG_CLASS_DR; 141 xed_reg_class_array[XED_REG_DR1]= XED_REG_CLASS_DR; 142 xed_reg_class_array[XED_REG_DR2]= XED_REG_CLASS_DR; 143 xed_reg_class_array[XED_REG_DR3]= XED_REG_CLASS_DR; 144 xed_reg_class_array[XED_REG_DR4]= XED_REG_CLASS_DR; 145 xed_reg_class_array[XED_REG_DR5]= XED_REG_CLASS_DR; 146 xed_reg_class_array[XED_REG_DR6]= XED_REG_CLASS_DR; 147 xed_reg_class_array[XED_REG_DR7]= XED_REG_CLASS_DR; 148 xed_reg_class_array[XED_REG_STACKPUSH]= XED_REG_CLASS_PSEUDO; 149 xed_reg_class_array[XED_REG_STACKPOP]= XED_REG_CLASS_PSEUDO; 150 xed_reg_class_array[XED_REG_GDTR]= XED_REG_CLASS_PSEUDO; 151 xed_reg_class_array[XED_REG_LDTR]= XED_REG_CLASS_PSEUDO; 152 xed_reg_class_array[XED_REG_IDTR]= XED_REG_CLASS_PSEUDO; 153 xed_reg_class_array[XED_REG_TR]= XED_REG_CLASS_PSEUDO; 154 xed_reg_class_array[XED_REG_TSC]= XED_REG_CLASS_PSEUDO; 155 xed_reg_class_array[XED_REG_TSCAUX]= XED_REG_CLASS_PSEUDO; 156 xed_reg_class_array[XED_REG_MSRS]= XED_REG_CLASS_PSEUDO; 157 xed_reg_class_array[XED_REG_X87CONTROL]= XED_REG_CLASS_PSEUDOX87; 158 xed_reg_class_array[XED_REG_X87STATUS]= XED_REG_CLASS_PSEUDOX87; 159 xed_reg_class_array[XED_REG_X87TAG]= XED_REG_CLASS_PSEUDOX87; 160 xed_reg_class_array[XED_REG_X87PUSH]= XED_REG_CLASS_PSEUDOX87; 161 xed_reg_class_array[XED_REG_X87POP]= XED_REG_CLASS_PSEUDOX87; 162 xed_reg_class_array[XED_REG_X87POP2]= XED_REG_CLASS_PSEUDOX87; 163 xed_reg_class_array[XED_REG_X87OPCODE]= XED_REG_CLASS_PSEUDOX87; 164 xed_reg_class_array[XED_REG_X87LASTCS]= XED_REG_CLASS_PSEUDOX87; 165 xed_reg_class_array[XED_REG_X87LASTIP]= XED_REG_CLASS_PSEUDOX87; 166 xed_reg_class_array[XED_REG_X87LASTDS]= XED_REG_CLASS_PSEUDOX87; 167 xed_reg_class_array[XED_REG_X87LASTDP]= XED_REG_CLASS_PSEUDOX87; 168 xed_reg_class_array[XED_REG_XCR0]= XED_REG_CLASS_XCR; 169 xed_reg_class_array[XED_REG_MXCSR]= XED_REG_CLASS_MXCSR; 170 xed_reg_class_array[XED_REG_TMP0]= XED_REG_CLASS_TMP; 171 xed_reg_class_array[XED_REG_TMP1]= XED_REG_CLASS_TMP; 172 xed_reg_class_array[XED_REG_TMP2]= XED_REG_CLASS_TMP; 173 xed_reg_class_array[XED_REG_TMP3]= XED_REG_CLASS_TMP; 174 xed_reg_class_array[XED_REG_TMP4]= XED_REG_CLASS_TMP; 175 xed_reg_class_array[XED_REG_TMP5]= XED_REG_CLASS_TMP; 176 xed_reg_class_array[XED_REG_TMP6]= XED_REG_CLASS_TMP; 177 xed_reg_class_array[XED_REG_TMP7]= XED_REG_CLASS_TMP; 178 xed_reg_class_array[XED_REG_TMP8]= XED_REG_CLASS_TMP; 179 xed_reg_class_array[XED_REG_TMP9]= XED_REG_CLASS_TMP; 180 xed_reg_class_array[XED_REG_TMP10]= XED_REG_CLASS_TMP; 181 xed_reg_class_array[XED_REG_TMP11]= XED_REG_CLASS_TMP; 182 xed_reg_class_array[XED_REG_TMP12]= XED_REG_CLASS_TMP; 183 xed_reg_class_array[XED_REG_TMP13]= XED_REG_CLASS_TMP; 184 xed_reg_class_array[XED_REG_TMP14]= XED_REG_CLASS_TMP; 185 xed_reg_class_array[XED_REG_TMP15]= XED_REG_CLASS_TMP; 186 xed_reg_class_array[XED_REG_K0]= XED_REG_CLASS_MASK; 187 xed_reg_class_array[XED_REG_K1]= XED_REG_CLASS_MASK; 188 xed_reg_class_array[XED_REG_K2]= XED_REG_CLASS_MASK; 189 xed_reg_class_array[XED_REG_K3]= XED_REG_CLASS_MASK; 190 xed_reg_class_array[XED_REG_K4]= XED_REG_CLASS_MASK; 191 xed_reg_class_array[XED_REG_K5]= XED_REG_CLASS_MASK; 192 xed_reg_class_array[XED_REG_K6]= XED_REG_CLASS_MASK; 193 xed_reg_class_array[XED_REG_K7]= XED_REG_CLASS_MASK; 194 xed_reg_class_array[XED_REG_BND0]= XED_REG_CLASS_BOUND; 195 xed_reg_class_array[XED_REG_BND1]= XED_REG_CLASS_BOUND; 196 xed_reg_class_array[XED_REG_BND2]= XED_REG_CLASS_BOUND; 197 xed_reg_class_array[XED_REG_BND3]= XED_REG_CLASS_BOUND; 198 xed_reg_class_array[XED_REG_BNDCFGU]= XED_REG_CLASS_BNDCFG; 199 xed_reg_class_array[XED_REG_BNDSTATUS]= XED_REG_CLASS_BNDSTAT; 200 xed_reg_class_array[XED_REG_SSP]= XED_REG_CLASS_MSR; 201 xed_reg_class_array[XED_REG_IA32_U_CET]= XED_REG_CLASS_MSR; 202 xed_reg_class_array[XED_REG_FSBASE]= XED_REG_CLASS_PSEUDO; 203 xed_reg_class_array[XED_REG_GSBASE]= XED_REG_CLASS_PSEUDO; 204 xed_reg_class_array[XED_REG_XMM0]= XED_REG_CLASS_XMM; 205 xed_reg_class_array[XED_REG_XMM1]= XED_REG_CLASS_XMM; 206 xed_reg_class_array[XED_REG_XMM2]= XED_REG_CLASS_XMM; 207 xed_reg_class_array[XED_REG_XMM3]= XED_REG_CLASS_XMM; 208 xed_reg_class_array[XED_REG_XMM4]= XED_REG_CLASS_XMM; 209 xed_reg_class_array[XED_REG_XMM5]= XED_REG_CLASS_XMM; 210 xed_reg_class_array[XED_REG_XMM6]= XED_REG_CLASS_XMM; 211 xed_reg_class_array[XED_REG_XMM7]= XED_REG_CLASS_XMM; 212 xed_reg_class_array[XED_REG_XMM8]= XED_REG_CLASS_XMM; 213 xed_reg_class_array[XED_REG_XMM9]= XED_REG_CLASS_XMM; 214 xed_reg_class_array[XED_REG_XMM10]= XED_REG_CLASS_XMM; 215 xed_reg_class_array[XED_REG_XMM11]= XED_REG_CLASS_XMM; 216 xed_reg_class_array[XED_REG_XMM12]= XED_REG_CLASS_XMM; 217 xed_reg_class_array[XED_REG_XMM13]= XED_REG_CLASS_XMM; 218 xed_reg_class_array[XED_REG_XMM14]= XED_REG_CLASS_XMM; 219 xed_reg_class_array[XED_REG_XMM15]= XED_REG_CLASS_XMM; 220 xed_reg_class_array[XED_REG_YMM0]= XED_REG_CLASS_YMM; 221 xed_reg_class_array[XED_REG_YMM1]= XED_REG_CLASS_YMM; 222 xed_reg_class_array[XED_REG_YMM2]= XED_REG_CLASS_YMM; 223 xed_reg_class_array[XED_REG_YMM3]= XED_REG_CLASS_YMM; 224 xed_reg_class_array[XED_REG_YMM4]= XED_REG_CLASS_YMM; 225 xed_reg_class_array[XED_REG_YMM5]= XED_REG_CLASS_YMM; 226 xed_reg_class_array[XED_REG_YMM6]= XED_REG_CLASS_YMM; 227 xed_reg_class_array[XED_REG_YMM7]= XED_REG_CLASS_YMM; 228 xed_reg_class_array[XED_REG_YMM8]= XED_REG_CLASS_YMM; 229 xed_reg_class_array[XED_REG_YMM9]= XED_REG_CLASS_YMM; 230 xed_reg_class_array[XED_REG_YMM10]= XED_REG_CLASS_YMM; 231 xed_reg_class_array[XED_REG_YMM11]= XED_REG_CLASS_YMM; 232 xed_reg_class_array[XED_REG_YMM12]= XED_REG_CLASS_YMM; 233 xed_reg_class_array[XED_REG_YMM13]= XED_REG_CLASS_YMM; 234 xed_reg_class_array[XED_REG_YMM14]= XED_REG_CLASS_YMM; 235 xed_reg_class_array[XED_REG_YMM15]= XED_REG_CLASS_YMM; 236 xed_reg_class_array[XED_REG_ZMM0]= XED_REG_CLASS_ZMM; 237 xed_reg_class_array[XED_REG_ZMM1]= XED_REG_CLASS_ZMM; 238 xed_reg_class_array[XED_REG_ZMM2]= XED_REG_CLASS_ZMM; 239 xed_reg_class_array[XED_REG_ZMM3]= XED_REG_CLASS_ZMM; 240 xed_reg_class_array[XED_REG_ZMM4]= XED_REG_CLASS_ZMM; 241 xed_reg_class_array[XED_REG_ZMM5]= XED_REG_CLASS_ZMM; 242 xed_reg_class_array[XED_REG_ZMM6]= XED_REG_CLASS_ZMM; 243 xed_reg_class_array[XED_REG_ZMM7]= XED_REG_CLASS_ZMM; 244 xed_reg_class_array[XED_REG_ZMM8]= XED_REG_CLASS_ZMM; 245 xed_reg_class_array[XED_REG_ZMM9]= XED_REG_CLASS_ZMM; 246 xed_reg_class_array[XED_REG_ZMM10]= XED_REG_CLASS_ZMM; 247 xed_reg_class_array[XED_REG_ZMM11]= XED_REG_CLASS_ZMM; 248 xed_reg_class_array[XED_REG_ZMM12]= XED_REG_CLASS_ZMM; 249 xed_reg_class_array[XED_REG_ZMM13]= XED_REG_CLASS_ZMM; 250 xed_reg_class_array[XED_REG_ZMM14]= XED_REG_CLASS_ZMM; 251 xed_reg_class_array[XED_REG_ZMM15]= XED_REG_CLASS_ZMM; 252 xed_reg_class_array[XED_REG_ZMM16]= XED_REG_CLASS_ZMM; 253 xed_reg_class_array[XED_REG_ZMM17]= XED_REG_CLASS_ZMM; 254 xed_reg_class_array[XED_REG_ZMM18]= XED_REG_CLASS_ZMM; 255 xed_reg_class_array[XED_REG_ZMM19]= XED_REG_CLASS_ZMM; 256 xed_reg_class_array[XED_REG_ZMM20]= XED_REG_CLASS_ZMM; 257 xed_reg_class_array[XED_REG_ZMM21]= XED_REG_CLASS_ZMM; 258 xed_reg_class_array[XED_REG_ZMM22]= XED_REG_CLASS_ZMM; 259 xed_reg_class_array[XED_REG_ZMM23]= XED_REG_CLASS_ZMM; 260 xed_reg_class_array[XED_REG_ZMM24]= XED_REG_CLASS_ZMM; 261 xed_reg_class_array[XED_REG_ZMM25]= XED_REG_CLASS_ZMM; 262 xed_reg_class_array[XED_REG_ZMM26]= XED_REG_CLASS_ZMM; 263 xed_reg_class_array[XED_REG_ZMM27]= XED_REG_CLASS_ZMM; 264 xed_reg_class_array[XED_REG_ZMM28]= XED_REG_CLASS_ZMM; 265 xed_reg_class_array[XED_REG_ZMM29]= XED_REG_CLASS_ZMM; 266 xed_reg_class_array[XED_REG_ZMM30]= XED_REG_CLASS_ZMM; 267 xed_reg_class_array[XED_REG_ZMM31]= XED_REG_CLASS_ZMM; 268 xed_reg_class_array[XED_REG_XMM16]= XED_REG_CLASS_XMM; 269 xed_reg_class_array[XED_REG_XMM17]= XED_REG_CLASS_XMM; 270 xed_reg_class_array[XED_REG_XMM18]= XED_REG_CLASS_XMM; 271 xed_reg_class_array[XED_REG_XMM19]= XED_REG_CLASS_XMM; 272 xed_reg_class_array[XED_REG_XMM20]= XED_REG_CLASS_XMM; 273 xed_reg_class_array[XED_REG_XMM21]= XED_REG_CLASS_XMM; 274 xed_reg_class_array[XED_REG_XMM22]= XED_REG_CLASS_XMM; 275 xed_reg_class_array[XED_REG_XMM23]= XED_REG_CLASS_XMM; 276 xed_reg_class_array[XED_REG_XMM24]= XED_REG_CLASS_XMM; 277 xed_reg_class_array[XED_REG_XMM25]= XED_REG_CLASS_XMM; 278 xed_reg_class_array[XED_REG_XMM26]= XED_REG_CLASS_XMM; 279 xed_reg_class_array[XED_REG_XMM27]= XED_REG_CLASS_XMM; 280 xed_reg_class_array[XED_REG_XMM28]= XED_REG_CLASS_XMM; 281 xed_reg_class_array[XED_REG_XMM29]= XED_REG_CLASS_XMM; 282 xed_reg_class_array[XED_REG_XMM30]= XED_REG_CLASS_XMM; 283 xed_reg_class_array[XED_REG_XMM31]= XED_REG_CLASS_XMM; 284 xed_reg_class_array[XED_REG_YMM16]= XED_REG_CLASS_YMM; 285 xed_reg_class_array[XED_REG_YMM17]= XED_REG_CLASS_YMM; 286 xed_reg_class_array[XED_REG_YMM18]= XED_REG_CLASS_YMM; 287 xed_reg_class_array[XED_REG_YMM19]= XED_REG_CLASS_YMM; 288 xed_reg_class_array[XED_REG_YMM20]= XED_REG_CLASS_YMM; 289 xed_reg_class_array[XED_REG_YMM21]= XED_REG_CLASS_YMM; 290 xed_reg_class_array[XED_REG_YMM22]= XED_REG_CLASS_YMM; 291 xed_reg_class_array[XED_REG_YMM23]= XED_REG_CLASS_YMM; 292 xed_reg_class_array[XED_REG_YMM24]= XED_REG_CLASS_YMM; 293 xed_reg_class_array[XED_REG_YMM25]= XED_REG_CLASS_YMM; 294 xed_reg_class_array[XED_REG_YMM26]= XED_REG_CLASS_YMM; 295 xed_reg_class_array[XED_REG_YMM27]= XED_REG_CLASS_YMM; 296 xed_reg_class_array[XED_REG_YMM28]= XED_REG_CLASS_YMM; 297 xed_reg_class_array[XED_REG_YMM29]= XED_REG_CLASS_YMM; 298 xed_reg_class_array[XED_REG_YMM30]= XED_REG_CLASS_YMM; 299 xed_reg_class_array[XED_REG_YMM31]= XED_REG_CLASS_YMM; 300 xed_largest_enclosing_register_array[XED_REG_INVALID]= XED_REG_INVALID; 301 xed_largest_enclosing_register_array_32[XED_REG_INVALID]= XED_REG_INVALID; 302 xed_largest_enclosing_register_array[XED_REG_ERROR]= XED_REG_ERROR; 303 xed_largest_enclosing_register_array_32[XED_REG_ERROR]= XED_REG_ERROR; 304 xed_largest_enclosing_register_array[XED_REG_RAX]= XED_REG_RAX; 305 xed_largest_enclosing_register_array_32[XED_REG_RAX]= XED_REG_RAX; 306 xed_largest_enclosing_register_array[XED_REG_EAX]= XED_REG_RAX; 307 xed_largest_enclosing_register_array_32[XED_REG_EAX]= XED_REG_EAX; 308 xed_largest_enclosing_register_array[XED_REG_AX]= XED_REG_RAX; 309 xed_largest_enclosing_register_array_32[XED_REG_AX]= XED_REG_EAX; 310 xed_largest_enclosing_register_array[XED_REG_AH]= XED_REG_RAX; 311 xed_largest_enclosing_register_array_32[XED_REG_AH]= XED_REG_EAX; 312 xed_largest_enclosing_register_array[XED_REG_AL]= XED_REG_RAX; 313 xed_largest_enclosing_register_array_32[XED_REG_AL]= XED_REG_EAX; 314 xed_largest_enclosing_register_array[XED_REG_RCX]= XED_REG_RCX; 315 xed_largest_enclosing_register_array_32[XED_REG_RCX]= XED_REG_RCX; 316 xed_largest_enclosing_register_array[XED_REG_ECX]= XED_REG_RCX; 317 xed_largest_enclosing_register_array_32[XED_REG_ECX]= XED_REG_ECX; 318 xed_largest_enclosing_register_array[XED_REG_CX]= XED_REG_RCX; 319 xed_largest_enclosing_register_array_32[XED_REG_CX]= XED_REG_ECX; 320 xed_largest_enclosing_register_array[XED_REG_CH]= XED_REG_RCX; 321 xed_largest_enclosing_register_array_32[XED_REG_CH]= XED_REG_ECX; 322 xed_largest_enclosing_register_array[XED_REG_CL]= XED_REG_RCX; 323 xed_largest_enclosing_register_array_32[XED_REG_CL]= XED_REG_ECX; 324 xed_largest_enclosing_register_array[XED_REG_RDX]= XED_REG_RDX; 325 xed_largest_enclosing_register_array_32[XED_REG_RDX]= XED_REG_RDX; 326 xed_largest_enclosing_register_array[XED_REG_EDX]= XED_REG_RDX; 327 xed_largest_enclosing_register_array_32[XED_REG_EDX]= XED_REG_EDX; 328 xed_largest_enclosing_register_array[XED_REG_DX]= XED_REG_RDX; 329 xed_largest_enclosing_register_array_32[XED_REG_DX]= XED_REG_EDX; 330 xed_largest_enclosing_register_array[XED_REG_DH]= XED_REG_RDX; 331 xed_largest_enclosing_register_array_32[XED_REG_DH]= XED_REG_EDX; 332 xed_largest_enclosing_register_array[XED_REG_DL]= XED_REG_RDX; 333 xed_largest_enclosing_register_array_32[XED_REG_DL]= XED_REG_EDX; 334 xed_largest_enclosing_register_array[XED_REG_RBX]= XED_REG_RBX; 335 xed_largest_enclosing_register_array_32[XED_REG_RBX]= XED_REG_RBX; 336 xed_largest_enclosing_register_array[XED_REG_EBX]= XED_REG_RBX; 337 xed_largest_enclosing_register_array_32[XED_REG_EBX]= XED_REG_EBX; 338 xed_largest_enclosing_register_array[XED_REG_BX]= XED_REG_RBX; 339 xed_largest_enclosing_register_array_32[XED_REG_BX]= XED_REG_EBX; 340 xed_largest_enclosing_register_array[XED_REG_BH]= XED_REG_RBX; 341 xed_largest_enclosing_register_array_32[XED_REG_BH]= XED_REG_EBX; 342 xed_largest_enclosing_register_array[XED_REG_BL]= XED_REG_RBX; 343 xed_largest_enclosing_register_array_32[XED_REG_BL]= XED_REG_EBX; 344 xed_largest_enclosing_register_array[XED_REG_RSP]= XED_REG_RSP; 345 xed_largest_enclosing_register_array_32[XED_REG_RSP]= XED_REG_RSP; 346 xed_largest_enclosing_register_array[XED_REG_ESP]= XED_REG_RSP; 347 xed_largest_enclosing_register_array_32[XED_REG_ESP]= XED_REG_ESP; 348 xed_largest_enclosing_register_array[XED_REG_SP]= XED_REG_RSP; 349 xed_largest_enclosing_register_array_32[XED_REG_SP]= XED_REG_ESP; 350 xed_largest_enclosing_register_array[XED_REG_SPL]= XED_REG_RSP; 351 xed_largest_enclosing_register_array_32[XED_REG_SPL]= XED_REG_ESP; 352 xed_largest_enclosing_register_array[XED_REG_RBP]= XED_REG_RBP; 353 xed_largest_enclosing_register_array_32[XED_REG_RBP]= XED_REG_RBP; 354 xed_largest_enclosing_register_array[XED_REG_EBP]= XED_REG_RBP; 355 xed_largest_enclosing_register_array_32[XED_REG_EBP]= XED_REG_EBP; 356 xed_largest_enclosing_register_array[XED_REG_BP]= XED_REG_RBP; 357 xed_largest_enclosing_register_array_32[XED_REG_BP]= XED_REG_EBP; 358 xed_largest_enclosing_register_array[XED_REG_BPL]= XED_REG_RBP; 359 xed_largest_enclosing_register_array_32[XED_REG_BPL]= XED_REG_EBP; 360 xed_largest_enclosing_register_array[XED_REG_RSI]= XED_REG_RSI; 361 xed_largest_enclosing_register_array_32[XED_REG_RSI]= XED_REG_RSI; 362 xed_largest_enclosing_register_array[XED_REG_ESI]= XED_REG_RSI; 363 xed_largest_enclosing_register_array_32[XED_REG_ESI]= XED_REG_ESI; 364 xed_largest_enclosing_register_array[XED_REG_SI]= XED_REG_RSI; 365 xed_largest_enclosing_register_array_32[XED_REG_SI]= XED_REG_ESI; 366 xed_largest_enclosing_register_array[XED_REG_SIL]= XED_REG_RSI; 367 xed_largest_enclosing_register_array_32[XED_REG_SIL]= XED_REG_ESI; 368 xed_largest_enclosing_register_array[XED_REG_RDI]= XED_REG_RDI; 369 xed_largest_enclosing_register_array_32[XED_REG_RDI]= XED_REG_RDI; 370 xed_largest_enclosing_register_array[XED_REG_EDI]= XED_REG_RDI; 371 xed_largest_enclosing_register_array_32[XED_REG_EDI]= XED_REG_EDI; 372 xed_largest_enclosing_register_array[XED_REG_DI]= XED_REG_RDI; 373 xed_largest_enclosing_register_array_32[XED_REG_DI]= XED_REG_EDI; 374 xed_largest_enclosing_register_array[XED_REG_DIL]= XED_REG_RDI; 375 xed_largest_enclosing_register_array_32[XED_REG_DIL]= XED_REG_EDI; 376 xed_largest_enclosing_register_array[XED_REG_R8]= XED_REG_R8; 377 xed_largest_enclosing_register_array_32[XED_REG_R8]= XED_REG_R8; 378 xed_largest_enclosing_register_array[XED_REG_R8D]= XED_REG_R8; 379 xed_largest_enclosing_register_array_32[XED_REG_R8D]= XED_REG_R8D; 380 xed_largest_enclosing_register_array[XED_REG_R8W]= XED_REG_R8; 381 xed_largest_enclosing_register_array_32[XED_REG_R8W]= XED_REG_R8D; 382 xed_largest_enclosing_register_array[XED_REG_R8B]= XED_REG_R8; 383 xed_largest_enclosing_register_array_32[XED_REG_R8B]= XED_REG_R8D; 384 xed_largest_enclosing_register_array[XED_REG_R9]= XED_REG_R9; 385 xed_largest_enclosing_register_array_32[XED_REG_R9]= XED_REG_R9; 386 xed_largest_enclosing_register_array[XED_REG_R9D]= XED_REG_R9; 387 xed_largest_enclosing_register_array_32[XED_REG_R9D]= XED_REG_R9D; 388 xed_largest_enclosing_register_array[XED_REG_R9W]= XED_REG_R9; 389 xed_largest_enclosing_register_array_32[XED_REG_R9W]= XED_REG_R9D; 390 xed_largest_enclosing_register_array[XED_REG_R9B]= XED_REG_R9; 391 xed_largest_enclosing_register_array_32[XED_REG_R9B]= XED_REG_R9D; 392 xed_largest_enclosing_register_array[XED_REG_R10]= XED_REG_R10; 393 xed_largest_enclosing_register_array_32[XED_REG_R10]= XED_REG_R10; 394 xed_largest_enclosing_register_array[XED_REG_R10D]= XED_REG_R10; 395 xed_largest_enclosing_register_array_32[XED_REG_R10D]= XED_REG_R10D; 396 xed_largest_enclosing_register_array[XED_REG_R10W]= XED_REG_R10; 397 xed_largest_enclosing_register_array_32[XED_REG_R10W]= XED_REG_R10D; 398 xed_largest_enclosing_register_array[XED_REG_R10B]= XED_REG_R10; 399 xed_largest_enclosing_register_array_32[XED_REG_R10B]= XED_REG_R10D; 400 xed_largest_enclosing_register_array[XED_REG_R11]= XED_REG_R11; 401 xed_largest_enclosing_register_array_32[XED_REG_R11]= XED_REG_R11; 402 xed_largest_enclosing_register_array[XED_REG_R11D]= XED_REG_R11; 403 xed_largest_enclosing_register_array_32[XED_REG_R11D]= XED_REG_R11D; 404 xed_largest_enclosing_register_array[XED_REG_R11W]= XED_REG_R11; 405 xed_largest_enclosing_register_array_32[XED_REG_R11W]= XED_REG_R11D; 406 xed_largest_enclosing_register_array[XED_REG_R11B]= XED_REG_R11; 407 xed_largest_enclosing_register_array_32[XED_REG_R11B]= XED_REG_R11D; 408 xed_largest_enclosing_register_array[XED_REG_R12]= XED_REG_R12; 409 xed_largest_enclosing_register_array_32[XED_REG_R12]= XED_REG_R12; 410 xed_largest_enclosing_register_array[XED_REG_R12D]= XED_REG_R12; 411 xed_largest_enclosing_register_array_32[XED_REG_R12D]= XED_REG_R12D; 412 xed_largest_enclosing_register_array[XED_REG_R12W]= XED_REG_R12; 413 xed_largest_enclosing_register_array_32[XED_REG_R12W]= XED_REG_R12D; 414 xed_largest_enclosing_register_array[XED_REG_R12B]= XED_REG_R12; 415 xed_largest_enclosing_register_array_32[XED_REG_R12B]= XED_REG_R12D; 416 xed_largest_enclosing_register_array[XED_REG_R13]= XED_REG_R13; 417 xed_largest_enclosing_register_array_32[XED_REG_R13]= XED_REG_R13; 418 xed_largest_enclosing_register_array[XED_REG_R13D]= XED_REG_R13; 419 xed_largest_enclosing_register_array_32[XED_REG_R13D]= XED_REG_R13D; 420 xed_largest_enclosing_register_array[XED_REG_R13W]= XED_REG_R13; 421 xed_largest_enclosing_register_array_32[XED_REG_R13W]= XED_REG_R13D; 422 xed_largest_enclosing_register_array[XED_REG_R13B]= XED_REG_R13; 423 xed_largest_enclosing_register_array_32[XED_REG_R13B]= XED_REG_R13D; 424 xed_largest_enclosing_register_array[XED_REG_R14]= XED_REG_R14; 425 xed_largest_enclosing_register_array_32[XED_REG_R14]= XED_REG_R14; 426 xed_largest_enclosing_register_array[XED_REG_R14D]= XED_REG_R14; 427 xed_largest_enclosing_register_array_32[XED_REG_R14D]= XED_REG_R14D; 428 xed_largest_enclosing_register_array[XED_REG_R14W]= XED_REG_R14; 429 xed_largest_enclosing_register_array_32[XED_REG_R14W]= XED_REG_R14D; 430 xed_largest_enclosing_register_array[XED_REG_R14B]= XED_REG_R14; 431 xed_largest_enclosing_register_array_32[XED_REG_R14B]= XED_REG_R14D; 432 xed_largest_enclosing_register_array[XED_REG_R15]= XED_REG_R15; 433 xed_largest_enclosing_register_array_32[XED_REG_R15]= XED_REG_R15; 434 xed_largest_enclosing_register_array[XED_REG_R15D]= XED_REG_R15; 435 xed_largest_enclosing_register_array_32[XED_REG_R15D]= XED_REG_R15D; 436 xed_largest_enclosing_register_array[XED_REG_R15W]= XED_REG_R15; 437 xed_largest_enclosing_register_array_32[XED_REG_R15W]= XED_REG_R15D; 438 xed_largest_enclosing_register_array[XED_REG_R15B]= XED_REG_R15; 439 xed_largest_enclosing_register_array_32[XED_REG_R15B]= XED_REG_R15D; 440 xed_largest_enclosing_register_array[XED_REG_RIP]= XED_REG_RIP; 441 xed_largest_enclosing_register_array_32[XED_REG_RIP]= XED_REG_RIP; 442 xed_largest_enclosing_register_array[XED_REG_EIP]= XED_REG_RIP; 443 xed_largest_enclosing_register_array_32[XED_REG_EIP]= XED_REG_EIP; 444 xed_largest_enclosing_register_array[XED_REG_IP]= XED_REG_RIP; 445 xed_largest_enclosing_register_array_32[XED_REG_IP]= XED_REG_EIP; 446 xed_largest_enclosing_register_array[XED_REG_FLAGS]= XED_REG_RFLAGS; 447 xed_largest_enclosing_register_array_32[XED_REG_FLAGS]= XED_REG_EFLAGS; 448 xed_largest_enclosing_register_array[XED_REG_EFLAGS]= XED_REG_RFLAGS; 449 xed_largest_enclosing_register_array_32[XED_REG_EFLAGS]= XED_REG_EFLAGS; 450 xed_largest_enclosing_register_array[XED_REG_RFLAGS]= XED_REG_RFLAGS; 451 xed_largest_enclosing_register_array_32[XED_REG_RFLAGS]= XED_REG_RFLAGS; 452 xed_largest_enclosing_register_array[XED_REG_CS]= XED_REG_CS; 453 xed_largest_enclosing_register_array_32[XED_REG_CS]= XED_REG_CS; 454 xed_largest_enclosing_register_array[XED_REG_DS]= XED_REG_DS; 455 xed_largest_enclosing_register_array_32[XED_REG_DS]= XED_REG_DS; 456 xed_largest_enclosing_register_array[XED_REG_ES]= XED_REG_ES; 457 xed_largest_enclosing_register_array_32[XED_REG_ES]= XED_REG_ES; 458 xed_largest_enclosing_register_array[XED_REG_SS]= XED_REG_SS; 459 xed_largest_enclosing_register_array_32[XED_REG_SS]= XED_REG_SS; 460 xed_largest_enclosing_register_array[XED_REG_FS]= XED_REG_FS; 461 xed_largest_enclosing_register_array_32[XED_REG_FS]= XED_REG_FS; 462 xed_largest_enclosing_register_array[XED_REG_GS]= XED_REG_GS; 463 xed_largest_enclosing_register_array_32[XED_REG_GS]= XED_REG_GS; 464 xed_largest_enclosing_register_array[XED_REG_MMX0]= XED_REG_MMX0; 465 xed_largest_enclosing_register_array_32[XED_REG_MMX0]= XED_REG_MMX0; 466 xed_largest_enclosing_register_array[XED_REG_MMX1]= XED_REG_MMX1; 467 xed_largest_enclosing_register_array_32[XED_REG_MMX1]= XED_REG_MMX1; 468 xed_largest_enclosing_register_array[XED_REG_MMX2]= XED_REG_MMX2; 469 xed_largest_enclosing_register_array_32[XED_REG_MMX2]= XED_REG_MMX2; 470 xed_largest_enclosing_register_array[XED_REG_MMX3]= XED_REG_MMX3; 471 xed_largest_enclosing_register_array_32[XED_REG_MMX3]= XED_REG_MMX3; 472 xed_largest_enclosing_register_array[XED_REG_MMX4]= XED_REG_MMX4; 473 xed_largest_enclosing_register_array_32[XED_REG_MMX4]= XED_REG_MMX4; 474 xed_largest_enclosing_register_array[XED_REG_MMX5]= XED_REG_MMX5; 475 xed_largest_enclosing_register_array_32[XED_REG_MMX5]= XED_REG_MMX5; 476 xed_largest_enclosing_register_array[XED_REG_MMX6]= XED_REG_MMX6; 477 xed_largest_enclosing_register_array_32[XED_REG_MMX6]= XED_REG_MMX6; 478 xed_largest_enclosing_register_array[XED_REG_MMX7]= XED_REG_MMX7; 479 xed_largest_enclosing_register_array_32[XED_REG_MMX7]= XED_REG_MMX7; 480 xed_largest_enclosing_register_array[XED_REG_ST0]= XED_REG_ST0; 481 xed_largest_enclosing_register_array_32[XED_REG_ST0]= XED_REG_ST0; 482 xed_largest_enclosing_register_array[XED_REG_ST1]= XED_REG_ST1; 483 xed_largest_enclosing_register_array_32[XED_REG_ST1]= XED_REG_ST1; 484 xed_largest_enclosing_register_array[XED_REG_ST2]= XED_REG_ST2; 485 xed_largest_enclosing_register_array_32[XED_REG_ST2]= XED_REG_ST2; 486 xed_largest_enclosing_register_array[XED_REG_ST3]= XED_REG_ST3; 487 xed_largest_enclosing_register_array_32[XED_REG_ST3]= XED_REG_ST3; 488 xed_largest_enclosing_register_array[XED_REG_ST4]= XED_REG_ST4; 489 xed_largest_enclosing_register_array_32[XED_REG_ST4]= XED_REG_ST4; 490 xed_largest_enclosing_register_array[XED_REG_ST5]= XED_REG_ST5; 491 xed_largest_enclosing_register_array_32[XED_REG_ST5]= XED_REG_ST5; 492 xed_largest_enclosing_register_array[XED_REG_ST6]= XED_REG_ST6; 493 xed_largest_enclosing_register_array_32[XED_REG_ST6]= XED_REG_ST6; 494 xed_largest_enclosing_register_array[XED_REG_ST7]= XED_REG_ST7; 495 xed_largest_enclosing_register_array_32[XED_REG_ST7]= XED_REG_ST7; 496 xed_largest_enclosing_register_array[XED_REG_CR0]= XED_REG_CR0; 497 xed_largest_enclosing_register_array_32[XED_REG_CR0]= XED_REG_CR0; 498 xed_largest_enclosing_register_array[XED_REG_CR1]= XED_REG_CR1; 499 xed_largest_enclosing_register_array_32[XED_REG_CR1]= XED_REG_CR1; 500 xed_largest_enclosing_register_array[XED_REG_CR2]= XED_REG_CR2; 501 xed_largest_enclosing_register_array_32[XED_REG_CR2]= XED_REG_CR2; 502 xed_largest_enclosing_register_array[XED_REG_CR3]= XED_REG_CR3; 503 xed_largest_enclosing_register_array_32[XED_REG_CR3]= XED_REG_CR3; 504 xed_largest_enclosing_register_array[XED_REG_CR4]= XED_REG_CR4; 505 xed_largest_enclosing_register_array_32[XED_REG_CR4]= XED_REG_CR4; 506 xed_largest_enclosing_register_array[XED_REG_CR5]= XED_REG_CR5; 507 xed_largest_enclosing_register_array_32[XED_REG_CR5]= XED_REG_CR5; 508 xed_largest_enclosing_register_array[XED_REG_CR6]= XED_REG_CR6; 509 xed_largest_enclosing_register_array_32[XED_REG_CR6]= XED_REG_CR6; 510 xed_largest_enclosing_register_array[XED_REG_CR7]= XED_REG_CR7; 511 xed_largest_enclosing_register_array_32[XED_REG_CR7]= XED_REG_CR7; 512 xed_largest_enclosing_register_array[XED_REG_CR8]= XED_REG_CR8; 513 xed_largest_enclosing_register_array_32[XED_REG_CR8]= XED_REG_CR8; 514 xed_largest_enclosing_register_array[XED_REG_CR9]= XED_REG_CR9; 515 xed_largest_enclosing_register_array_32[XED_REG_CR9]= XED_REG_CR9; 516 xed_largest_enclosing_register_array[XED_REG_CR10]= XED_REG_CR10; 517 xed_largest_enclosing_register_array_32[XED_REG_CR10]= XED_REG_CR10; 518 xed_largest_enclosing_register_array[XED_REG_CR11]= XED_REG_CR11; 519 xed_largest_enclosing_register_array_32[XED_REG_CR11]= XED_REG_CR11; 520 xed_largest_enclosing_register_array[XED_REG_CR12]= XED_REG_CR12; 521 xed_largest_enclosing_register_array_32[XED_REG_CR12]= XED_REG_CR12; 522 xed_largest_enclosing_register_array[XED_REG_CR13]= XED_REG_CR13; 523 xed_largest_enclosing_register_array_32[XED_REG_CR13]= XED_REG_CR13; 524 xed_largest_enclosing_register_array[XED_REG_CR14]= XED_REG_CR14; 525 xed_largest_enclosing_register_array_32[XED_REG_CR14]= XED_REG_CR14; 526 xed_largest_enclosing_register_array[XED_REG_CR15]= XED_REG_CR15; 527 xed_largest_enclosing_register_array_32[XED_REG_CR15]= XED_REG_CR15; 528 xed_largest_enclosing_register_array[XED_REG_DR0]= XED_REG_DR0; 529 xed_largest_enclosing_register_array_32[XED_REG_DR0]= XED_REG_DR0; 530 xed_largest_enclosing_register_array[XED_REG_DR1]= XED_REG_DR1; 531 xed_largest_enclosing_register_array_32[XED_REG_DR1]= XED_REG_DR1; 532 xed_largest_enclosing_register_array[XED_REG_DR2]= XED_REG_DR2; 533 xed_largest_enclosing_register_array_32[XED_REG_DR2]= XED_REG_DR2; 534 xed_largest_enclosing_register_array[XED_REG_DR3]= XED_REG_DR3; 535 xed_largest_enclosing_register_array_32[XED_REG_DR3]= XED_REG_DR3; 536 xed_largest_enclosing_register_array[XED_REG_DR4]= XED_REG_DR4; 537 xed_largest_enclosing_register_array_32[XED_REG_DR4]= XED_REG_DR4; 538 xed_largest_enclosing_register_array[XED_REG_DR5]= XED_REG_DR5; 539 xed_largest_enclosing_register_array_32[XED_REG_DR5]= XED_REG_DR5; 540 xed_largest_enclosing_register_array[XED_REG_DR6]= XED_REG_DR6; 541 xed_largest_enclosing_register_array_32[XED_REG_DR6]= XED_REG_DR6; 542 xed_largest_enclosing_register_array[XED_REG_DR7]= XED_REG_DR7; 543 xed_largest_enclosing_register_array_32[XED_REG_DR7]= XED_REG_DR7; 544 xed_largest_enclosing_register_array[XED_REG_STACKPUSH]= XED_REG_STACKPUSH; 545 xed_largest_enclosing_register_array_32[XED_REG_STACKPUSH]= XED_REG_STACKPUSH; 546 xed_largest_enclosing_register_array[XED_REG_STACKPOP]= XED_REG_STACKPOP; 547 xed_largest_enclosing_register_array_32[XED_REG_STACKPOP]= XED_REG_STACKPOP; 548 xed_largest_enclosing_register_array[XED_REG_GDTR]= XED_REG_GDTR; 549 xed_largest_enclosing_register_array_32[XED_REG_GDTR]= XED_REG_GDTR; 550 xed_largest_enclosing_register_array[XED_REG_LDTR]= XED_REG_LDTR; 551 xed_largest_enclosing_register_array_32[XED_REG_LDTR]= XED_REG_LDTR; 552 xed_largest_enclosing_register_array[XED_REG_IDTR]= XED_REG_IDTR; 553 xed_largest_enclosing_register_array_32[XED_REG_IDTR]= XED_REG_IDTR; 554 xed_largest_enclosing_register_array[XED_REG_TR]= XED_REG_TR; 555 xed_largest_enclosing_register_array_32[XED_REG_TR]= XED_REG_TR; 556 xed_largest_enclosing_register_array[XED_REG_TSC]= XED_REG_TSC; 557 xed_largest_enclosing_register_array_32[XED_REG_TSC]= XED_REG_TSC; 558 xed_largest_enclosing_register_array[XED_REG_TSCAUX]= XED_REG_TSCAUX; 559 xed_largest_enclosing_register_array_32[XED_REG_TSCAUX]= XED_REG_TSCAUX; 560 xed_largest_enclosing_register_array[XED_REG_MSRS]= XED_REG_MSRS; 561 xed_largest_enclosing_register_array_32[XED_REG_MSRS]= XED_REG_MSRS; 562 xed_largest_enclosing_register_array[XED_REG_X87CONTROL]= XED_REG_X87CONTROL; 563 xed_largest_enclosing_register_array_32[XED_REG_X87CONTROL]= XED_REG_X87CONTROL; 564 xed_largest_enclosing_register_array[XED_REG_X87STATUS]= XED_REG_X87STATUS; 565 xed_largest_enclosing_register_array_32[XED_REG_X87STATUS]= XED_REG_X87STATUS; 566 xed_largest_enclosing_register_array[XED_REG_X87TAG]= XED_REG_X87TAG; 567 xed_largest_enclosing_register_array_32[XED_REG_X87TAG]= XED_REG_X87TAG; 568 xed_largest_enclosing_register_array[XED_REG_X87PUSH]= XED_REG_X87PUSH; 569 xed_largest_enclosing_register_array_32[XED_REG_X87PUSH]= XED_REG_X87PUSH; 570 xed_largest_enclosing_register_array[XED_REG_X87POP]= XED_REG_X87POP; 571 xed_largest_enclosing_register_array_32[XED_REG_X87POP]= XED_REG_X87POP; 572 xed_largest_enclosing_register_array[XED_REG_X87POP2]= XED_REG_X87POP2; 573 xed_largest_enclosing_register_array_32[XED_REG_X87POP2]= XED_REG_X87POP2; 574 xed_largest_enclosing_register_array[XED_REG_X87OPCODE]= XED_REG_X87OPCODE; 575 xed_largest_enclosing_register_array_32[XED_REG_X87OPCODE]= XED_REG_X87OPCODE; 576 xed_largest_enclosing_register_array[XED_REG_X87LASTCS]= XED_REG_X87LASTCS; 577 xed_largest_enclosing_register_array_32[XED_REG_X87LASTCS]= XED_REG_X87LASTCS; 578 xed_largest_enclosing_register_array[XED_REG_X87LASTIP]= XED_REG_X87LASTIP; 579 xed_largest_enclosing_register_array_32[XED_REG_X87LASTIP]= XED_REG_X87LASTIP; 580 xed_largest_enclosing_register_array[XED_REG_X87LASTDS]= XED_REG_X87LASTDS; 581 xed_largest_enclosing_register_array_32[XED_REG_X87LASTDS]= XED_REG_X87LASTDS; 582 xed_largest_enclosing_register_array[XED_REG_X87LASTDP]= XED_REG_X87LASTDP; 583 xed_largest_enclosing_register_array_32[XED_REG_X87LASTDP]= XED_REG_X87LASTDP; 584 xed_largest_enclosing_register_array[XED_REG_XCR0]= XED_REG_XCR0; 585 xed_largest_enclosing_register_array_32[XED_REG_XCR0]= XED_REG_XCR0; 586 xed_largest_enclosing_register_array[XED_REG_MXCSR]= XED_REG_MXCSR; 587 xed_largest_enclosing_register_array_32[XED_REG_MXCSR]= XED_REG_MXCSR; 588 xed_largest_enclosing_register_array[XED_REG_TMP0]= XED_REG_TMP0; 589 xed_largest_enclosing_register_array_32[XED_REG_TMP0]= XED_REG_TMP0; 590 xed_largest_enclosing_register_array[XED_REG_TMP1]= XED_REG_TMP1; 591 xed_largest_enclosing_register_array_32[XED_REG_TMP1]= XED_REG_TMP1; 592 xed_largest_enclosing_register_array[XED_REG_TMP2]= XED_REG_TMP2; 593 xed_largest_enclosing_register_array_32[XED_REG_TMP2]= XED_REG_TMP2; 594 xed_largest_enclosing_register_array[XED_REG_TMP3]= XED_REG_TMP3; 595 xed_largest_enclosing_register_array_32[XED_REG_TMP3]= XED_REG_TMP3; 596 xed_largest_enclosing_register_array[XED_REG_TMP4]= XED_REG_TMP4; 597 xed_largest_enclosing_register_array_32[XED_REG_TMP4]= XED_REG_TMP4; 598 xed_largest_enclosing_register_array[XED_REG_TMP5]= XED_REG_TMP5; 599 xed_largest_enclosing_register_array_32[XED_REG_TMP5]= XED_REG_TMP5; 600 xed_largest_enclosing_register_array[XED_REG_TMP6]= XED_REG_TMP6; 601 xed_largest_enclosing_register_array_32[XED_REG_TMP6]= XED_REG_TMP6; 602 xed_largest_enclosing_register_array[XED_REG_TMP7]= XED_REG_TMP7; 603 xed_largest_enclosing_register_array_32[XED_REG_TMP7]= XED_REG_TMP7; 604 xed_largest_enclosing_register_array[XED_REG_TMP8]= XED_REG_TMP8; 605 xed_largest_enclosing_register_array_32[XED_REG_TMP8]= XED_REG_TMP8; 606 xed_largest_enclosing_register_array[XED_REG_TMP9]= XED_REG_TMP9; 607 xed_largest_enclosing_register_array_32[XED_REG_TMP9]= XED_REG_TMP9; 608 xed_largest_enclosing_register_array[XED_REG_TMP10]= XED_REG_TMP10; 609 xed_largest_enclosing_register_array_32[XED_REG_TMP10]= XED_REG_TMP10; 610 xed_largest_enclosing_register_array[XED_REG_TMP11]= XED_REG_TMP11; 611 xed_largest_enclosing_register_array_32[XED_REG_TMP11]= XED_REG_TMP11; 612 xed_largest_enclosing_register_array[XED_REG_TMP12]= XED_REG_TMP12; 613 xed_largest_enclosing_register_array_32[XED_REG_TMP12]= XED_REG_TMP12; 614 xed_largest_enclosing_register_array[XED_REG_TMP13]= XED_REG_TMP13; 615 xed_largest_enclosing_register_array_32[XED_REG_TMP13]= XED_REG_TMP13; 616 xed_largest_enclosing_register_array[XED_REG_TMP14]= XED_REG_TMP14; 617 xed_largest_enclosing_register_array_32[XED_REG_TMP14]= XED_REG_TMP14; 618 xed_largest_enclosing_register_array[XED_REG_TMP15]= XED_REG_TMP15; 619 xed_largest_enclosing_register_array_32[XED_REG_TMP15]= XED_REG_TMP15; 620 xed_largest_enclosing_register_array[XED_REG_K0]= XED_REG_K0; 621 xed_largest_enclosing_register_array_32[XED_REG_K0]= XED_REG_K0; 622 xed_largest_enclosing_register_array[XED_REG_K1]= XED_REG_K1; 623 xed_largest_enclosing_register_array_32[XED_REG_K1]= XED_REG_K1; 624 xed_largest_enclosing_register_array[XED_REG_K2]= XED_REG_K2; 625 xed_largest_enclosing_register_array_32[XED_REG_K2]= XED_REG_K2; 626 xed_largest_enclosing_register_array[XED_REG_K3]= XED_REG_K3; 627 xed_largest_enclosing_register_array_32[XED_REG_K3]= XED_REG_K3; 628 xed_largest_enclosing_register_array[XED_REG_K4]= XED_REG_K4; 629 xed_largest_enclosing_register_array_32[XED_REG_K4]= XED_REG_K4; 630 xed_largest_enclosing_register_array[XED_REG_K5]= XED_REG_K5; 631 xed_largest_enclosing_register_array_32[XED_REG_K5]= XED_REG_K5; 632 xed_largest_enclosing_register_array[XED_REG_K6]= XED_REG_K6; 633 xed_largest_enclosing_register_array_32[XED_REG_K6]= XED_REG_K6; 634 xed_largest_enclosing_register_array[XED_REG_K7]= XED_REG_K7; 635 xed_largest_enclosing_register_array_32[XED_REG_K7]= XED_REG_K7; 636 xed_largest_enclosing_register_array[XED_REG_BND0]= XED_REG_BND0; 637 xed_largest_enclosing_register_array_32[XED_REG_BND0]= XED_REG_BND0; 638 xed_largest_enclosing_register_array[XED_REG_BND1]= XED_REG_BND1; 639 xed_largest_enclosing_register_array_32[XED_REG_BND1]= XED_REG_BND1; 640 xed_largest_enclosing_register_array[XED_REG_BND2]= XED_REG_BND2; 641 xed_largest_enclosing_register_array_32[XED_REG_BND2]= XED_REG_BND2; 642 xed_largest_enclosing_register_array[XED_REG_BND3]= XED_REG_BND3; 643 xed_largest_enclosing_register_array_32[XED_REG_BND3]= XED_REG_BND3; 644 xed_largest_enclosing_register_array[XED_REG_BNDCFGU]= XED_REG_BNDCFGU; 645 xed_largest_enclosing_register_array_32[XED_REG_BNDCFGU]= XED_REG_BNDCFGU; 646 xed_largest_enclosing_register_array[XED_REG_BNDSTATUS]= XED_REG_BNDSTATUS; 647 xed_largest_enclosing_register_array_32[XED_REG_BNDSTATUS]= XED_REG_BNDSTATUS; 648 xed_largest_enclosing_register_array[XED_REG_SSP]= XED_REG_SSP; 649 xed_largest_enclosing_register_array_32[XED_REG_SSP]= XED_REG_SSP; 650 xed_largest_enclosing_register_array[XED_REG_IA32_U_CET]= XED_REG_IA32_U_CET; 651 xed_largest_enclosing_register_array_32[XED_REG_IA32_U_CET]= XED_REG_IA32_U_CET; 652 xed_largest_enclosing_register_array[XED_REG_FSBASE]= XED_REG_FSBASE; 653 xed_largest_enclosing_register_array_32[XED_REG_FSBASE]= XED_REG_FSBASE; 654 xed_largest_enclosing_register_array[XED_REG_GSBASE]= XED_REG_GSBASE; 655 xed_largest_enclosing_register_array_32[XED_REG_GSBASE]= XED_REG_GSBASE; 656 xed_largest_enclosing_register_array[XED_REG_XMM0]= XED_REG_ZMM0; 657 xed_largest_enclosing_register_array_32[XED_REG_XMM0]= XED_REG_ZMM0; 658 xed_largest_enclosing_register_array[XED_REG_XMM1]= XED_REG_ZMM1; 659 xed_largest_enclosing_register_array_32[XED_REG_XMM1]= XED_REG_ZMM1; 660 xed_largest_enclosing_register_array[XED_REG_XMM2]= XED_REG_ZMM2; 661 xed_largest_enclosing_register_array_32[XED_REG_XMM2]= XED_REG_ZMM2; 662 xed_largest_enclosing_register_array[XED_REG_XMM3]= XED_REG_ZMM3; 663 xed_largest_enclosing_register_array_32[XED_REG_XMM3]= XED_REG_ZMM3; 664 xed_largest_enclosing_register_array[XED_REG_XMM4]= XED_REG_ZMM4; 665 xed_largest_enclosing_register_array_32[XED_REG_XMM4]= XED_REG_ZMM4; 666 xed_largest_enclosing_register_array[XED_REG_XMM5]= XED_REG_ZMM5; 667 xed_largest_enclosing_register_array_32[XED_REG_XMM5]= XED_REG_ZMM5; 668 xed_largest_enclosing_register_array[XED_REG_XMM6]= XED_REG_ZMM6; 669 xed_largest_enclosing_register_array_32[XED_REG_XMM6]= XED_REG_ZMM6; 670 xed_largest_enclosing_register_array[XED_REG_XMM7]= XED_REG_ZMM7; 671 xed_largest_enclosing_register_array_32[XED_REG_XMM7]= XED_REG_ZMM7; 672 xed_largest_enclosing_register_array[XED_REG_XMM8]= XED_REG_ZMM8; 673 xed_largest_enclosing_register_array_32[XED_REG_XMM8]= XED_REG_ZMM8; 674 xed_largest_enclosing_register_array[XED_REG_XMM9]= XED_REG_ZMM9; 675 xed_largest_enclosing_register_array_32[XED_REG_XMM9]= XED_REG_ZMM9; 676 xed_largest_enclosing_register_array[XED_REG_XMM10]= XED_REG_ZMM10; 677 xed_largest_enclosing_register_array_32[XED_REG_XMM10]= XED_REG_ZMM10; 678 xed_largest_enclosing_register_array[XED_REG_XMM11]= XED_REG_ZMM11; 679 xed_largest_enclosing_register_array_32[XED_REG_XMM11]= XED_REG_ZMM11; 680 xed_largest_enclosing_register_array[XED_REG_XMM12]= XED_REG_ZMM12; 681 xed_largest_enclosing_register_array_32[XED_REG_XMM12]= XED_REG_ZMM12; 682 xed_largest_enclosing_register_array[XED_REG_XMM13]= XED_REG_ZMM13; 683 xed_largest_enclosing_register_array_32[XED_REG_XMM13]= XED_REG_ZMM13; 684 xed_largest_enclosing_register_array[XED_REG_XMM14]= XED_REG_ZMM14; 685 xed_largest_enclosing_register_array_32[XED_REG_XMM14]= XED_REG_ZMM14; 686 xed_largest_enclosing_register_array[XED_REG_XMM15]= XED_REG_ZMM15; 687 xed_largest_enclosing_register_array_32[XED_REG_XMM15]= XED_REG_ZMM15; 688 xed_largest_enclosing_register_array[XED_REG_YMM0]= XED_REG_ZMM0; 689 xed_largest_enclosing_register_array_32[XED_REG_YMM0]= XED_REG_ZMM0; 690 xed_largest_enclosing_register_array[XED_REG_YMM1]= XED_REG_ZMM1; 691 xed_largest_enclosing_register_array_32[XED_REG_YMM1]= XED_REG_ZMM1; 692 xed_largest_enclosing_register_array[XED_REG_YMM2]= XED_REG_ZMM2; 693 xed_largest_enclosing_register_array_32[XED_REG_YMM2]= XED_REG_ZMM2; 694 xed_largest_enclosing_register_array[XED_REG_YMM3]= XED_REG_ZMM3; 695 xed_largest_enclosing_register_array_32[XED_REG_YMM3]= XED_REG_ZMM3; 696 xed_largest_enclosing_register_array[XED_REG_YMM4]= XED_REG_ZMM4; 697 xed_largest_enclosing_register_array_32[XED_REG_YMM4]= XED_REG_ZMM4; 698 xed_largest_enclosing_register_array[XED_REG_YMM5]= XED_REG_ZMM5; 699 xed_largest_enclosing_register_array_32[XED_REG_YMM5]= XED_REG_ZMM5; 700 xed_largest_enclosing_register_array[XED_REG_YMM6]= XED_REG_ZMM6; 701 xed_largest_enclosing_register_array_32[XED_REG_YMM6]= XED_REG_ZMM6; 702 xed_largest_enclosing_register_array[XED_REG_YMM7]= XED_REG_ZMM7; 703 xed_largest_enclosing_register_array_32[XED_REG_YMM7]= XED_REG_ZMM7; 704 xed_largest_enclosing_register_array[XED_REG_YMM8]= XED_REG_ZMM8; 705 xed_largest_enclosing_register_array_32[XED_REG_YMM8]= XED_REG_ZMM8; 706 xed_largest_enclosing_register_array[XED_REG_YMM9]= XED_REG_ZMM9; 707 xed_largest_enclosing_register_array_32[XED_REG_YMM9]= XED_REG_ZMM9; 708 xed_largest_enclosing_register_array[XED_REG_YMM10]= XED_REG_ZMM10; 709 xed_largest_enclosing_register_array_32[XED_REG_YMM10]= XED_REG_ZMM10; 710 xed_largest_enclosing_register_array[XED_REG_YMM11]= XED_REG_ZMM11; 711 xed_largest_enclosing_register_array_32[XED_REG_YMM11]= XED_REG_ZMM11; 712 xed_largest_enclosing_register_array[XED_REG_YMM12]= XED_REG_ZMM12; 713 xed_largest_enclosing_register_array_32[XED_REG_YMM12]= XED_REG_ZMM12; 714 xed_largest_enclosing_register_array[XED_REG_YMM13]= XED_REG_ZMM13; 715 xed_largest_enclosing_register_array_32[XED_REG_YMM13]= XED_REG_ZMM13; 716 xed_largest_enclosing_register_array[XED_REG_YMM14]= XED_REG_ZMM14; 717 xed_largest_enclosing_register_array_32[XED_REG_YMM14]= XED_REG_ZMM14; 718 xed_largest_enclosing_register_array[XED_REG_YMM15]= XED_REG_ZMM15; 719 xed_largest_enclosing_register_array_32[XED_REG_YMM15]= XED_REG_ZMM15; 720 xed_largest_enclosing_register_array[XED_REG_ZMM0]= XED_REG_ZMM0; 721 xed_largest_enclosing_register_array_32[XED_REG_ZMM0]= XED_REG_ZMM0; 722 xed_largest_enclosing_register_array[XED_REG_ZMM1]= XED_REG_ZMM1; 723 xed_largest_enclosing_register_array_32[XED_REG_ZMM1]= XED_REG_ZMM1; 724 xed_largest_enclosing_register_array[XED_REG_ZMM2]= XED_REG_ZMM2; 725 xed_largest_enclosing_register_array_32[XED_REG_ZMM2]= XED_REG_ZMM2; 726 xed_largest_enclosing_register_array[XED_REG_ZMM3]= XED_REG_ZMM3; 727 xed_largest_enclosing_register_array_32[XED_REG_ZMM3]= XED_REG_ZMM3; 728 xed_largest_enclosing_register_array[XED_REG_ZMM4]= XED_REG_ZMM4; 729 xed_largest_enclosing_register_array_32[XED_REG_ZMM4]= XED_REG_ZMM4; 730 xed_largest_enclosing_register_array[XED_REG_ZMM5]= XED_REG_ZMM5; 731 xed_largest_enclosing_register_array_32[XED_REG_ZMM5]= XED_REG_ZMM5; 732 xed_largest_enclosing_register_array[XED_REG_ZMM6]= XED_REG_ZMM6; 733 xed_largest_enclosing_register_array_32[XED_REG_ZMM6]= XED_REG_ZMM6; 734 xed_largest_enclosing_register_array[XED_REG_ZMM7]= XED_REG_ZMM7; 735 xed_largest_enclosing_register_array_32[XED_REG_ZMM7]= XED_REG_ZMM7; 736 xed_largest_enclosing_register_array[XED_REG_ZMM8]= XED_REG_ZMM8; 737 xed_largest_enclosing_register_array_32[XED_REG_ZMM8]= XED_REG_ZMM8; 738 xed_largest_enclosing_register_array[XED_REG_ZMM9]= XED_REG_ZMM9; 739 xed_largest_enclosing_register_array_32[XED_REG_ZMM9]= XED_REG_ZMM9; 740 xed_largest_enclosing_register_array[XED_REG_ZMM10]= XED_REG_ZMM10; 741 xed_largest_enclosing_register_array_32[XED_REG_ZMM10]= XED_REG_ZMM10; 742 xed_largest_enclosing_register_array[XED_REG_ZMM11]= XED_REG_ZMM11; 743 xed_largest_enclosing_register_array_32[XED_REG_ZMM11]= XED_REG_ZMM11; 744 xed_largest_enclosing_register_array[XED_REG_ZMM12]= XED_REG_ZMM12; 745 xed_largest_enclosing_register_array_32[XED_REG_ZMM12]= XED_REG_ZMM12; 746 xed_largest_enclosing_register_array[XED_REG_ZMM13]= XED_REG_ZMM13; 747 xed_largest_enclosing_register_array_32[XED_REG_ZMM13]= XED_REG_ZMM13; 748 xed_largest_enclosing_register_array[XED_REG_ZMM14]= XED_REG_ZMM14; 749 xed_largest_enclosing_register_array_32[XED_REG_ZMM14]= XED_REG_ZMM14; 750 xed_largest_enclosing_register_array[XED_REG_ZMM15]= XED_REG_ZMM15; 751 xed_largest_enclosing_register_array_32[XED_REG_ZMM15]= XED_REG_ZMM15; 752 xed_largest_enclosing_register_array[XED_REG_ZMM16]= XED_REG_ZMM16; 753 xed_largest_enclosing_register_array_32[XED_REG_ZMM16]= XED_REG_ZMM16; 754 xed_largest_enclosing_register_array[XED_REG_ZMM17]= XED_REG_ZMM17; 755 xed_largest_enclosing_register_array_32[XED_REG_ZMM17]= XED_REG_ZMM17; 756 xed_largest_enclosing_register_array[XED_REG_ZMM18]= XED_REG_ZMM18; 757 xed_largest_enclosing_register_array_32[XED_REG_ZMM18]= XED_REG_ZMM18; 758 xed_largest_enclosing_register_array[XED_REG_ZMM19]= XED_REG_ZMM19; 759 xed_largest_enclosing_register_array_32[XED_REG_ZMM19]= XED_REG_ZMM19; 760 xed_largest_enclosing_register_array[XED_REG_ZMM20]= XED_REG_ZMM20; 761 xed_largest_enclosing_register_array_32[XED_REG_ZMM20]= XED_REG_ZMM20; 762 xed_largest_enclosing_register_array[XED_REG_ZMM21]= XED_REG_ZMM21; 763 xed_largest_enclosing_register_array_32[XED_REG_ZMM21]= XED_REG_ZMM21; 764 xed_largest_enclosing_register_array[XED_REG_ZMM22]= XED_REG_ZMM22; 765 xed_largest_enclosing_register_array_32[XED_REG_ZMM22]= XED_REG_ZMM22; 766 xed_largest_enclosing_register_array[XED_REG_ZMM23]= XED_REG_ZMM23; 767 xed_largest_enclosing_register_array_32[XED_REG_ZMM23]= XED_REG_ZMM23; 768 xed_largest_enclosing_register_array[XED_REG_ZMM24]= XED_REG_ZMM24; 769 xed_largest_enclosing_register_array_32[XED_REG_ZMM24]= XED_REG_ZMM24; 770 xed_largest_enclosing_register_array[XED_REG_ZMM25]= XED_REG_ZMM25; 771 xed_largest_enclosing_register_array_32[XED_REG_ZMM25]= XED_REG_ZMM25; 772 xed_largest_enclosing_register_array[XED_REG_ZMM26]= XED_REG_ZMM26; 773 xed_largest_enclosing_register_array_32[XED_REG_ZMM26]= XED_REG_ZMM26; 774 xed_largest_enclosing_register_array[XED_REG_ZMM27]= XED_REG_ZMM27; 775 xed_largest_enclosing_register_array_32[XED_REG_ZMM27]= XED_REG_ZMM27; 776 xed_largest_enclosing_register_array[XED_REG_ZMM28]= XED_REG_ZMM28; 777 xed_largest_enclosing_register_array_32[XED_REG_ZMM28]= XED_REG_ZMM28; 778 xed_largest_enclosing_register_array[XED_REG_ZMM29]= XED_REG_ZMM29; 779 xed_largest_enclosing_register_array_32[XED_REG_ZMM29]= XED_REG_ZMM29; 780 xed_largest_enclosing_register_array[XED_REG_ZMM30]= XED_REG_ZMM30; 781 xed_largest_enclosing_register_array_32[XED_REG_ZMM30]= XED_REG_ZMM30; 782 xed_largest_enclosing_register_array[XED_REG_ZMM31]= XED_REG_ZMM31; 783 xed_largest_enclosing_register_array_32[XED_REG_ZMM31]= XED_REG_ZMM31; 784 xed_largest_enclosing_register_array[XED_REG_XMM16]= XED_REG_ZMM16; 785 xed_largest_enclosing_register_array_32[XED_REG_XMM16]= XED_REG_ZMM16; 786 xed_largest_enclosing_register_array[XED_REG_XMM17]= XED_REG_ZMM17; 787 xed_largest_enclosing_register_array_32[XED_REG_XMM17]= XED_REG_ZMM17; 788 xed_largest_enclosing_register_array[XED_REG_XMM18]= XED_REG_ZMM18; 789 xed_largest_enclosing_register_array_32[XED_REG_XMM18]= XED_REG_ZMM18; 790 xed_largest_enclosing_register_array[XED_REG_XMM19]= XED_REG_ZMM19; 791 xed_largest_enclosing_register_array_32[XED_REG_XMM19]= XED_REG_ZMM19; 792 xed_largest_enclosing_register_array[XED_REG_XMM20]= XED_REG_ZMM20; 793 xed_largest_enclosing_register_array_32[XED_REG_XMM20]= XED_REG_ZMM20; 794 xed_largest_enclosing_register_array[XED_REG_XMM21]= XED_REG_ZMM21; 795 xed_largest_enclosing_register_array_32[XED_REG_XMM21]= XED_REG_ZMM21; 796 xed_largest_enclosing_register_array[XED_REG_XMM22]= XED_REG_ZMM22; 797 xed_largest_enclosing_register_array_32[XED_REG_XMM22]= XED_REG_ZMM22; 798 xed_largest_enclosing_register_array[XED_REG_XMM23]= XED_REG_ZMM23; 799 xed_largest_enclosing_register_array_32[XED_REG_XMM23]= XED_REG_ZMM23; 800 xed_largest_enclosing_register_array[XED_REG_XMM24]= XED_REG_ZMM24; 801 xed_largest_enclosing_register_array_32[XED_REG_XMM24]= XED_REG_ZMM24; 802 xed_largest_enclosing_register_array[XED_REG_XMM25]= XED_REG_ZMM25; 803 xed_largest_enclosing_register_array_32[XED_REG_XMM25]= XED_REG_ZMM25; 804 xed_largest_enclosing_register_array[XED_REG_XMM26]= XED_REG_ZMM26; 805 xed_largest_enclosing_register_array_32[XED_REG_XMM26]= XED_REG_ZMM26; 806 xed_largest_enclosing_register_array[XED_REG_XMM27]= XED_REG_ZMM27; 807 xed_largest_enclosing_register_array_32[XED_REG_XMM27]= XED_REG_ZMM27; 808 xed_largest_enclosing_register_array[XED_REG_XMM28]= XED_REG_ZMM28; 809 xed_largest_enclosing_register_array_32[XED_REG_XMM28]= XED_REG_ZMM28; 810 xed_largest_enclosing_register_array[XED_REG_XMM29]= XED_REG_ZMM29; 811 xed_largest_enclosing_register_array_32[XED_REG_XMM29]= XED_REG_ZMM29; 812 xed_largest_enclosing_register_array[XED_REG_XMM30]= XED_REG_ZMM30; 813 xed_largest_enclosing_register_array_32[XED_REG_XMM30]= XED_REG_ZMM30; 814 xed_largest_enclosing_register_array[XED_REG_XMM31]= XED_REG_ZMM31; 815 xed_largest_enclosing_register_array_32[XED_REG_XMM31]= XED_REG_ZMM31; 816 xed_largest_enclosing_register_array[XED_REG_YMM16]= XED_REG_ZMM16; 817 xed_largest_enclosing_register_array_32[XED_REG_YMM16]= XED_REG_ZMM16; 818 xed_largest_enclosing_register_array[XED_REG_YMM17]= XED_REG_ZMM17; 819 xed_largest_enclosing_register_array_32[XED_REG_YMM17]= XED_REG_ZMM17; 820 xed_largest_enclosing_register_array[XED_REG_YMM18]= XED_REG_ZMM18; 821 xed_largest_enclosing_register_array_32[XED_REG_YMM18]= XED_REG_ZMM18; 822 xed_largest_enclosing_register_array[XED_REG_YMM19]= XED_REG_ZMM19; 823 xed_largest_enclosing_register_array_32[XED_REG_YMM19]= XED_REG_ZMM19; 824 xed_largest_enclosing_register_array[XED_REG_YMM20]= XED_REG_ZMM20; 825 xed_largest_enclosing_register_array_32[XED_REG_YMM20]= XED_REG_ZMM20; 826 xed_largest_enclosing_register_array[XED_REG_YMM21]= XED_REG_ZMM21; 827 xed_largest_enclosing_register_array_32[XED_REG_YMM21]= XED_REG_ZMM21; 828 xed_largest_enclosing_register_array[XED_REG_YMM22]= XED_REG_ZMM22; 829 xed_largest_enclosing_register_array_32[XED_REG_YMM22]= XED_REG_ZMM22; 830 xed_largest_enclosing_register_array[XED_REG_YMM23]= XED_REG_ZMM23; 831 xed_largest_enclosing_register_array_32[XED_REG_YMM23]= XED_REG_ZMM23; 832 xed_largest_enclosing_register_array[XED_REG_YMM24]= XED_REG_ZMM24; 833 xed_largest_enclosing_register_array_32[XED_REG_YMM24]= XED_REG_ZMM24; 834 xed_largest_enclosing_register_array[XED_REG_YMM25]= XED_REG_ZMM25; 835 xed_largest_enclosing_register_array_32[XED_REG_YMM25]= XED_REG_ZMM25; 836 xed_largest_enclosing_register_array[XED_REG_YMM26]= XED_REG_ZMM26; 837 xed_largest_enclosing_register_array_32[XED_REG_YMM26]= XED_REG_ZMM26; 838 xed_largest_enclosing_register_array[XED_REG_YMM27]= XED_REG_ZMM27; 839 xed_largest_enclosing_register_array_32[XED_REG_YMM27]= XED_REG_ZMM27; 840 xed_largest_enclosing_register_array[XED_REG_YMM28]= XED_REG_ZMM28; 841 xed_largest_enclosing_register_array_32[XED_REG_YMM28]= XED_REG_ZMM28; 842 xed_largest_enclosing_register_array[XED_REG_YMM29]= XED_REG_ZMM29; 843 xed_largest_enclosing_register_array_32[XED_REG_YMM29]= XED_REG_ZMM29; 844 xed_largest_enclosing_register_array[XED_REG_YMM30]= XED_REG_ZMM30; 845 xed_largest_enclosing_register_array_32[XED_REG_YMM30]= XED_REG_ZMM30; 846 xed_largest_enclosing_register_array[XED_REG_YMM31]= XED_REG_ZMM31; 847 xed_largest_enclosing_register_array_32[XED_REG_YMM31]= XED_REG_ZMM31; 848 xed_gpr_reg_class_array[XED_REG_RAX]= XED_REG_CLASS_GPR64; 849 xed_gpr_reg_class_array[XED_REG_EAX]= XED_REG_CLASS_GPR32; 850 xed_gpr_reg_class_array[XED_REG_AX]= XED_REG_CLASS_GPR16; 851 xed_gpr_reg_class_array[XED_REG_AH]= XED_REG_CLASS_GPR8; 852 xed_gpr_reg_class_array[XED_REG_AL]= XED_REG_CLASS_GPR8; 853 xed_gpr_reg_class_array[XED_REG_RCX]= XED_REG_CLASS_GPR64; 854 xed_gpr_reg_class_array[XED_REG_ECX]= XED_REG_CLASS_GPR32; 855 xed_gpr_reg_class_array[XED_REG_CX]= XED_REG_CLASS_GPR16; 856 xed_gpr_reg_class_array[XED_REG_CH]= XED_REG_CLASS_GPR8; 857 xed_gpr_reg_class_array[XED_REG_CL]= XED_REG_CLASS_GPR8; 858 xed_gpr_reg_class_array[XED_REG_RDX]= XED_REG_CLASS_GPR64; 859 xed_gpr_reg_class_array[XED_REG_EDX]= XED_REG_CLASS_GPR32; 860 xed_gpr_reg_class_array[XED_REG_DX]= XED_REG_CLASS_GPR16; 861 xed_gpr_reg_class_array[XED_REG_DH]= XED_REG_CLASS_GPR8; 862 xed_gpr_reg_class_array[XED_REG_DL]= XED_REG_CLASS_GPR8; 863 xed_gpr_reg_class_array[XED_REG_RBX]= XED_REG_CLASS_GPR64; 864 xed_gpr_reg_class_array[XED_REG_EBX]= XED_REG_CLASS_GPR32; 865 xed_gpr_reg_class_array[XED_REG_BX]= XED_REG_CLASS_GPR16; 866 xed_gpr_reg_class_array[XED_REG_BH]= XED_REG_CLASS_GPR8; 867 xed_gpr_reg_class_array[XED_REG_BL]= XED_REG_CLASS_GPR8; 868 xed_gpr_reg_class_array[XED_REG_RSP]= XED_REG_CLASS_GPR64; 869 xed_gpr_reg_class_array[XED_REG_ESP]= XED_REG_CLASS_GPR32; 870 xed_gpr_reg_class_array[XED_REG_SP]= XED_REG_CLASS_GPR16; 871 xed_gpr_reg_class_array[XED_REG_SPL]= XED_REG_CLASS_GPR8; 872 xed_gpr_reg_class_array[XED_REG_RBP]= XED_REG_CLASS_GPR64; 873 xed_gpr_reg_class_array[XED_REG_EBP]= XED_REG_CLASS_GPR32; 874 xed_gpr_reg_class_array[XED_REG_BP]= XED_REG_CLASS_GPR16; 875 xed_gpr_reg_class_array[XED_REG_BPL]= XED_REG_CLASS_GPR8; 876 xed_gpr_reg_class_array[XED_REG_RSI]= XED_REG_CLASS_GPR64; 877 xed_gpr_reg_class_array[XED_REG_ESI]= XED_REG_CLASS_GPR32; 878 xed_gpr_reg_class_array[XED_REG_SI]= XED_REG_CLASS_GPR16; 879 xed_gpr_reg_class_array[XED_REG_SIL]= XED_REG_CLASS_GPR8; 880 xed_gpr_reg_class_array[XED_REG_RDI]= XED_REG_CLASS_GPR64; 881 xed_gpr_reg_class_array[XED_REG_EDI]= XED_REG_CLASS_GPR32; 882 xed_gpr_reg_class_array[XED_REG_DI]= XED_REG_CLASS_GPR16; 883 xed_gpr_reg_class_array[XED_REG_DIL]= XED_REG_CLASS_GPR8; 884 xed_gpr_reg_class_array[XED_REG_R8]= XED_REG_CLASS_GPR64; 885 xed_gpr_reg_class_array[XED_REG_R8D]= XED_REG_CLASS_GPR32; 886 xed_gpr_reg_class_array[XED_REG_R8W]= XED_REG_CLASS_GPR16; 887 xed_gpr_reg_class_array[XED_REG_R8B]= XED_REG_CLASS_GPR8; 888 xed_gpr_reg_class_array[XED_REG_R9]= XED_REG_CLASS_GPR64; 889 xed_gpr_reg_class_array[XED_REG_R9D]= XED_REG_CLASS_GPR32; 890 xed_gpr_reg_class_array[XED_REG_R9W]= XED_REG_CLASS_GPR16; 891 xed_gpr_reg_class_array[XED_REG_R9B]= XED_REG_CLASS_GPR8; 892 xed_gpr_reg_class_array[XED_REG_R10]= XED_REG_CLASS_GPR64; 893 xed_gpr_reg_class_array[XED_REG_R10D]= XED_REG_CLASS_GPR32; 894 xed_gpr_reg_class_array[XED_REG_R10W]= XED_REG_CLASS_GPR16; 895 xed_gpr_reg_class_array[XED_REG_R10B]= XED_REG_CLASS_GPR8; 896 xed_gpr_reg_class_array[XED_REG_R11]= XED_REG_CLASS_GPR64; 897 xed_gpr_reg_class_array[XED_REG_R11D]= XED_REG_CLASS_GPR32; 898 xed_gpr_reg_class_array[XED_REG_R11W]= XED_REG_CLASS_GPR16; 899 xed_gpr_reg_class_array[XED_REG_R11B]= XED_REG_CLASS_GPR8; 900 xed_gpr_reg_class_array[XED_REG_R12]= XED_REG_CLASS_GPR64; 901 xed_gpr_reg_class_array[XED_REG_R12D]= XED_REG_CLASS_GPR32; 902 xed_gpr_reg_class_array[XED_REG_R12W]= XED_REG_CLASS_GPR16; 903 xed_gpr_reg_class_array[XED_REG_R12B]= XED_REG_CLASS_GPR8; 904 xed_gpr_reg_class_array[XED_REG_R13]= XED_REG_CLASS_GPR64; 905 xed_gpr_reg_class_array[XED_REG_R13D]= XED_REG_CLASS_GPR32; 906 xed_gpr_reg_class_array[XED_REG_R13W]= XED_REG_CLASS_GPR16; 907 xed_gpr_reg_class_array[XED_REG_R13B]= XED_REG_CLASS_GPR8; 908 xed_gpr_reg_class_array[XED_REG_R14]= XED_REG_CLASS_GPR64; 909 xed_gpr_reg_class_array[XED_REG_R14D]= XED_REG_CLASS_GPR32; 910 xed_gpr_reg_class_array[XED_REG_R14W]= XED_REG_CLASS_GPR16; 911 xed_gpr_reg_class_array[XED_REG_R14B]= XED_REG_CLASS_GPR8; 912 xed_gpr_reg_class_array[XED_REG_R15]= XED_REG_CLASS_GPR64; 913 xed_gpr_reg_class_array[XED_REG_R15D]= XED_REG_CLASS_GPR32; 914 xed_gpr_reg_class_array[XED_REG_R15W]= XED_REG_CLASS_GPR16; 915 xed_gpr_reg_class_array[XED_REG_R15B]= XED_REG_CLASS_GPR8; 916 xed_reg_width_bits[XED_REG_INVALID][0] = 0; 917 xed_reg_width_bits[XED_REG_INVALID][1] = 0; 918 xed_reg_width_bits[XED_REG_ERROR][0] = 0; 919 xed_reg_width_bits[XED_REG_ERROR][1] = 0; 920 xed_reg_width_bits[XED_REG_RAX][0] = 64; 921 xed_reg_width_bits[XED_REG_RAX][1] = 64; 922 xed_reg_width_bits[XED_REG_EAX][0] = 32; 923 xed_reg_width_bits[XED_REG_EAX][1] = 32; 924 xed_reg_width_bits[XED_REG_AX][0] = 16; 925 xed_reg_width_bits[XED_REG_AX][1] = 16; 926 xed_reg_width_bits[XED_REG_AH][0] = 8; 927 xed_reg_width_bits[XED_REG_AH][1] = 8; 928 xed_reg_width_bits[XED_REG_AL][0] = 8; 929 xed_reg_width_bits[XED_REG_AL][1] = 8; 930 xed_reg_width_bits[XED_REG_RCX][0] = 64; 931 xed_reg_width_bits[XED_REG_RCX][1] = 64; 932 xed_reg_width_bits[XED_REG_ECX][0] = 32; 933 xed_reg_width_bits[XED_REG_ECX][1] = 32; 934 xed_reg_width_bits[XED_REG_CX][0] = 16; 935 xed_reg_width_bits[XED_REG_CX][1] = 16; 936 xed_reg_width_bits[XED_REG_CH][0] = 8; 937 xed_reg_width_bits[XED_REG_CH][1] = 8; 938 xed_reg_width_bits[XED_REG_CL][0] = 8; 939 xed_reg_width_bits[XED_REG_CL][1] = 8; 940 xed_reg_width_bits[XED_REG_RDX][0] = 64; 941 xed_reg_width_bits[XED_REG_RDX][1] = 64; 942 xed_reg_width_bits[XED_REG_EDX][0] = 32; 943 xed_reg_width_bits[XED_REG_EDX][1] = 32; 944 xed_reg_width_bits[XED_REG_DX][0] = 16; 945 xed_reg_width_bits[XED_REG_DX][1] = 16; 946 xed_reg_width_bits[XED_REG_DH][0] = 8; 947 xed_reg_width_bits[XED_REG_DH][1] = 8; 948 xed_reg_width_bits[XED_REG_DL][0] = 8; 949 xed_reg_width_bits[XED_REG_DL][1] = 8; 950 xed_reg_width_bits[XED_REG_RBX][0] = 64; 951 xed_reg_width_bits[XED_REG_RBX][1] = 64; 952 xed_reg_width_bits[XED_REG_EBX][0] = 32; 953 xed_reg_width_bits[XED_REG_EBX][1] = 32; 954 xed_reg_width_bits[XED_REG_BX][0] = 16; 955 xed_reg_width_bits[XED_REG_BX][1] = 16; 956 xed_reg_width_bits[XED_REG_BH][0] = 8; 957 xed_reg_width_bits[XED_REG_BH][1] = 8; 958 xed_reg_width_bits[XED_REG_BL][0] = 8; 959 xed_reg_width_bits[XED_REG_BL][1] = 8; 960 xed_reg_width_bits[XED_REG_RSP][0] = 64; 961 xed_reg_width_bits[XED_REG_RSP][1] = 64; 962 xed_reg_width_bits[XED_REG_ESP][0] = 32; 963 xed_reg_width_bits[XED_REG_ESP][1] = 32; 964 xed_reg_width_bits[XED_REG_SP][0] = 16; 965 xed_reg_width_bits[XED_REG_SP][1] = 16; 966 xed_reg_width_bits[XED_REG_SPL][0] = 8; 967 xed_reg_width_bits[XED_REG_SPL][1] = 8; 968 xed_reg_width_bits[XED_REG_RBP][0] = 64; 969 xed_reg_width_bits[XED_REG_RBP][1] = 64; 970 xed_reg_width_bits[XED_REG_EBP][0] = 32; 971 xed_reg_width_bits[XED_REG_EBP][1] = 32; 972 xed_reg_width_bits[XED_REG_BP][0] = 16; 973 xed_reg_width_bits[XED_REG_BP][1] = 16; 974 xed_reg_width_bits[XED_REG_BPL][0] = 8; 975 xed_reg_width_bits[XED_REG_BPL][1] = 8; 976 xed_reg_width_bits[XED_REG_RSI][0] = 64; 977 xed_reg_width_bits[XED_REG_RSI][1] = 64; 978 xed_reg_width_bits[XED_REG_ESI][0] = 32; 979 xed_reg_width_bits[XED_REG_ESI][1] = 32; 980 xed_reg_width_bits[XED_REG_SI][0] = 16; 981 xed_reg_width_bits[XED_REG_SI][1] = 16; 982 xed_reg_width_bits[XED_REG_SIL][0] = 8; 983 xed_reg_width_bits[XED_REG_SIL][1] = 8; 984 xed_reg_width_bits[XED_REG_RDI][0] = 64; 985 xed_reg_width_bits[XED_REG_RDI][1] = 64; 986 xed_reg_width_bits[XED_REG_EDI][0] = 32; 987 xed_reg_width_bits[XED_REG_EDI][1] = 32; 988 xed_reg_width_bits[XED_REG_DI][0] = 16; 989 xed_reg_width_bits[XED_REG_DI][1] = 16; 990 xed_reg_width_bits[XED_REG_DIL][0] = 8; 991 xed_reg_width_bits[XED_REG_DIL][1] = 8; 992 xed_reg_width_bits[XED_REG_R8][0] = 64; 993 xed_reg_width_bits[XED_REG_R8][1] = 64; 994 xed_reg_width_bits[XED_REG_R8D][0] = 32; 995 xed_reg_width_bits[XED_REG_R8D][1] = 32; 996 xed_reg_width_bits[XED_REG_R8W][0] = 16; 997 xed_reg_width_bits[XED_REG_R8W][1] = 16; 998 xed_reg_width_bits[XED_REG_R8B][0] = 8; 999 xed_reg_width_bits[XED_REG_R8B][1] = 8; 1000 xed_reg_width_bits[XED_REG_R9][0] = 64; 1001 xed_reg_width_bits[XED_REG_R9][1] = 64; 1002 xed_reg_width_bits[XED_REG_R9D][0] = 32; 1003 xed_reg_width_bits[XED_REG_R9D][1] = 32; 1004 xed_reg_width_bits[XED_REG_R9W][0] = 16; 1005 xed_reg_width_bits[XED_REG_R9W][1] = 16; 1006 xed_reg_width_bits[XED_REG_R9B][0] = 8; 1007 xed_reg_width_bits[XED_REG_R9B][1] = 8; 1008 xed_reg_width_bits[XED_REG_R10][0] = 64; 1009 xed_reg_width_bits[XED_REG_R10][1] = 64; 1010 xed_reg_width_bits[XED_REG_R10D][0] = 32; 1011 xed_reg_width_bits[XED_REG_R10D][1] = 32; 1012 xed_reg_width_bits[XED_REG_R10W][0] = 16; 1013 xed_reg_width_bits[XED_REG_R10W][1] = 16; 1014 xed_reg_width_bits[XED_REG_R10B][0] = 8; 1015 xed_reg_width_bits[XED_REG_R10B][1] = 8; 1016 xed_reg_width_bits[XED_REG_R11][0] = 64; 1017 xed_reg_width_bits[XED_REG_R11][1] = 64; 1018 xed_reg_width_bits[XED_REG_R11D][0] = 32; 1019 xed_reg_width_bits[XED_REG_R11D][1] = 32; 1020 xed_reg_width_bits[XED_REG_R11W][0] = 16; 1021 xed_reg_width_bits[XED_REG_R11W][1] = 16; 1022 xed_reg_width_bits[XED_REG_R11B][0] = 8; 1023 xed_reg_width_bits[XED_REG_R11B][1] = 8; 1024 xed_reg_width_bits[XED_REG_R12][0] = 64; 1025 xed_reg_width_bits[XED_REG_R12][1] = 64; 1026 xed_reg_width_bits[XED_REG_R12D][0] = 32; 1027 xed_reg_width_bits[XED_REG_R12D][1] = 32; 1028 xed_reg_width_bits[XED_REG_R12W][0] = 16; 1029 xed_reg_width_bits[XED_REG_R12W][1] = 16; 1030 xed_reg_width_bits[XED_REG_R12B][0] = 8; 1031 xed_reg_width_bits[XED_REG_R12B][1] = 8; 1032 xed_reg_width_bits[XED_REG_R13][0] = 64; 1033 xed_reg_width_bits[XED_REG_R13][1] = 64; 1034 xed_reg_width_bits[XED_REG_R13D][0] = 32; 1035 xed_reg_width_bits[XED_REG_R13D][1] = 32; 1036 xed_reg_width_bits[XED_REG_R13W][0] = 16; 1037 xed_reg_width_bits[XED_REG_R13W][1] = 16; 1038 xed_reg_width_bits[XED_REG_R13B][0] = 8; 1039 xed_reg_width_bits[XED_REG_R13B][1] = 8; 1040 xed_reg_width_bits[XED_REG_R14][0] = 64; 1041 xed_reg_width_bits[XED_REG_R14][1] = 64; 1042 xed_reg_width_bits[XED_REG_R14D][0] = 32; 1043 xed_reg_width_bits[XED_REG_R14D][1] = 32; 1044 xed_reg_width_bits[XED_REG_R14W][0] = 16; 1045 xed_reg_width_bits[XED_REG_R14W][1] = 16; 1046 xed_reg_width_bits[XED_REG_R14B][0] = 8; 1047 xed_reg_width_bits[XED_REG_R14B][1] = 8; 1048 xed_reg_width_bits[XED_REG_R15][0] = 64; 1049 xed_reg_width_bits[XED_REG_R15][1] = 64; 1050 xed_reg_width_bits[XED_REG_R15D][0] = 32; 1051 xed_reg_width_bits[XED_REG_R15D][1] = 32; 1052 xed_reg_width_bits[XED_REG_R15W][0] = 16; 1053 xed_reg_width_bits[XED_REG_R15W][1] = 16; 1054 xed_reg_width_bits[XED_REG_R15B][0] = 8; 1055 xed_reg_width_bits[XED_REG_R15B][1] = 8; 1056 xed_reg_width_bits[XED_REG_RIP][0] = 64; 1057 xed_reg_width_bits[XED_REG_RIP][1] = 64; 1058 xed_reg_width_bits[XED_REG_EIP][0] = 32; 1059 xed_reg_width_bits[XED_REG_EIP][1] = 32; 1060 xed_reg_width_bits[XED_REG_IP][0] = 16; 1061 xed_reg_width_bits[XED_REG_IP][1] = 16; 1062 xed_reg_width_bits[XED_REG_FLAGS][0] = 16; 1063 xed_reg_width_bits[XED_REG_FLAGS][1] = 16; 1064 xed_reg_width_bits[XED_REG_EFLAGS][0] = 32; 1065 xed_reg_width_bits[XED_REG_EFLAGS][1] = 32; 1066 xed_reg_width_bits[XED_REG_RFLAGS][0] = 64; 1067 xed_reg_width_bits[XED_REG_RFLAGS][1] = 64; 1068 xed_reg_width_bits[XED_REG_CS][0] = 16; 1069 xed_reg_width_bits[XED_REG_CS][1] = 16; 1070 xed_reg_width_bits[XED_REG_DS][0] = 16; 1071 xed_reg_width_bits[XED_REG_DS][1] = 16; 1072 xed_reg_width_bits[XED_REG_ES][0] = 16; 1073 xed_reg_width_bits[XED_REG_ES][1] = 16; 1074 xed_reg_width_bits[XED_REG_SS][0] = 16; 1075 xed_reg_width_bits[XED_REG_SS][1] = 16; 1076 xed_reg_width_bits[XED_REG_FS][0] = 16; 1077 xed_reg_width_bits[XED_REG_FS][1] = 16; 1078 xed_reg_width_bits[XED_REG_GS][0] = 16; 1079 xed_reg_width_bits[XED_REG_GS][1] = 16; 1080 xed_reg_width_bits[XED_REG_MMX0][0] = 64; 1081 xed_reg_width_bits[XED_REG_MMX0][1] = 64; 1082 xed_reg_width_bits[XED_REG_MMX1][0] = 64; 1083 xed_reg_width_bits[XED_REG_MMX1][1] = 64; 1084 xed_reg_width_bits[XED_REG_MMX2][0] = 64; 1085 xed_reg_width_bits[XED_REG_MMX2][1] = 64; 1086 xed_reg_width_bits[XED_REG_MMX3][0] = 64; 1087 xed_reg_width_bits[XED_REG_MMX3][1] = 64; 1088 xed_reg_width_bits[XED_REG_MMX4][0] = 64; 1089 xed_reg_width_bits[XED_REG_MMX4][1] = 64; 1090 xed_reg_width_bits[XED_REG_MMX5][0] = 64; 1091 xed_reg_width_bits[XED_REG_MMX5][1] = 64; 1092 xed_reg_width_bits[XED_REG_MMX6][0] = 64; 1093 xed_reg_width_bits[XED_REG_MMX6][1] = 64; 1094 xed_reg_width_bits[XED_REG_MMX7][0] = 64; 1095 xed_reg_width_bits[XED_REG_MMX7][1] = 64; 1096 xed_reg_width_bits[XED_REG_ST0][0] = 80; 1097 xed_reg_width_bits[XED_REG_ST0][1] = 80; 1098 xed_reg_width_bits[XED_REG_ST1][0] = 80; 1099 xed_reg_width_bits[XED_REG_ST1][1] = 80; 1100 xed_reg_width_bits[XED_REG_ST2][0] = 80; 1101 xed_reg_width_bits[XED_REG_ST2][1] = 80; 1102 xed_reg_width_bits[XED_REG_ST3][0] = 80; 1103 xed_reg_width_bits[XED_REG_ST3][1] = 80; 1104 xed_reg_width_bits[XED_REG_ST4][0] = 80; 1105 xed_reg_width_bits[XED_REG_ST4][1] = 80; 1106 xed_reg_width_bits[XED_REG_ST5][0] = 80; 1107 xed_reg_width_bits[XED_REG_ST5][1] = 80; 1108 xed_reg_width_bits[XED_REG_ST6][0] = 80; 1109 xed_reg_width_bits[XED_REG_ST6][1] = 80; 1110 xed_reg_width_bits[XED_REG_ST7][0] = 80; 1111 xed_reg_width_bits[XED_REG_ST7][1] = 80; 1112 xed_reg_width_bits[XED_REG_CR0][0] = 32; 1113 xed_reg_width_bits[XED_REG_CR0][1] = 64; 1114 xed_reg_width_bits[XED_REG_CR1][0] = 32; 1115 xed_reg_width_bits[XED_REG_CR1][1] = 64; 1116 xed_reg_width_bits[XED_REG_CR2][0] = 32; 1117 xed_reg_width_bits[XED_REG_CR2][1] = 64; 1118 xed_reg_width_bits[XED_REG_CR3][0] = 32; 1119 xed_reg_width_bits[XED_REG_CR3][1] = 64; 1120 xed_reg_width_bits[XED_REG_CR4][0] = 32; 1121 xed_reg_width_bits[XED_REG_CR4][1] = 64; 1122 xed_reg_width_bits[XED_REG_CR5][0] = 32; 1123 xed_reg_width_bits[XED_REG_CR5][1] = 64; 1124 xed_reg_width_bits[XED_REG_CR6][0] = 32; 1125 xed_reg_width_bits[XED_REG_CR6][1] = 64; 1126 xed_reg_width_bits[XED_REG_CR7][0] = 32; 1127 xed_reg_width_bits[XED_REG_CR7][1] = 64; 1128 xed_reg_width_bits[XED_REG_CR8][0] = 32; 1129 xed_reg_width_bits[XED_REG_CR8][1] = 64; 1130 xed_reg_width_bits[XED_REG_CR9][0] = 32; 1131 xed_reg_width_bits[XED_REG_CR9][1] = 64; 1132 xed_reg_width_bits[XED_REG_CR10][0] = 32; 1133 xed_reg_width_bits[XED_REG_CR10][1] = 64; 1134 xed_reg_width_bits[XED_REG_CR11][0] = 32; 1135 xed_reg_width_bits[XED_REG_CR11][1] = 64; 1136 xed_reg_width_bits[XED_REG_CR12][0] = 32; 1137 xed_reg_width_bits[XED_REG_CR12][1] = 64; 1138 xed_reg_width_bits[XED_REG_CR13][0] = 32; 1139 xed_reg_width_bits[XED_REG_CR13][1] = 64; 1140 xed_reg_width_bits[XED_REG_CR14][0] = 32; 1141 xed_reg_width_bits[XED_REG_CR14][1] = 64; 1142 xed_reg_width_bits[XED_REG_CR15][0] = 32; 1143 xed_reg_width_bits[XED_REG_CR15][1] = 64; 1144 xed_reg_width_bits[XED_REG_DR0][0] = 32; 1145 xed_reg_width_bits[XED_REG_DR0][1] = 64; 1146 xed_reg_width_bits[XED_REG_DR1][0] = 32; 1147 xed_reg_width_bits[XED_REG_DR1][1] = 64; 1148 xed_reg_width_bits[XED_REG_DR2][0] = 32; 1149 xed_reg_width_bits[XED_REG_DR2][1] = 64; 1150 xed_reg_width_bits[XED_REG_DR3][0] = 32; 1151 xed_reg_width_bits[XED_REG_DR3][1] = 64; 1152 xed_reg_width_bits[XED_REG_DR4][0] = 32; 1153 xed_reg_width_bits[XED_REG_DR4][1] = 64; 1154 xed_reg_width_bits[XED_REG_DR5][0] = 32; 1155 xed_reg_width_bits[XED_REG_DR5][1] = 64; 1156 xed_reg_width_bits[XED_REG_DR6][0] = 32; 1157 xed_reg_width_bits[XED_REG_DR6][1] = 64; 1158 xed_reg_width_bits[XED_REG_DR7][0] = 32; 1159 xed_reg_width_bits[XED_REG_DR7][1] = 64; 1160 xed_reg_width_bits[XED_REG_STACKPUSH][0] = 0; 1161 xed_reg_width_bits[XED_REG_STACKPUSH][1] = 0; 1162 xed_reg_width_bits[XED_REG_STACKPOP][0] = 0; 1163 xed_reg_width_bits[XED_REG_STACKPOP][1] = 0; 1164 xed_reg_width_bits[XED_REG_GDTR][0] = 80; 1165 xed_reg_width_bits[XED_REG_GDTR][1] = 80; 1166 xed_reg_width_bits[XED_REG_LDTR][0] = 80; 1167 xed_reg_width_bits[XED_REG_LDTR][1] = 80; 1168 xed_reg_width_bits[XED_REG_IDTR][0] = 80; 1169 xed_reg_width_bits[XED_REG_IDTR][1] = 80; 1170 xed_reg_width_bits[XED_REG_TR][0] = 80; 1171 xed_reg_width_bits[XED_REG_TR][1] = 80; 1172 xed_reg_width_bits[XED_REG_TSC][0] = 32; 1173 xed_reg_width_bits[XED_REG_TSC][1] = 32; 1174 xed_reg_width_bits[XED_REG_TSCAUX][0] = 32; 1175 xed_reg_width_bits[XED_REG_TSCAUX][1] = 32; 1176 xed_reg_width_bits[XED_REG_MSRS][0] = 0; 1177 xed_reg_width_bits[XED_REG_MSRS][1] = 0; 1178 xed_reg_width_bits[XED_REG_X87CONTROL][0] = 16; 1179 xed_reg_width_bits[XED_REG_X87CONTROL][1] = 16; 1180 xed_reg_width_bits[XED_REG_X87STATUS][0] = 16; 1181 xed_reg_width_bits[XED_REG_X87STATUS][1] = 16; 1182 xed_reg_width_bits[XED_REG_X87TAG][0] = 16; 1183 xed_reg_width_bits[XED_REG_X87TAG][1] = 16; 1184 xed_reg_width_bits[XED_REG_X87PUSH][0] = 0; 1185 xed_reg_width_bits[XED_REG_X87PUSH][1] = 0; 1186 xed_reg_width_bits[XED_REG_X87POP][0] = 0; 1187 xed_reg_width_bits[XED_REG_X87POP][1] = 0; 1188 xed_reg_width_bits[XED_REG_X87POP2][0] = 0; 1189 xed_reg_width_bits[XED_REG_X87POP2][1] = 0; 1190 xed_reg_width_bits[XED_REG_X87OPCODE][0] = 11; 1191 xed_reg_width_bits[XED_REG_X87OPCODE][1] = 11; 1192 xed_reg_width_bits[XED_REG_X87LASTCS][0] = 16; 1193 xed_reg_width_bits[XED_REG_X87LASTCS][1] = 16; 1194 xed_reg_width_bits[XED_REG_X87LASTIP][0] = 32; 1195 xed_reg_width_bits[XED_REG_X87LASTIP][1] = 64; 1196 xed_reg_width_bits[XED_REG_X87LASTDS][0] = 16; 1197 xed_reg_width_bits[XED_REG_X87LASTDS][1] = 16; 1198 xed_reg_width_bits[XED_REG_X87LASTDP][0] = 32; 1199 xed_reg_width_bits[XED_REG_X87LASTDP][1] = 64; 1200 xed_reg_width_bits[XED_REG_XCR0][0] = 64; 1201 xed_reg_width_bits[XED_REG_XCR0][1] = 64; 1202 xed_reg_width_bits[XED_REG_MXCSR][0] = 32; 1203 xed_reg_width_bits[XED_REG_MXCSR][1] = 32; 1204 xed_reg_width_bits[XED_REG_TMP0][0] = 0; 1205 xed_reg_width_bits[XED_REG_TMP0][1] = 0; 1206 xed_reg_width_bits[XED_REG_TMP1][0] = 0; 1207 xed_reg_width_bits[XED_REG_TMP1][1] = 0; 1208 xed_reg_width_bits[XED_REG_TMP2][0] = 0; 1209 xed_reg_width_bits[XED_REG_TMP2][1] = 0; 1210 xed_reg_width_bits[XED_REG_TMP3][0] = 0; 1211 xed_reg_width_bits[XED_REG_TMP3][1] = 0; 1212 xed_reg_width_bits[XED_REG_TMP4][0] = 0; 1213 xed_reg_width_bits[XED_REG_TMP4][1] = 0; 1214 xed_reg_width_bits[XED_REG_TMP5][0] = 0; 1215 xed_reg_width_bits[XED_REG_TMP5][1] = 0; 1216 xed_reg_width_bits[XED_REG_TMP6][0] = 0; 1217 xed_reg_width_bits[XED_REG_TMP6][1] = 0; 1218 xed_reg_width_bits[XED_REG_TMP7][0] = 0; 1219 xed_reg_width_bits[XED_REG_TMP7][1] = 0; 1220 xed_reg_width_bits[XED_REG_TMP8][0] = 0; 1221 xed_reg_width_bits[XED_REG_TMP8][1] = 0; 1222 xed_reg_width_bits[XED_REG_TMP9][0] = 0; 1223 xed_reg_width_bits[XED_REG_TMP9][1] = 0; 1224 xed_reg_width_bits[XED_REG_TMP10][0] = 0; 1225 xed_reg_width_bits[XED_REG_TMP10][1] = 0; 1226 xed_reg_width_bits[XED_REG_TMP11][0] = 0; 1227 xed_reg_width_bits[XED_REG_TMP11][1] = 0; 1228 xed_reg_width_bits[XED_REG_TMP12][0] = 0; 1229 xed_reg_width_bits[XED_REG_TMP12][1] = 0; 1230 xed_reg_width_bits[XED_REG_TMP13][0] = 0; 1231 xed_reg_width_bits[XED_REG_TMP13][1] = 0; 1232 xed_reg_width_bits[XED_REG_TMP14][0] = 0; 1233 xed_reg_width_bits[XED_REG_TMP14][1] = 0; 1234 xed_reg_width_bits[XED_REG_TMP15][0] = 0; 1235 xed_reg_width_bits[XED_REG_TMP15][1] = 0; 1236 xed_reg_width_bits[XED_REG_K0][0] = 64; 1237 xed_reg_width_bits[XED_REG_K0][1] = 64; 1238 xed_reg_width_bits[XED_REG_K1][0] = 64; 1239 xed_reg_width_bits[XED_REG_K1][1] = 64; 1240 xed_reg_width_bits[XED_REG_K2][0] = 64; 1241 xed_reg_width_bits[XED_REG_K2][1] = 64; 1242 xed_reg_width_bits[XED_REG_K3][0] = 64; 1243 xed_reg_width_bits[XED_REG_K3][1] = 64; 1244 xed_reg_width_bits[XED_REG_K4][0] = 64; 1245 xed_reg_width_bits[XED_REG_K4][1] = 64; 1246 xed_reg_width_bits[XED_REG_K5][0] = 64; 1247 xed_reg_width_bits[XED_REG_K5][1] = 64; 1248 xed_reg_width_bits[XED_REG_K6][0] = 64; 1249 xed_reg_width_bits[XED_REG_K6][1] = 64; 1250 xed_reg_width_bits[XED_REG_K7][0] = 64; 1251 xed_reg_width_bits[XED_REG_K7][1] = 64; 1252 xed_reg_width_bits[XED_REG_BND0][0] = 128; 1253 xed_reg_width_bits[XED_REG_BND0][1] = 128; 1254 xed_reg_width_bits[XED_REG_BND1][0] = 128; 1255 xed_reg_width_bits[XED_REG_BND1][1] = 128; 1256 xed_reg_width_bits[XED_REG_BND2][0] = 128; 1257 xed_reg_width_bits[XED_REG_BND2][1] = 128; 1258 xed_reg_width_bits[XED_REG_BND3][0] = 128; 1259 xed_reg_width_bits[XED_REG_BND3][1] = 128; 1260 xed_reg_width_bits[XED_REG_BNDCFGU][0] = 64; 1261 xed_reg_width_bits[XED_REG_BNDCFGU][1] = 64; 1262 xed_reg_width_bits[XED_REG_BNDSTATUS][0] = 64; 1263 xed_reg_width_bits[XED_REG_BNDSTATUS][1] = 64; 1264 xed_reg_width_bits[XED_REG_SSP][0] = 0; 1265 xed_reg_width_bits[XED_REG_SSP][1] = 0; 1266 xed_reg_width_bits[XED_REG_IA32_U_CET][0] = 0; 1267 xed_reg_width_bits[XED_REG_IA32_U_CET][1] = 0; 1268 xed_reg_width_bits[XED_REG_FSBASE][0] = 0; 1269 xed_reg_width_bits[XED_REG_FSBASE][1] = 0; 1270 xed_reg_width_bits[XED_REG_GSBASE][0] = 0; 1271 xed_reg_width_bits[XED_REG_GSBASE][1] = 0; 1272 xed_reg_width_bits[XED_REG_XMM0][0] = 128; 1273 xed_reg_width_bits[XED_REG_XMM0][1] = 128; 1274 xed_reg_width_bits[XED_REG_XMM1][0] = 128; 1275 xed_reg_width_bits[XED_REG_XMM1][1] = 128; 1276 xed_reg_width_bits[XED_REG_XMM2][0] = 128; 1277 xed_reg_width_bits[XED_REG_XMM2][1] = 128; 1278 xed_reg_width_bits[XED_REG_XMM3][0] = 128; 1279 xed_reg_width_bits[XED_REG_XMM3][1] = 128; 1280 xed_reg_width_bits[XED_REG_XMM4][0] = 128; 1281 xed_reg_width_bits[XED_REG_XMM4][1] = 128; 1282 xed_reg_width_bits[XED_REG_XMM5][0] = 128; 1283 xed_reg_width_bits[XED_REG_XMM5][1] = 128; 1284 xed_reg_width_bits[XED_REG_XMM6][0] = 128; 1285 xed_reg_width_bits[XED_REG_XMM6][1] = 128; 1286 xed_reg_width_bits[XED_REG_XMM7][0] = 128; 1287 xed_reg_width_bits[XED_REG_XMM7][1] = 128; 1288 xed_reg_width_bits[XED_REG_XMM8][0] = 128; 1289 xed_reg_width_bits[XED_REG_XMM8][1] = 128; 1290 xed_reg_width_bits[XED_REG_XMM9][0] = 128; 1291 xed_reg_width_bits[XED_REG_XMM9][1] = 128; 1292 xed_reg_width_bits[XED_REG_XMM10][0] = 128; 1293 xed_reg_width_bits[XED_REG_XMM10][1] = 128; 1294 xed_reg_width_bits[XED_REG_XMM11][0] = 128; 1295 xed_reg_width_bits[XED_REG_XMM11][1] = 128; 1296 xed_reg_width_bits[XED_REG_XMM12][0] = 128; 1297 xed_reg_width_bits[XED_REG_XMM12][1] = 128; 1298 xed_reg_width_bits[XED_REG_XMM13][0] = 128; 1299 xed_reg_width_bits[XED_REG_XMM13][1] = 128; 1300 xed_reg_width_bits[XED_REG_XMM14][0] = 128; 1301 xed_reg_width_bits[XED_REG_XMM14][1] = 128; 1302 xed_reg_width_bits[XED_REG_XMM15][0] = 128; 1303 xed_reg_width_bits[XED_REG_XMM15][1] = 128; 1304 xed_reg_width_bits[XED_REG_YMM0][0] = 256; 1305 xed_reg_width_bits[XED_REG_YMM0][1] = 256; 1306 xed_reg_width_bits[XED_REG_YMM1][0] = 256; 1307 xed_reg_width_bits[XED_REG_YMM1][1] = 256; 1308 xed_reg_width_bits[XED_REG_YMM2][0] = 256; 1309 xed_reg_width_bits[XED_REG_YMM2][1] = 256; 1310 xed_reg_width_bits[XED_REG_YMM3][0] = 256; 1311 xed_reg_width_bits[XED_REG_YMM3][1] = 256; 1312 xed_reg_width_bits[XED_REG_YMM4][0] = 256; 1313 xed_reg_width_bits[XED_REG_YMM4][1] = 256; 1314 xed_reg_width_bits[XED_REG_YMM5][0] = 256; 1315 xed_reg_width_bits[XED_REG_YMM5][1] = 256; 1316 xed_reg_width_bits[XED_REG_YMM6][0] = 256; 1317 xed_reg_width_bits[XED_REG_YMM6][1] = 256; 1318 xed_reg_width_bits[XED_REG_YMM7][0] = 256; 1319 xed_reg_width_bits[XED_REG_YMM7][1] = 256; 1320 xed_reg_width_bits[XED_REG_YMM8][0] = 256; 1321 xed_reg_width_bits[XED_REG_YMM8][1] = 256; 1322 xed_reg_width_bits[XED_REG_YMM9][0] = 256; 1323 xed_reg_width_bits[XED_REG_YMM9][1] = 256; 1324 xed_reg_width_bits[XED_REG_YMM10][0] = 256; 1325 xed_reg_width_bits[XED_REG_YMM10][1] = 256; 1326 xed_reg_width_bits[XED_REG_YMM11][0] = 256; 1327 xed_reg_width_bits[XED_REG_YMM11][1] = 256; 1328 xed_reg_width_bits[XED_REG_YMM12][0] = 256; 1329 xed_reg_width_bits[XED_REG_YMM12][1] = 256; 1330 xed_reg_width_bits[XED_REG_YMM13][0] = 256; 1331 xed_reg_width_bits[XED_REG_YMM13][1] = 256; 1332 xed_reg_width_bits[XED_REG_YMM14][0] = 256; 1333 xed_reg_width_bits[XED_REG_YMM14][1] = 256; 1334 xed_reg_width_bits[XED_REG_YMM15][0] = 256; 1335 xed_reg_width_bits[XED_REG_YMM15][1] = 256; 1336 xed_reg_width_bits[XED_REG_ZMM0][0] = 512; 1337 xed_reg_width_bits[XED_REG_ZMM0][1] = 512; 1338 xed_reg_width_bits[XED_REG_ZMM1][0] = 512; 1339 xed_reg_width_bits[XED_REG_ZMM1][1] = 512; 1340 xed_reg_width_bits[XED_REG_ZMM2][0] = 512; 1341 xed_reg_width_bits[XED_REG_ZMM2][1] = 512; 1342 xed_reg_width_bits[XED_REG_ZMM3][0] = 512; 1343 xed_reg_width_bits[XED_REG_ZMM3][1] = 512; 1344 xed_reg_width_bits[XED_REG_ZMM4][0] = 512; 1345 xed_reg_width_bits[XED_REG_ZMM4][1] = 512; 1346 xed_reg_width_bits[XED_REG_ZMM5][0] = 512; 1347 xed_reg_width_bits[XED_REG_ZMM5][1] = 512; 1348 xed_reg_width_bits[XED_REG_ZMM6][0] = 512; 1349 xed_reg_width_bits[XED_REG_ZMM6][1] = 512; 1350 xed_reg_width_bits[XED_REG_ZMM7][0] = 512; 1351 xed_reg_width_bits[XED_REG_ZMM7][1] = 512; 1352 xed_reg_width_bits[XED_REG_ZMM8][0] = 512; 1353 xed_reg_width_bits[XED_REG_ZMM8][1] = 512; 1354 xed_reg_width_bits[XED_REG_ZMM9][0] = 512; 1355 xed_reg_width_bits[XED_REG_ZMM9][1] = 512; 1356 xed_reg_width_bits[XED_REG_ZMM10][0] = 512; 1357 xed_reg_width_bits[XED_REG_ZMM10][1] = 512; 1358 xed_reg_width_bits[XED_REG_ZMM11][0] = 512; 1359 xed_reg_width_bits[XED_REG_ZMM11][1] = 512; 1360 xed_reg_width_bits[XED_REG_ZMM12][0] = 512; 1361 xed_reg_width_bits[XED_REG_ZMM12][1] = 512; 1362 xed_reg_width_bits[XED_REG_ZMM13][0] = 512; 1363 xed_reg_width_bits[XED_REG_ZMM13][1] = 512; 1364 xed_reg_width_bits[XED_REG_ZMM14][0] = 512; 1365 xed_reg_width_bits[XED_REG_ZMM14][1] = 512; 1366 xed_reg_width_bits[XED_REG_ZMM15][0] = 512; 1367 xed_reg_width_bits[XED_REG_ZMM15][1] = 512; 1368 xed_reg_width_bits[XED_REG_ZMM16][0] = 512; 1369 xed_reg_width_bits[XED_REG_ZMM16][1] = 512; 1370 xed_reg_width_bits[XED_REG_ZMM17][0] = 512; 1371 xed_reg_width_bits[XED_REG_ZMM17][1] = 512; 1372 xed_reg_width_bits[XED_REG_ZMM18][0] = 512; 1373 xed_reg_width_bits[XED_REG_ZMM18][1] = 512; 1374 xed_reg_width_bits[XED_REG_ZMM19][0] = 512; 1375 xed_reg_width_bits[XED_REG_ZMM19][1] = 512; 1376 xed_reg_width_bits[XED_REG_ZMM20][0] = 512; 1377 xed_reg_width_bits[XED_REG_ZMM20][1] = 512; 1378 xed_reg_width_bits[XED_REG_ZMM21][0] = 512; 1379 xed_reg_width_bits[XED_REG_ZMM21][1] = 512; 1380 xed_reg_width_bits[XED_REG_ZMM22][0] = 512; 1381 xed_reg_width_bits[XED_REG_ZMM22][1] = 512; 1382 xed_reg_width_bits[XED_REG_ZMM23][0] = 512; 1383 xed_reg_width_bits[XED_REG_ZMM23][1] = 512; 1384 xed_reg_width_bits[XED_REG_ZMM24][0] = 512; 1385 xed_reg_width_bits[XED_REG_ZMM24][1] = 512; 1386 xed_reg_width_bits[XED_REG_ZMM25][0] = 512; 1387 xed_reg_width_bits[XED_REG_ZMM25][1] = 512; 1388 xed_reg_width_bits[XED_REG_ZMM26][0] = 512; 1389 xed_reg_width_bits[XED_REG_ZMM26][1] = 512; 1390 xed_reg_width_bits[XED_REG_ZMM27][0] = 512; 1391 xed_reg_width_bits[XED_REG_ZMM27][1] = 512; 1392 xed_reg_width_bits[XED_REG_ZMM28][0] = 512; 1393 xed_reg_width_bits[XED_REG_ZMM28][1] = 512; 1394 xed_reg_width_bits[XED_REG_ZMM29][0] = 512; 1395 xed_reg_width_bits[XED_REG_ZMM29][1] = 512; 1396 xed_reg_width_bits[XED_REG_ZMM30][0] = 512; 1397 xed_reg_width_bits[XED_REG_ZMM30][1] = 512; 1398 xed_reg_width_bits[XED_REG_ZMM31][0] = 512; 1399 xed_reg_width_bits[XED_REG_ZMM31][1] = 512; 1400 xed_reg_width_bits[XED_REG_XMM16][0] = 128; 1401 xed_reg_width_bits[XED_REG_XMM16][1] = 128; 1402 xed_reg_width_bits[XED_REG_XMM17][0] = 128; 1403 xed_reg_width_bits[XED_REG_XMM17][1] = 128; 1404 xed_reg_width_bits[XED_REG_XMM18][0] = 128; 1405 xed_reg_width_bits[XED_REG_XMM18][1] = 128; 1406 xed_reg_width_bits[XED_REG_XMM19][0] = 128; 1407 xed_reg_width_bits[XED_REG_XMM19][1] = 128; 1408 xed_reg_width_bits[XED_REG_XMM20][0] = 128; 1409 xed_reg_width_bits[XED_REG_XMM20][1] = 128; 1410 xed_reg_width_bits[XED_REG_XMM21][0] = 128; 1411 xed_reg_width_bits[XED_REG_XMM21][1] = 128; 1412 xed_reg_width_bits[XED_REG_XMM22][0] = 128; 1413 xed_reg_width_bits[XED_REG_XMM22][1] = 128; 1414 xed_reg_width_bits[XED_REG_XMM23][0] = 128; 1415 xed_reg_width_bits[XED_REG_XMM23][1] = 128; 1416 xed_reg_width_bits[XED_REG_XMM24][0] = 128; 1417 xed_reg_width_bits[XED_REG_XMM24][1] = 128; 1418 xed_reg_width_bits[XED_REG_XMM25][0] = 128; 1419 xed_reg_width_bits[XED_REG_XMM25][1] = 128; 1420 xed_reg_width_bits[XED_REG_XMM26][0] = 128; 1421 xed_reg_width_bits[XED_REG_XMM26][1] = 128; 1422 xed_reg_width_bits[XED_REG_XMM27][0] = 128; 1423 xed_reg_width_bits[XED_REG_XMM27][1] = 128; 1424 xed_reg_width_bits[XED_REG_XMM28][0] = 128; 1425 xed_reg_width_bits[XED_REG_XMM28][1] = 128; 1426 xed_reg_width_bits[XED_REG_XMM29][0] = 128; 1427 xed_reg_width_bits[XED_REG_XMM29][1] = 128; 1428 xed_reg_width_bits[XED_REG_XMM30][0] = 128; 1429 xed_reg_width_bits[XED_REG_XMM30][1] = 128; 1430 xed_reg_width_bits[XED_REG_XMM31][0] = 128; 1431 xed_reg_width_bits[XED_REG_XMM31][1] = 128; 1432 xed_reg_width_bits[XED_REG_YMM16][0] = 256; 1433 xed_reg_width_bits[XED_REG_YMM16][1] = 256; 1434 xed_reg_width_bits[XED_REG_YMM17][0] = 256; 1435 xed_reg_width_bits[XED_REG_YMM17][1] = 256; 1436 xed_reg_width_bits[XED_REG_YMM18][0] = 256; 1437 xed_reg_width_bits[XED_REG_YMM18][1] = 256; 1438 xed_reg_width_bits[XED_REG_YMM19][0] = 256; 1439 xed_reg_width_bits[XED_REG_YMM19][1] = 256; 1440 xed_reg_width_bits[XED_REG_YMM20][0] = 256; 1441 xed_reg_width_bits[XED_REG_YMM20][1] = 256; 1442 xed_reg_width_bits[XED_REG_YMM21][0] = 256; 1443 xed_reg_width_bits[XED_REG_YMM21][1] = 256; 1444 xed_reg_width_bits[XED_REG_YMM22][0] = 256; 1445 xed_reg_width_bits[XED_REG_YMM22][1] = 256; 1446 xed_reg_width_bits[XED_REG_YMM23][0] = 256; 1447 xed_reg_width_bits[XED_REG_YMM23][1] = 256; 1448 xed_reg_width_bits[XED_REG_YMM24][0] = 256; 1449 xed_reg_width_bits[XED_REG_YMM24][1] = 256; 1450 xed_reg_width_bits[XED_REG_YMM25][0] = 256; 1451 xed_reg_width_bits[XED_REG_YMM25][1] = 256; 1452 xed_reg_width_bits[XED_REG_YMM26][0] = 256; 1453 xed_reg_width_bits[XED_REG_YMM26][1] = 256; 1454 xed_reg_width_bits[XED_REG_YMM27][0] = 256; 1455 xed_reg_width_bits[XED_REG_YMM27][1] = 256; 1456 xed_reg_width_bits[XED_REG_YMM28][0] = 256; 1457 xed_reg_width_bits[XED_REG_YMM28][1] = 256; 1458 xed_reg_width_bits[XED_REG_YMM29][0] = 256; 1459 xed_reg_width_bits[XED_REG_YMM29][1] = 256; 1460 xed_reg_width_bits[XED_REG_YMM30][0] = 256; 1461 xed_reg_width_bits[XED_REG_YMM30][1] = 256; 1462 xed_reg_width_bits[XED_REG_YMM31][0] = 256; 1463 xed_reg_width_bits[XED_REG_YMM31][1] = 256; 1464 } 1465