1 #include "z80-global" 2 3 #ifndef __Z80CPU 4 #define __Z80CPU 5 6 extern _uchar F,A,B,C,D,E,H,L; 7 extern _uchar F_,A_,B_,C_,D_,E_,H_,L_; 8 extern _uchar IXl,IXh,IYl,IYh; 9 extern _uchar I,R,IM; 10 extern _ushort PC,SP,IX,IY; 11 extern _uchar DATA; 12 extern _ushort ADDRESS; 13 extern bit IFF0; /* internal EI-flipflop */ 14 extern bit IFF1,IFF2; 15 extern bit IFF3; /* NMI has occured */ 16 17 /************************* 18 rd cpu wants to read data 19 wr cpu wants to write data 20 iorq cpu signals to access external IO 21 mreq cpu signals to access memory 22 m1 machine cycle one (together with iorq acknowledges interrupt) 23 inter maskable interrupt pending 24 halt cpu in halt instruction 25 wait cpu in wait state 26 reset cpu reset requested 27 rfsh cpu signals memory refresh (if mreq is set) 28 busrq external hardware requests bus control 29 busack cpu acknowledges bus control 30 *********************/ 31 enum cpu_control_pin { rd, wr, iorq, mreq, m1, inter, halt, wait, reset, rfsh, 32 busrq, busack }; 33 extern const bit cpu_pin[NO_CPU_CONTROL_PINS]; 34 35 extern const unsigned long ticks, cycles; 36 extern bool cpu_is_in_disassemble, cpu_is_in_x_mode; 37 extern void set_cpu_pin(unsigned p, bit level); 38 extern void wait_tics(unsigned duration); 39 extern void set_tics(unsigned long t); 40 extern void acknowledge_bus_request(void); 41 42 #endif 43