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Searched refs:ANDReg (Results 1 – 17 of 17) sorted by relevance

/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1901 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1902 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1903 ResultReg = ANDReg; in emitLoad()
2163 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2164 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2165 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1901 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1902 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1903 ResultReg = ANDReg; in emitLoad()
2163 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2164 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2165 SrcReg = ANDReg; in emitStore()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1851 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, 1); in emitLoad() local
1852 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1853 ResultReg = ANDReg; in emitLoad()
2112 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, 1); in emitStore() local
2113 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2114 SrcReg = ANDReg; in emitStore()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/
H A DAArch64FastISel.cpp1851 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, 1); in emitLoad() local
1852 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1853 ResultReg = ANDReg; in emitLoad()
2112 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, 1); in emitStore() local
2113 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2114 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1901 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1902 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1903 ResultReg = ANDReg; in emitLoad()
2163 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2164 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2165 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/
H A DAArch64FastISel.cpp1901 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1902 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1903 ResultReg = ANDReg; in emitLoad()
2163 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2164 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2165 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/
H A DAArch64FastISel.cpp1903 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1904 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1905 ResultReg = ANDReg; in emitLoad()
2165 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2166 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2167 SrcReg = ANDReg; in emitStore()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1851 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, 1); in emitLoad() local
1852 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1853 ResultReg = ANDReg; in emitLoad()
2112 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, 1); in emitStore() local
2113 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2114 SrcReg = ANDReg; in emitStore()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1903 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1904 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1905 ResultReg = ANDReg; in emitLoad()
2165 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2166 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2167 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1851 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, 1); in emitLoad() local
1852 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1853 ResultReg = ANDReg; in emitLoad()
2112 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, 1); in emitStore() local
2113 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2114 SrcReg = ANDReg; in emitStore()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1851 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, 1); in emitLoad() local
1852 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1853 ResultReg = ANDReg; in emitLoad()
2112 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, 1); in emitStore() local
2113 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2114 SrcReg = ANDReg; in emitStore()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1903 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1904 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1905 ResultReg = ANDReg; in emitLoad()
2165 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2166 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2167 SrcReg = ANDReg; in emitStore()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1901 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1902 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1903 ResultReg = ANDReg; in emitLoad()
2163 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2164 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2165 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/
H A DAArch64FastISel.cpp1866 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1867 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1868 ResultReg = ANDReg; in emitLoad()
2128 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2129 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2130 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/
H A DAArch64FastISel.cpp1870 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1871 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1872 ResultReg = ANDReg; in emitLoad()
2132 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2133 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2134 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/
H A DAArch64FastISel.cpp1870 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local
1871 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1872 ResultReg = ANDReg; in emitLoad()
2130 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local
2131 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2132 SrcReg = ANDReg; in emitStore()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1851 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, 1); in emitLoad() local
1852 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()
1853 ResultReg = ANDReg; in emitLoad()
2112 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, 1); in emitStore() local
2113 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()
2114 SrcReg = ANDReg; in emitStore()