Searched refs:ANYEDGE (Results 1 – 15 of 15) sorted by relevance
/dports/cad/iverilog/verilog-11.0/ |
H A D | sync.cc | 46 if (pr->edge() == NetEvProbe::ANYEDGE) in is_synchronous()
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H A D | net_event.cc | 225 if (cur->edge() != NetEvProbe::ANYEDGE) { in nex_async_()
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H A D | t-dll-proc.cc | 379 case NetEvProbe::ANYEDGE: in proc_assign_nb() 904 case NetEvProbe::ANYEDGE: in proc_wait()
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H A D | elaborate.cc | 4423 ev, NetEvProbe::ANYEDGE, in elaborate_st() 4492 if (expr_[idx]->type() != PEEvent::ANYEDGE) { in elaborate_st() 4548 unsigned pins = (expr_[idx]->type() == PEEvent::ANYEDGE) in elaborate_st() 4563 case PEEvent::ANYEDGE: in elaborate_st() 4565 NetEvProbe::ANYEDGE, pins); in elaborate_st() 4740 wait_event, NetEvProbe::ANYEDGE, in elaborate_wait() 5632 if (pr->edge() != NetEvProbe::ANYEDGE) in elaborate() 6561 if (prb->edge() == NetEvProbe::ANYEDGE) return; in check_event_probe_width() 6592 if (prb->edge() == NetEvProbe::ANYEDGE) { in check_ff_sensitivity()
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H A D | PExpr.h | 282 enum edge_t {ANYEDGE, POSEDGE, NEGEDGE, POSITIVE}; enumerator
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H A D | expr_synth.cc | 1380 ev, NetEvProbe::ANYEDGE, in make_func_trigger()
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H A D | pform_dump.cc | 353 case PEEvent::ANYEDGE: in dump()
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H A D | design_dump.cc | 1267 case ANYEDGE: in dump_node()
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H A D | netlist.cc | 2989 if (prb->edge() != NetEvProbe::ANYEDGE) return false; in do_expr_event_match()
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H A D | parse.y | 3419 PEEvent*tmpe = new PEEvent(PEEvent::ANYEDGE, tmpi); 3470 { PEEvent*tmp = new PEEvent(PEEvent::ANYEDGE, $1);
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H A D | t-dll.cc | 930 case NetEvProbe::ANYEDGE: in event()
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H A D | netlist.h | 3521 enum edge_t { ANYEDGE, POSEDGE, NEGEDGE }; enumerator
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/dports/cad/iverilog/verilog-11.0/vhdlpp/ |
H A D | debug.cc | 332 case ANYEDGE: in dump()
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H A D | expression_emit.cc | 612 case ANYEDGE: in emit()
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H A D | expression.h | 588 enum fun_t { NEGEDGE, ANYEDGE, POSEDGE }; enumerator
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