/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_hal_rcc.h | 969 #define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU) 970 #define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST)) 971 #define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST)) 972 #define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST)) 973 #define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST)) 974 #define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST)) 975 #define __HAL_RCC_WWDG_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST)) 981 #define __HAL_RCC_USB_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USBRST)) 982 #define __HAL_RCC_PWR_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST)) 983 #define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST)) [all …]
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H A D | stm32l1xx_hal_rcc_ex.h | 432 #define __HAL_RCC_LCD_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LCDRST)) 433 #define __HAL_RCC_LCD_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LCDRST)) 444 #define __HAL_RCC_TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST)) 445 #define __HAL_RCC_TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST)) 455 #define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST)) 456 #define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST)) 463 #define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST)) 464 #define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST)) 466 #define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST)) 467 #define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
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H A D | stm32l1xx_ll_bus.h | 715 SET_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ForceReset() 769 CLEAR_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ReleaseReset()
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/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_hal_rcc.h | 969 #define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU) 970 #define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST)) 971 #define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST)) 972 #define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST)) 973 #define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST)) 974 #define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST)) 975 #define __HAL_RCC_WWDG_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST)) 981 #define __HAL_RCC_USB_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USBRST)) 982 #define __HAL_RCC_PWR_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST)) 983 #define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST)) [all …]
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H A D | stm32l1xx_hal_rcc_ex.h | 432 #define __HAL_RCC_LCD_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LCDRST)) 433 #define __HAL_RCC_LCD_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LCDRST)) 444 #define __HAL_RCC_TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST)) 445 #define __HAL_RCC_TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST)) 455 #define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST)) 456 #define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST)) 463 #define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST)) 464 #define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST)) 466 #define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST)) 467 #define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
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H A D | stm32l1xx_ll_bus.h | 715 SET_BIT(RCC->APB1RSTR, Periphs); in crc32c_cal() 769 CLEAR_BIT(RCC->APB1RSTR, Periphs); in crc32c_cal()
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/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_hal_rcc.h | 969 #define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU) 970 #define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST)) 971 #define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST)) 972 #define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST)) 973 #define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST)) 974 #define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST)) 975 #define __HAL_RCC_WWDG_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST)) 981 #define __HAL_RCC_USB_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USBRST)) 982 #define __HAL_RCC_PWR_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST)) 983 #define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST)) [all …]
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H A D | stm32l1xx_hal_rcc_ex.h | 432 #define __HAL_RCC_LCD_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LCDRST)) 433 #define __HAL_RCC_LCD_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LCDRST)) 444 #define __HAL_RCC_TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST)) 445 #define __HAL_RCC_TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST)) 455 #define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST)) 456 #define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST)) 463 #define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST)) 464 #define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST)) 466 #define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST)) 467 #define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
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H A D | stm32l1xx_ll_bus.h | 715 SET_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ForceReset() 769 CLEAR_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ReleaseReset()
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/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_hal_rcc.h | 969 #define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU) 970 #define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST)) 971 #define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST)) 972 #define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST)) 973 #define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST)) 974 #define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST)) 975 #define __HAL_RCC_WWDG_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST)) 981 #define __HAL_RCC_USB_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USBRST)) 982 #define __HAL_RCC_PWR_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST)) 983 #define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST)) [all …]
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H A D | stm32l1xx_hal_rcc_ex.h | 432 #define __HAL_RCC_LCD_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LCDRST)) 433 #define __HAL_RCC_LCD_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LCDRST)) 444 #define __HAL_RCC_TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST)) 445 #define __HAL_RCC_TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST)) 455 #define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST)) 456 #define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST)) 463 #define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST)) 464 #define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST)) 466 #define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST)) 467 #define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
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H A D | stm32l1xx_ll_bus.h | 715 SET_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ForceReset() 769 CLEAR_BIT(RCC->APB1RSTR, Periphs); in LL_APB1_GRP1_ReleaseReset()
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/dports/lang/micropython/micropython-1.17/ports/stm32/ |
H A D | i2c.c | 53 RCC->APB1RSTR |= RCC_APB1RSTR_I2C1RST << i2c_id; in i2c_init() 54 RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST << i2c_id); in i2c_init() 127 RCC->APB1RSTR |= RCC_APB1RSTR_I2C1RST << i2c_id; in i2c_start_addr() 128 RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST << i2c_id); in i2c_start_addr()
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/dports/devel/qbs/qbs-src-1.21.0/examples/baremetal/stm32f103/greenblink/ |
H A D | system.h | 79 __IO uint32_t APB1RSTR; member
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/dports/devel/qbs/qbs-src-1.21.0/examples/baremetal/stm32f4discovery/blueblink/ |
H A D | system.h | 85 __IO uint32_t APB1RSTR; member
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/ |
H A D | stm32f37x_rcc.c | 1453 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 1457 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/ |
H A D | stm32f37x_rcc.c | 1453 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 1457 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/src/ |
H A D | stm32f0xx_rcc.c | 1566 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 1570 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F10x_StdPeriph_Driver/src/ |
H A D | stm32f10x_rcc.c | 1200 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 1204 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F10x_StdPeriph_Driver/src/ |
H A D | stm32f10x_rcc.c | 1200 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 1204 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F30x_StdPeriph_Driver/src/ |
H A D | stm32f30x_rcc.c | 1810 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 1814 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
H A D | stm32f4xx_rcc.c | 2211 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 2215 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
H A D | stm32f4xx_rcc.c | 2211 RCC->APB1RSTR |= RCC_APB1Periph; in RCC_APB1PeriphResetCmd() 2215 RCC->APB1RSTR &= ~RCC_APB1Periph; in RCC_APB1PeriphResetCmd()
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/dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/arm/ |
H A D | stm32f429.pp | 112 APB1RSTR,
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/dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/arm/ |
H A D | stm32f429.pp | 112 APB1RSTR,
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