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Searched refs:APB_SPECIAL_BASE (Results 1 – 7 of 7) sorted by relevance

/dports/emulators/qemu60/qemu-6.0.0/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()
/dports/emulators/qemu5/qemu-5.2.0/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()
/dports/emulators/qemu/qemu-6.2.0/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()
/dports/emulators/qemu42/qemu-4.2.1/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/openbios/arch/sparc64/
H A Dopenbios.c33 #define APB_SPECIAL_BASE 0x1fe00000000ULL macro
59 .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, // PCI bus configuration space
61 .cfg_base = APB_SPECIAL_BASE,
66 .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space
69 …{ .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len…
70 …{ .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x100000…
154 unsigned long addr = APB_SPECIAL_BASE + PBM_PCI_TARGET_AS; in sparc64_set_tas_register()