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Searched refs:ARCH_TIMER_NS_EL2_IRQ (Results 1 – 25 of 35) sorted by relevance

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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/arm/
H A Dvirt.h50 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu42/qemu-4.2.1/include/hw/arm/
H A Dvirt.h50 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu5/qemu-5.2.0/include/hw/arm/
H A Dvirt.h51 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/arm/
H A Dvirt.h50 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/arm/
H A Dvirt.h50 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu/qemu-6.2.0/include/hw/arm/
H A Dvirt.h51 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu60/qemu-6.0.0/include/hw/arm/
H A Dvirt.h51 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/arm/
H A Dvirt.h50 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/arm/
H A Dvirt.h51 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Dsbsa-ref.c56 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
380 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
H A Dvirt.c319 GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); in fdt_add_timer_nodes()
675 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Dsbsa-ref.c56 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
380 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
H A Dvirt.c319 GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); in fdt_add_timer_nodes()
675 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/
H A Dsbsa-ref.c57 #define ARCH_TIMER_NS_EL2_IRQ 10
381 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ,
H A Dvirt.c325 GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); in fdt_add_timer_nodes()
681 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/
H A Dsbsa-ref.c57 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
381 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
H A Dvirt.c324 GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); in fdt_add_timer_nodes()
680 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
/dports/emulators/qemu/qemu-6.2.0/hw/arm/
H A Dsbsa-ref.c59 #define ARCH_TIMER_NS_EL2_IRQ 10 in sabrelite_write_secondary()
428 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ,
H A Dvirt-acpi-build.c616 build_append_int_noprefix(table_data, ARCH_TIMER_NS_EL2_IRQ + 16, 4); in build_gtdt()
/dports/emulators/qemu60/qemu-6.0.0/hw/arm/
H A Dsbsa-ref.c60 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
429 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
H A Dvirt-acpi-build.c463 gtdt->non_secure_el2_interrupt = cpu_to_le32(ARCH_TIMER_NS_EL2_IRQ + 16); in build_gtdt()
/dports/emulators/qemu5/qemu-5.2.0/hw/arm/
H A Dsbsa-ref.c59 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
408 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
H A Dvirt-acpi-build.c455 gtdt->non_secure_el2_interrupt = cpu_to_le32(ARCH_TIMER_NS_EL2_IRQ + 16); in build_gtdt()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/
H A Dsbsa-ref.c59 #define ARCH_TIMER_NS_EL2_IRQ 10 macro
428 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/
H A Dvirt.c299 GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); in fdt_add_timer_nodes()
629 [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, in create_gic()

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