/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 12 include "ARCInstrInfo.td" 15 def ARCInstrInfo : InstrInfo; 23 let InstructionSet = ARCInstrInfo;
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 12 include "ARCInstrInfo.td" 15 def ARCInstrInfo : InstrInfo; 23 let InstructionSet = ARCInstrInfo;
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 12 include "ARCInstrInfo.td" 15 def ARCInstrInfo : InstrInfo; 23 let InstructionSet = ARCInstrInfo;
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 12 include "ARCInstrInfo.td" 15 def ARCInstrInfo : InstrInfo; 23 let InstructionSet = ARCInstrInfo;
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 12 include "ARCInstrInfo.td" 15 def ARCInstrInfo : InstrInfo; 23 let InstructionSet = ARCInstrInfo;
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 12 include "ARCInstrInfo.td" 15 def ARCInstrInfo : InstrInfo; 23 let InstructionSet = ARCInstrInfo;
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo(const ARCSubtarget &ST) in ARCInstrInfo() function in ARCInstrInfo 69 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 88 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 171 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 255 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 282 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 294 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 351 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 359 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 44 void ARCInstrInfo::anchor() {} in anchor() 46 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 68 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 170 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 254 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 281 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 293 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 350 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 358 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 32 void ARCInstrInfo::anchor() {} 34 ARCInstrInfo::ARCInstrInfo() 56 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, 75 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, 158 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, 242 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, 269 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 281 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 338 bool ARCInstrInfo::reverseBranchCondition( 346 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, [all …]
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H A D | ARC.td | 13 include "ARCInstrInfo.td" 16 def ARCInstrInfo : InstrInfo; 24 let InstructionSet = ARCInstrInfo;
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARC/ |
H A D | ARCInstrInfo.cpp | 32 void ARCInstrInfo::anchor() {} in anchor() 34 ARCInstrInfo::ARCInstrInfo() in ARCInstrInfo() function in ARCInstrInfo 56 unsigned ARCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot() 75 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() 158 bool ARCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch() 242 unsigned ARCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch() 269 void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg() 281 void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot() 338 bool ARCInstrInfo::reverseBranchCondition( in reverseBranchCondition() 346 ARCInstrInfo::loadImmediate(MachineBasicBlock &MBB, in loadImmediate() [all …]
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H A D | ARC.td | 13 include "ARCInstrInfo.td" 16 def ARCInstrInfo : InstrInfo; 24 let InstructionSet = ARCInstrInfo;
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