Home
last modified time | relevance | path

Searched refs:ARM_SMMU_GR0_sGFSR (Results 1 – 17 of 17) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c120 ARM_SMMU_GR0_sGFSR; in nvidia_smmu_reset()
137 gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
151 writel_relaxed(gfsr, gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
H A Darm-smmu-impl.c18 case ARM_SMMU_GR0_sGFSR: in arm_smmu_gr0_ns()
H A Darm-smmu.c435 gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_global_fault()
457 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); in arm_smmu_global_fault()
1589 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_device_reset()
1590 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); in arm_smmu_device_reset()
H A Darm-smmu.h83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c120 ARM_SMMU_GR0_sGFSR; in nvidia_smmu_reset()
137 gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
151 writel_relaxed(gfsr, gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
H A Darm-smmu-impl.c18 case ARM_SMMU_GR0_sGFSR: in arm_smmu_gr0_ns()
H A Darm-smmu.c435 gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_global_fault()
457 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); in arm_smmu_global_fault()
1589 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_device_reset()
1590 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); in arm_smmu_device_reset()
H A Darm-smmu.h83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c120 ARM_SMMU_GR0_sGFSR; in nvidia_smmu_reset()
137 gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
151 writel_relaxed(gfsr, gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
H A Darm-smmu-impl.c18 case ARM_SMMU_GR0_sGFSR: in arm_smmu_gr0_ns()
H A Darm-smmu.c435 gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_global_fault()
457 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); in arm_smmu_global_fault()
1589 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_device_reset()
1590 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); in arm_smmu_device_reset()
H A Darm-smmu.h83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/brcm/board/stingray/src/
H A Diommu.c83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/brcm/board/stingray/src/
H A Diommu.c83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/brcm/board/stingray/src/
H A Diommu.c83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/brcm/board/stingray/src/
H A Diommu.c83 #define ARM_SMMU_GR0_sGFSR 0x48 macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/brcm/board/stingray/src/
H A Diommu.c83 #define ARM_SMMU_GR0_sGFSR 0x48 macro