Searched refs:AR_BCR (Results 1 – 3 of 3) sorted by relevance
| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/isc/atheros_hal/dist/ar5210/ |
| H A D | ar5210_reset.c | 130 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG); in ar5210Reset()
135 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG | AR_BCR_BCMD); in ar5210Reset()
140 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG); in ar5210Reset()
145 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG); in ar5210Reset()
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| H A D | ar5210_xmit.c | 382 OS_REG_WRITE(ah, AR_BCR, in ar5210StartTxDma()
387 OS_REG_WRITE(ah, AR_BCR, AR_BCR_TQ1V | AR_BCR_BDMAE); in ar5210StartTxDma()
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| H A D | ar5210reg.h | 42 #define AR_BCR 0x0028 /* Beacon control register */ macro
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