AR_CHAN1_BASE (reference) in projects: dports

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Searched refs:AR_CHAN1_BASE (Results 1 – 11 of 11) sorted by relevance

/dports/emulators/qemu60/qemu-6.0.0/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/net/ipxe/ipxe-2265a65/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/emulators/qemu/qemu-6.2.0/roms/ipxe/src/drivers/net/ath/ath9k/
H A D	ar9003_phy.h	800 #define AR_CHAN1_BASE 0xa800 macro 802 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 803 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 804 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 806 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 807 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 808 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 986 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 996 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1101 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/wireless/ath/ath9k/
H A D	ar9003_phy.h	928 #define AR_CHAN1_BASE 0xa800 macro 930 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 931 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 932 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 934 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 935 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 936 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 1130 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 1140 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1244 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/wireless/ath/ath9k/
H A D	ar9003_phy.h	928 #define AR_CHAN1_BASE 0xa800 macro 930 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 931 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 932 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 934 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 935 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 936 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 1130 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 1140 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1244 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/wireless/ath/ath9k/
H A D	ar9003_phy.h	928 #define AR_CHAN1_BASE 0xa800 macro 930 #define AR_PHY_EXT_CCA_1 (AR_CHAN1_BASE + 0x30) 931 #define AR_PHY_TX_PHASE_RAMP_1 (AR_CHAN1_BASE + 0xd0) 932 #define AR_PHY_ADC_GAIN_DC_CORR_1 (AR_CHAN1_BASE + 0xd4) 934 #define AR_PHY_SPUR_REPORT_1 (AR_CHAN1_BASE + 0xa8) 935 #define AR_PHY_CHAN_INFO_TAB_1 (AR_CHAN1_BASE + 0x300) 936 #define AR_PHY_RX_IQCAL_CORR_B1 (AR_CHAN1_BASE + 0xdc) 1130 #define AR_PHY_PAPRD_CTRL0_B1 (AR_CHAN1_BASE + 0xf0) 1140 #define AR_PHY_PAPRD_CTRL1_B1 (AR_CHAN1_BASE + 0xf4) 1244 #define AR_PHY_PAPRD_MEM_TAB_B1 (AR_CHAN1_BASE + 0x120) [all …]