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Searched refs:AZX_REG_VS_D0I3C_CIP (Results 1 – 6 of 6) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/intel/skylake/
H A Dskl.h33 #define AZX_REG_VS_D0I3C_CIP 0x1 /* Command in progress */ macro
H A Dskl.c156 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) { in skl_update_d0i3c()
177 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) { in skl_update_d0i3c()
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/intel/skylake/
H A Dskl.h33 #define AZX_REG_VS_D0I3C_CIP 0x1 /* Command in progress */ macro
H A Dskl.c156 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) { in skl_update_d0i3c()
177 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) { in skl_update_d0i3c()
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/intel/skylake/
H A Dskl.h33 #define AZX_REG_VS_D0I3C_CIP 0x1 /* Command in progress */ macro
H A Dskl.c156 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) { in skl_update_d0i3c()
177 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) { in skl_update_d0i3c()