/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 72 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 85 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 136 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 433 MachineInstr *AndN2 = in emitLoop() local 443 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 72 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 85 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 136 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 433 MachineInstr *AndN2 = in emitLoop() local 443 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 72 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 86 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 137 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 440 MachineInstr *AndN2 = in emitLoop() local 451 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 70 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 84 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 135 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 424 MachineInstr *AndN2 = in emitLoop() local 435 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 70 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 84 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 135 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 84 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 98 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 149 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 403 MachineInstr *AndN2 = in emitLoop() local 414 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 84 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 98 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 149 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 403 MachineInstr *AndN2 = in emitLoop() local 414 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 84 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 98 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 149 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 403 MachineInstr *AndN2 = in emitLoop() local 414 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 84 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 98 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 149 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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H A D | SILowerControlFlow.cpp | 406 MachineInstr *AndN2 = in emitLoop() local 417 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 84 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 98 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 149 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 84 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch() local 98 (A->getOpcode() != And && A->getOpcode() != AndN2)) in optimizeVccBranch() 149 if (A->getOpcode() == AndN2) in optimizeVccBranch()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 375 MachineInstr *AndN2 = in emitLoop() local 385 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 384 MachineInstr *AndN2 = in emitLoop() local 394 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 396 MachineInstr *AndN2 = in emitLoop() local 406 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 402 MachineInstr *AndN2 = in emitLoop() local 412 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 402 MachineInstr *AndN2 = in emitLoop() local 412 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 402 MachineInstr *AndN2 = in emitLoop() local 412 LIS->ReplaceMachineInstrInMaps(MI, *AndN2); in emitLoop()
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