/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 270 unsigned AndResult = createResultReg(X86::GR8RegisterClass); in X86FastEmitStore() local 272 TII.get(X86::AND8ri), AndResult).addReg(Val).addImm(1); in X86FastEmitStore() 273 Val = AndResult; in X86FastEmitStore() 1758 unsigned AndResult = createResultReg(X86::GR8RegisterClass); in X86SelectCall() local 1760 TII.get(X86::AND8ri), AndResult).addReg(ResultReg).addImm(1); in X86SelectCall() 1761 ResultReg = AndResult; in X86SelectCall()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 712 unsigned AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 713 I.getOperand(0).setReg(AndResult); in select() 719 .addUse(AndResult) in select()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 770 unsigned AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 771 I.getOperand(0).setReg(AndResult); in select() 777 .addUse(AndResult) in select()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 883 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 884 I.getOperand(0).setReg(AndResult); in select() 890 .addUse(AndResult) in select()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 883 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 884 I.getOperand(0).setReg(AndResult); in select() 890 .addUse(AndResult) in select()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 881 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 882 I.getOperand(0).setReg(AndResult); in select() 888 .addUse(AndResult) in select()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 880 unsigned AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 881 I.getOperand(0).setReg(AndResult); in select() 887 .addUse(AndResult) in select()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 883 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 884 I.getOperand(0).setReg(AndResult); in select() 890 .addUse(AndResult) in select()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 883 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 884 I.getOperand(0).setReg(AndResult); in select() 890 .addUse(AndResult) in select()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 883 Register AndResult = MRI.createVirtualRegister(&ARM::GPRRegClass); in select() local 884 I.getOperand(0).setReg(AndResult); in select() 890 .addUse(AndResult) in select()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 500 Register AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 502 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 504 ValReg = AndResult; in X86FastEmitStore()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 501 unsigned AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 503 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 505 ValReg = AndResult; in X86FastEmitStore()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 504 Register AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 506 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 508 ValReg = AndResult; in X86FastEmitStore()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 500 Register AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 502 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 504 ValReg = AndResult; in X86FastEmitStore()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/X86/ |
H A D | X86FastISel.cpp | 501 unsigned AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 503 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 505 ValReg = AndResult; in X86FastEmitStore()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/ |
H A D | X86FastISel.cpp | 504 Register AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 506 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 508 ValReg = AndResult; in X86FastEmitStore()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 508 Register AndResult = createResultReg(&X86::GR8RegClass); in X86FastEmitStore() local 510 TII.get(X86::AND8ri), AndResult) in X86FastEmitStore() 512 ValReg = AndResult; in X86FastEmitStore()
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