| /dports/www/grafana8/grafana-8.3.6/vendor/cuelang.org/go/cue/testdata/export/ |
| H A D | 029.txtar | 11 #Ands: #And & {
21 #Ands: #And & {
43 #Ands: (〈0;#And〉 & {
60 #Ands: (#struct){
|
| /dports/lang/erlang-runtime22/otp-OTP-22.3.4.24/lib/hipe/rtl/ |
| H A D | hipe_tagscheme.erl | 486 {Reg, Ands} = test_fixnums_1(Args, []),
487 Ands ++ [test_fixnum(Reg, TrueLab, FalseLab, Pred)].
|
| /dports/lang/erlang-runtime23/otp-OTP-23.3.4.10/lib/hipe/rtl/ |
| H A D | hipe_tagscheme.erl | 486 {Reg, Ands} = test_fixnums_1(Args, []),
487 Ands ++ [test_fixnum(Reg, TrueLab, FalseLab, Pred)].
|
| /dports/lang/erlang-runtime21/otp-OTP-21.3.8.24/lib/hipe/rtl/ |
| H A D | hipe_tagscheme.erl | 486 {Reg, Ands} = test_fixnums_1(Args, []),
487 Ands ++ [test_fixnum(Reg, TrueLab, FalseLab, Pred)].
|
| /dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 283 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
292 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 283 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
292 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/mail/thunderbird/thunderbird-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 283 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
292 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/www/firefox-legacy/firefox-52.8.0esr/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 298 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
307 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/lang/spidermonkey60/firefox-60.9.0/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 298 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
307 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/lang/spidermonkey78/firefox-78.9.0/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 283 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
292 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/mozjs-45/extract/js/src/jit/arm64/vixl/ |
| H A D | MacroAssembler-vixl.cpp | 296 void MacroAssembler::Ands(const Register& rd, in Ands() function in vixl::MacroAssembler
305 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst()
|
| /dports/lang/racket/racket-8.3/share/pkgs/typed-racket-lib/typed-racket/types/ |
| H A D | prop-ops.rkt | 406 ;; Ands the given proposition to the props in the tc-results.
|
| /dports/lang/racket/racket-8.3/collects/racket/match/ |
| H A D | compiler.rkt | 317 ;; we only handle 1-row Ands
|
| /dports/lang/racket-minimal/racket-8.3/collects/racket/match/ |
| H A D | compiler.rkt | 317 ;; we only handle 1-row Ands
|
| /dports/textproc/link-grammar/link-grammar-5.8.0/data/ar/words/ |
| H A D | words.PV_V | 198 Ands.PVV
|
| /dports/lang/lfe/lfe-1.3/src/ |
| H A D | lfe_codegen.erl | 1074 Ands = fun guard_ands/4,
1075 simple_seq(Gas, Ands, Env, Line, St1).
|
| /dports/www/node10/node-v10.24.1/deps/v8/src/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 45 void TurboAssembler::Ands(const Register& rd, const Register& rn, in Ands() function
|
| /dports/www/node10/node-v10.24.1/deps/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 989 __ Ands(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1004 __ Ands(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
|
| /dports/lang/v8/v8-9.6.180.12/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 31 void TurboAssembler::Ands(const Register& rd, const Register& rn, in Ands() function
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 31 void TurboAssembler::Ands(const Register& rd, const Register& rn, in Ands() function
|
| H A D | macro-assembler-arm64.h | 680 inline void Ands(const Register& rd, const Register& rn,
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 31 void TurboAssembler::Ands(const Register& rd, const Register& rn, in Ands() function
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 1078 __ Ands(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1093 __ Ands(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 1106 __ Ands(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1121 __ Ands(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
|
| /dports/lang/v8/v8-9.6.180.12/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 1124 __ Ands(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1139 __ Ands(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
|