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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
52 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
64 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
73 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
77 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
87 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
52 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
64 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
73 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
77 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
87 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
48 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
51 ; NOLOOP-DAG: v_mov_b32_e32 v0, s[[BAR_NUM]]
63 ; NOLOOP-DAG: v_mov_b32_e32 v0, s[[BAR_NUM]]
72 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
76 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
86 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
H A Dllvm.amdgcn.ds.gws.barrier.ll9 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; NOLOOP: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
39 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
42 ; NOLOOP-DAG: v_mov_b32_e32 v0, s[[BAR_NUM]]
54 ; NOLOOP-DAG: v_mov_b32_e32 v0, s[[BAR_NUM]]
63 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
67 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
77 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.gws.init.ll9 ; GCN-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
11 ; GCN: v_mov_b32_e32 v0, [[BAR_NUM]]
28 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
30 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
49 ; NOLOOP-DAG: s_load_dwordx2 s{{\[}}[[BAR_NUM:[0-9]+]]:[[OFFSET:[0-9]+]]{{\]}}
56 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
72 ; NOLOOP-DAG: v_mov_b32_e32 [[GWS_VAL:v[0-9]+]], s[[BAR_NUM]]
81 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
89 ; NOLOOP-DAG: v_mov_b32_e32 v0, [[BAR_NUM]]
99 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pci/
H A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()

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