/dports/multimedia/libva-intel-driver/intel-vaapi-driver-2.4.1/src/ |
H A D | i965_media.c | 83 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 84 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 90 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 93 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 94 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 95 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 96 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 101 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 102 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() 111 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_media_state_base_address() [all …]
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H A D | i965_avc_ildb.c | 432 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 433 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 434 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 435 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 436 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 437 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 438 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 443 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 444 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() 445 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_ildb_state_base_address() [all …]
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H A D | i965_avc_hw_scoreboard.c | 238 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address() 239 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address() 240 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address() 241 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address() 242 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address() 243 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address() 244 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_avc_hw_scoreboard_state_base_address()
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H A D | i965_gpe_utils.c | 1001 0, BASE_ADDRESS_MODIFY); in gen8_gpe_state_base_address() 1003 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen8_gpe_state_base_address() 1012 0, BASE_ADDRESS_MODIFY); in gen8_gpe_state_base_address() 1014 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen8_gpe_state_base_address() 1023 0, BASE_ADDRESS_MODIFY); in gen8_gpe_state_base_address() 1025 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen8_gpe_state_base_address() 1290 BASE_ADDRESS_MODIFY | (i965->intel.mocs_state << 4)); in gen9_gpe_state_base_address() 1292 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_gpe_state_base_address() 1303 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_gpe_state_base_address() 1314 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_gpe_state_base_address() [all …]
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H A D | i965_render.c | 1257 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1259 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1260 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1261 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1262 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1263 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1268 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1270 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1271 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() 1272 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in i965_render_state_base_address() [all …]
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H A D | gen9_post_processing.c | 403 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 407 …t->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen9_pp_state_base_address() 410 0, 0 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 413 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 417 …OC64(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 419 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 420 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 421 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 422 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address() 425 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_pp_state_base_address()
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H A D | gen9_render.c | 832 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ in gen9_emit_state_base_address() 836 …wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen9_emit_state_base_address() 842 0, BASE_ADDRESS_MODIFY); in gen9_emit_state_base_address() 846 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ in gen9_emit_state_base_address() 851 …OC(batch, render_state->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen9_emit_state_base_address() 855 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* General state upper bound */ in gen9_emit_state_base_address() 856 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ in gen9_emit_state_base_address() 857 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ in gen9_emit_state_base_address() 858 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ in gen9_emit_state_base_address() 861 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_emit_state_base_address()
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H A D | gen8_render.c | 827 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ in gen8_emit_state_base_address() 831 …wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen8_emit_state_base_address() 837 0, BASE_ADDRESS_MODIFY); in gen8_emit_state_base_address() 841 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ in gen8_emit_state_base_address() 846 …OC(batch, render_state->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen8_emit_state_base_address() 850 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* General state upper bound */ in gen8_emit_state_base_address() 851 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ in gen8_emit_state_base_address() 852 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ in gen8_emit_state_base_address() 853 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ in gen8_emit_state_base_address()
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H A D | gen8_post_processing.c | 1332 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1337 …t->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen8_pp_state_base_address() 1341 0, 0 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1344 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1348 …OC64(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1350 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1351 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1352 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address() 1353 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); in gen8_pp_state_base_address()
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/dports/multimedia/libva-intel-hybrid-driver/intel-hybrid-driver-1.0.2/src/ |
H A D | media_drv_hwcmds_g8.c | 189 OUT_BATCH (batch, 0 | BASE_ADDRESS_MODIFY); //General State Base Address in mediadrv_gen_state_base_address_cmd_g8() 195 … (batch, params->surface_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in mediadrv_gen_state_base_address_cmd_g8() 208 0, BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd_g8() 220 I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd_g8() 232 I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd_g8() 237 OUT_BATCH (batch, 0 | BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd_g8() 241 OUT_BATCH (batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //General State Access Upper Bound in mediadrv_gen_state_base_address_cmd_g8() 242 OUT_BATCH (batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Dynamic State Access Upper Bound in mediadrv_gen_state_base_address_cmd_g8() 243 OUT_BATCH (batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Indirect Object Access Upper Bound in mediadrv_gen_state_base_address_cmd_g8() 244 OUT_BATCH (batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Instruction Access Upper Bound in mediadrv_gen_state_base_address_cmd_g8()
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H A D | media_drv_hwcmds.c | 111 …OUT_RELOC (batch, params->surface_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); … in mediadrv_gen_state_base_address_cmd() 119 0, BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd() 125 I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd() 131 I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd() 133 OUT_BATCH (batch, 0 | BASE_ADDRESS_MODIFY); in mediadrv_gen_state_base_address_cmd() 136 OUT_BATCH (batch,0xFFFFF000 | BASE_ADDRESS_MODIFY); //Dynamic State Access Upper Bound in mediadrv_gen_state_base_address_cmd() 138 OUT_BATCH (batch,0xFFFFF000 | BASE_ADDRESS_MODIFY); //Instruction Access Upper Bound in mediadrv_gen_state_base_address_cmd()
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H A D | media_drv_gen75_render.c | 732 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ in gen7_emit_state_base_address() 733 …wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen7_emit_state_base_address() 734 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic state base address */ in gen7_emit_state_base_address() 735 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ in gen7_emit_state_base_address() 736 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction base address */ in gen7_emit_state_base_address() 737 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state upper bound */ in gen7_emit_state_base_address() 738 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ in gen7_emit_state_base_address() 739 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ in gen7_emit_state_base_address() 740 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ in gen7_emit_state_base_address()
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H A D | media_drv_gen9_render.c | 858 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ in gen9_emit_state_base_address() 862 …wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen9_emit_state_base_address() 868 0, BASE_ADDRESS_MODIFY); in gen9_emit_state_base_address() 872 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ in gen9_emit_state_base_address() 877 …OC(batch, render_state->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen9_emit_state_base_address() 881 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* General state upper bound */ in gen9_emit_state_base_address() 882 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ in gen9_emit_state_base_address() 883 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ in gen9_emit_state_base_address() 884 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ in gen9_emit_state_base_address() 887 OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); in gen9_emit_state_base_address()
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H A D | media_drv_gen8_render.c | 819 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ in gen8_emit_state_base_address() 823 …wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surfac… in gen8_emit_state_base_address() 829 0, BASE_ADDRESS_MODIFY); in gen8_emit_state_base_address() 833 OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ in gen8_emit_state_base_address() 838 …OC(batch, render_state->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen8_emit_state_base_address() 842 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* General state upper bound */ in gen8_emit_state_base_address() 843 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ in gen8_emit_state_base_address() 844 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ in gen8_emit_state_base_address() 845 OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ in gen8_emit_state_base_address()
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H A D | media_drv_hwcmds.h | 68 #define BASE_ADDRESS_MODIFY (1 << 0) macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/gt/ |
H A D | gen7_renderclear.c | 241 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 243 *cs++ = (batch_addr(batch) + surface_state_base) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 245 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 247 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 249 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 253 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 255 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
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H A D | intel_gpu_commands.h | 296 #define BASE_ADDRESS_MODIFY REG_BIT(0) macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/i915/gt/ |
H A D | gen7_renderclear.c | 241 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 243 *cs++ = (batch_addr(batch) + surface_state_base) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 245 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 247 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 249 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 253 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 255 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
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H A D | intel_gpu_commands.h | 296 #define BASE_ADDRESS_MODIFY REG_BIT(0) macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/gt/ |
H A D | gen7_renderclear.c | 241 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 243 *cs++ = (batch_addr(batch) + surface_state_base) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 245 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 247 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 249 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 253 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address() 255 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
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H A D | intel_gpu_commands.h | 296 #define BASE_ADDRESS_MODIFY REG_BIT(0) macro
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/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/ |
H A D | i965_video.c | 920 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_video_setup() 922 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_video_setup() 924 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_video_setup() 931 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_video_setup() 933 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_video_setup() 1488 OUT_BATCH(BASE_ADDRESS_MODIFY); /* General state base address */ in gen6_upload_state_base_address() 1490 OUT_BATCH(BASE_ADDRESS_MODIFY); /* Dynamic state base address */ in gen6_upload_state_base_address() 1492 OUT_BATCH(BASE_ADDRESS_MODIFY); /* Instruction base address */ in gen6_upload_state_base_address() 1493 OUT_BATCH(BASE_ADDRESS_MODIFY); /* General state upper bound */ in gen6_upload_state_base_address() 1494 OUT_BATCH(BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ in gen6_upload_state_base_address() [all …]
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H A D | i965_render.c | 1597 intel->surface_bo->offset | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1601 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1603 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1605 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1611 intel->surface_bo->offset | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1614 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1616 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in i965_emit_composite_state() 1777 intel->surface_bo, BASE_ADDRESS_MODIFY, in i965_surface_flush() 2582 intel->surface_bo->offset | BASE_ADDRESS_MODIFY); in gen6_composite_state_base_address() 2585 OUT_BATCH(BASE_ADDRESS_MODIFY); /* Instruction base address */ in gen6_composite_state_base_address() [all …]
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/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/xvmc/ |
H A D | xvmc_vld.c | 831 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 832 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 833 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 834 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 835 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 836 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 837 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 842 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 843 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 844 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() [all …]
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H A D | i965_xvmc.c | 463 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 464 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 465 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 466 OUT_BATCH(0 | BASE_ADDRESS_MODIFY); in state_base_address() 467 OUT_BATCH(0xFFFFF000 | BASE_ADDRESS_MODIFY); in state_base_address()
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