/dports/security/py-pyvex/pyvex-9.0.5405/vex/priv/ |
H A D | host_arm_defs.c | 4228 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4232 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4236 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4240 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4265 regD, BITS4(0,F,0,1), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4292 regD, BITS4(0,0,0,1), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4296 regD, BITS4(0,0,0,0), BITS4(1,Q,M,0), regM); in emit_ARMInstr() 4300 regD, BITS4(0,0,0,0), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4781 insn = XXXXXXXX(0xF, BITS4(0,0,1,j), BITS4(1,D,0,0), imm3, regD, in emit_ARMInstr() 4800 vM, vD, BITS4(0,0,0,1), BITS4(M,1,M,1), vM); in emit_ARMInstr() [all …]
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H A D | guest_arm_toIR.c | 5362 if ((INSN(11,8) & BITS4(1,0,1,0)) == BITS4(0,0,0,0)) { in dis_neon_data_2reg_and_scalar() 5468 if ((INSN(11,8) & BITS4(1,0,1,1)) == BITS4(0,0,1,0)) { in dis_neon_data_2reg_and_scalar() 5599 if ((INSN(11,8) & BITS4(1,1,1,0)) == BITS4(1,0,0,0)) { in dis_neon_data_2reg_and_scalar() 14788 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) { in decode_CP10_CP11_instruction() 14836 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) { in decode_CP10_CP11_instruction() 15504 && BITS4(1,0,1,0) == (INSN(11,8) & BITS4(1,1,1,0)) in decode_CP10_CP11_instruction() 16619 if ((INSN(27,24) & BITS4(1,1,0,0)) != BITS4(0,1,0,0)) in disInstr_ARM_WRK() 16846 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0)) in disInstr_ARM_WRK() 16850 if ((INSN(7,4) & BITS4(1,0,0,1)) != BITS4(1,0,0,1)) in disInstr_ARM_WRK() 17980 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0)) in disInstr_ARM_WRK() [all …]
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H A D | guest_arm64_toIR.c | 10494 if (opcode == BITS4(1,1,0,0) || opcode == BITS4(1,1,0,1)) { 11051 if (opcode == BITS4(0,0,0,0) || opcode == BITS4(0,0,1,0)) { 11077 if (opcode == BITS4(0,0,0,1) || opcode == BITS4(0,0,1,1)) { 14418 case BITS4(1,0,0,0): case BITS4(1,0,0,1): 14422 case BITS4(1,0,1,0): case BITS4(1,0,1,1): 14426 case BITS4(0,1,0,0): case BITS4(0,1,1,0): 14427 case BITS4(1,1,0,0): case BITS4(1,1,1,0): 14431 case BITS4(0,1,0,1): case BITS4(1,1,0,1): 14435 case BITS4(0,1,1,1): case BITS4(1,1,1,1): 14439 case BITS4(0,0,0,0): case BITS4(0,0,0,1): [all …]
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/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/VEX/priv/ |
H A D | host_arm_defs.c | 4228 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4232 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4236 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4240 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4265 regD, BITS4(0,F,0,1), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4292 regD, BITS4(0,0,0,1), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4296 regD, BITS4(0,0,0,0), BITS4(1,Q,M,0), regM); in emit_ARMInstr() 4300 regD, BITS4(0,0,0,0), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4781 insn = XXXXXXXX(0xF, BITS4(0,0,1,j), BITS4(1,D,0,0), imm3, regD, in emit_ARMInstr() 4800 vM, vD, BITS4(0,0,0,1), BITS4(M,1,M,1), vM); in emit_ARMInstr() [all …]
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H A D | guest_arm_toIR.c | 5320 if ((INSN(11,8) & BITS4(1,0,1,0)) == BITS4(0,0,0,0)) { in dis_neon_data_2reg_and_scalar() 5426 if ((INSN(11,8) & BITS4(1,0,1,1)) == BITS4(0,0,1,0)) { in dis_neon_data_2reg_and_scalar() 5557 if ((INSN(11,8) & BITS4(1,1,1,0)) == BITS4(1,0,0,0)) { in dis_neon_data_2reg_and_scalar() 14719 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) { in decode_CP10_CP11_instruction() 14767 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) { in decode_CP10_CP11_instruction() 15435 && BITS4(1,0,1,0) == (INSN(11,8) & BITS4(1,1,1,0)) in decode_CP10_CP11_instruction() 16550 if ((INSN(27,24) & BITS4(1,1,0,0)) != BITS4(0,1,0,0)) in disInstr_ARM_WRK() 16777 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0)) in disInstr_ARM_WRK() 16781 if ((INSN(7,4) & BITS4(1,0,0,1)) != BITS4(1,0,0,1)) in disInstr_ARM_WRK() 17901 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0)) in disInstr_ARM_WRK() [all …]
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H A D | guest_arm64_toIR.c | 10651 if (opcode == BITS4(1,1,0,0) || opcode == BITS4(1,1,0,1)) { in dis_AdvSIMD_scalar_x_indexed_element() 11208 if (opcode == BITS4(0,0,0,0) || opcode == BITS4(0,0,1,0)) { in dis_AdvSIMD_three_different() 11234 if (opcode == BITS4(0,0,0,1) || opcode == BITS4(0,0,1,1)) { in dis_AdvSIMD_three_different() 14575 case BITS4(1,0,0,0): case BITS4(1,0,0,1): in disInstr_ARM64_WRK() 14579 case BITS4(1,0,1,0): case BITS4(1,0,1,1): in disInstr_ARM64_WRK() 14583 case BITS4(0,1,0,0): case BITS4(0,1,1,0): in disInstr_ARM64_WRK() 14584 case BITS4(1,1,0,0): case BITS4(1,1,1,0): in disInstr_ARM64_WRK() 14588 case BITS4(0,1,0,1): case BITS4(1,1,0,1): in disInstr_ARM64_WRK() 14592 case BITS4(0,1,1,1): case BITS4(1,1,1,1): in disInstr_ARM64_WRK() 14596 case BITS4(0,0,0,0): case BITS4(0,0,0,1): in disInstr_ARM64_WRK() [all …]
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/dports/devel/valgrind/valgrind-dragonfly-dragonfly/VEX/priv/ |
H A D | host_arm_defs.c | 4228 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4232 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4236 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4240 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4265 regD, BITS4(0,F,0,1), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4292 regD, BITS4(0,0,0,1), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4296 regD, BITS4(0,0,0,0), BITS4(1,Q,M,0), regM); in emit_ARMInstr() 4300 regD, BITS4(0,0,0,0), BITS4(0,Q,M,0), regM); in emit_ARMInstr() 4781 insn = XXXXXXXX(0xF, BITS4(0,0,1,j), BITS4(1,D,0,0), imm3, regD, in emit_ARMInstr() 4800 vM, vD, BITS4(0,0,0,1), BITS4(M,1,M,1), vM); in emit_ARMInstr() [all …]
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H A D | guest_arm_toIR.c | 5320 if ((INSN(11,8) & BITS4(1,0,1,0)) == BITS4(0,0,0,0)) { in dis_neon_data_2reg_and_scalar() 5426 if ((INSN(11,8) & BITS4(1,0,1,1)) == BITS4(0,0,1,0)) { in dis_neon_data_2reg_and_scalar() 5557 if ((INSN(11,8) & BITS4(1,1,1,0)) == BITS4(1,0,0,0)) { in dis_neon_data_2reg_and_scalar() 14719 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) { in decode_CP10_CP11_instruction() 14767 if ((opc & BITS4(1,0,0,0)) == BITS4(1,0,0,0)) { in decode_CP10_CP11_instruction() 15435 && BITS4(1,0,1,0) == (INSN(11,8) & BITS4(1,1,1,0)) in decode_CP10_CP11_instruction() 16550 if ((INSN(27,24) & BITS4(1,1,0,0)) != BITS4(0,1,0,0)) in disInstr_ARM_WRK() 16777 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0)) in disInstr_ARM_WRK() 16781 if ((INSN(7,4) & BITS4(1,0,0,1)) != BITS4(1,0,0,1)) in disInstr_ARM_WRK() 17901 if ((INSN(27,24) & BITS4(1,1,1,0)) != BITS4(0,0,0,0)) in disInstr_ARM_WRK() [all …]
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H A D | guest_arm64_toIR.c | 10651 if (opcode == BITS4(1,1,0,0) || opcode == BITS4(1,1,0,1)) { in dis_AdvSIMD_scalar_x_indexed_element() 11208 if (opcode == BITS4(0,0,0,0) || opcode == BITS4(0,0,1,0)) { in dis_AdvSIMD_three_different() 11234 if (opcode == BITS4(0,0,0,1) || opcode == BITS4(0,0,1,1)) { in dis_AdvSIMD_three_different() 14575 case BITS4(1,0,0,0): case BITS4(1,0,0,1): in disInstr_ARM64_WRK() 14579 case BITS4(1,0,1,0): case BITS4(1,0,1,1): in disInstr_ARM64_WRK() 14583 case BITS4(0,1,0,0): case BITS4(0,1,1,0): in disInstr_ARM64_WRK() 14584 case BITS4(1,1,0,0): case BITS4(1,1,1,0): in disInstr_ARM64_WRK() 14588 case BITS4(0,1,0,1): case BITS4(1,1,0,1): in disInstr_ARM64_WRK() 14592 case BITS4(0,1,1,1): case BITS4(1,1,1,1): in disInstr_ARM64_WRK() 14596 case BITS4(0,0,0,0): case BITS4(0,0,0,1): in disInstr_ARM64_WRK() [all …]
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/dports/net/tigervnc-server/tigervnc-1.12.0/unix/xserver/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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H A D | fbbits.h | 486 #ifdef BITS4 487 #define WRITE4(d,n,fg) WRITE((BITS4 *) &((d)[WRITE_ADDR4(n)]), (BITS4) (fg))
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/dports/x11-servers/xephyr/xorg-server-1.20.13/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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/dports/x11-servers/xwayland-devel/xorg-xserver-xorg-server-21.0.99.1-177-g9e5a37961/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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H A D | fbbits.h | 486 #ifdef BITS4 487 #define WRITE4(d,n,fg) WRITE((BITS4 *) &((d)[WRITE_ADDR4(n)]), (BITS4) (fg))
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/dports/x11-servers/xwayland/xorg-server-1.20.13/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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/dports/x11-servers/xorg-vfbserver/xorg-server-1.20.13/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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H A D | fbbits.h | 486 #ifdef BITS4 487 #define WRITE4(d,n,fg) WRITE((BITS4 *) &((d)[WRITE_ADDR4(n)]), (BITS4) (fg))
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/dports/x11-servers/xorg-dmx/xorg-server-1.20.13/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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/dports/x11-servers/xorg-server/xorg-server-1.20.13/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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/dports/x11-servers/xarcan/xarcan-0.6.0/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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/dports/x11-servers/xorg-nestserver/xorg-server-1.20.13/fb/ |
H A D | fbbits.c | 38 #undef BITS4 49 #define BITS4 CARD32 macro 62 #undef BITS4
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/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/sna/fb/ |
H A D | fbglyphbits.h | 39 #ifdef BITS4 40 #define WRITE4(d,n,fg) WRITE((BITS4 *) &((d)[WRITE_ADDR4(n)]), (BITS4) (fg))
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H A D | fbarc.c | 32 #define BITS4 CARD32 macro 36 #undef BITS4
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H A D | fbline.c | 34 #define BITS4 CARD32 macro 38 #undef BITS4
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H A D | fbglyph.c | 31 #define BITS4 CARD32 macro 35 #undef BITS4
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