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Searched refs:BRCM_DRAM1_BASE (Results 1 – 10 of 10) sorted by relevance

/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/include/plat/brcm/common/
H A Dbrcm_def.h35 #define BRCM_SCP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
40 #define BRCM_AP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
46 #define BRCM_NS_DRAM1_BASE BRCM_DRAM1_BASE
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/include/plat/brcm/common/
H A Dbrcm_def.h35 #define BRCM_SCP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
40 #define BRCM_AP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
46 #define BRCM_NS_DRAM1_BASE BRCM_DRAM1_BASE
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/include/plat/brcm/common/
H A Dbrcm_def.h35 #define BRCM_SCP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
40 #define BRCM_AP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
46 #define BRCM_NS_DRAM1_BASE BRCM_DRAM1_BASE
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/include/plat/brcm/common/
H A Dbrcm_def.h35 #define BRCM_SCP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
40 #define BRCM_AP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
46 #define BRCM_NS_DRAM1_BASE BRCM_DRAM1_BASE
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/include/plat/brcm/common/
H A Dbrcm_def.h35 #define BRCM_SCP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
40 #define BRCM_AP_TZC_DRAM1_BASE (BRCM_DRAM1_BASE + \
46 #define BRCM_NS_DRAM1_BASE BRCM_DRAM1_BASE
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dsr_def.h488 #define BRCM_DRAM1_BASE ULL(0x80000000) macro
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dsr_def.h488 #define BRCM_DRAM1_BASE ULL(0x80000000) macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dsr_def.h488 #define BRCM_DRAM1_BASE ULL(0x80000000) macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dsr_def.h488 #define BRCM_DRAM1_BASE ULL(0x80000000) macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dsr_def.h488 #define BRCM_DRAM1_BASE ULL(0x80000000) macro