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Searched refs:C22_START2 (Results 1 – 3 of 3) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/control/
H A Dmdio_master.v66 C22_START2 = 34, constant
408 state <= C22_START2;
411 C22_START2: begin
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/
H A Dmdio.v79 C22_START2 = 34, constant
468 state <= C22_START2;
473 C22_START2: begin
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge/rtl/verilog/
H A Dwishbone_if.v129 C22_START2 = 34, constant
646 state <= C22_START2;
651 C22_START2: begin