Searched refs:CLK_CFG_0 (Results 1 – 3 of 3) sorted by relevance
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 40 #define CLK_CFG_0 0x40 macro
368 CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR,
371 CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR,
373 MUX_GATE_CLR_SET_UPD(CLK_TOP_MM_SEL, "mm_sel", mm_parents, CLK_CFG_0,
376 MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, CLK_CFG_0,
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 40 #define CLK_CFG_0 0x40 macro
368 CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR,
371 CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR,
373 MUX_GATE_CLR_SET_UPD(CLK_TOP_MM_SEL, "mm_sel", mm_parents, CLK_CFG_0,
376 MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, CLK_CFG_0,
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 40 #define CLK_CFG_0 0x40 macro
368 CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR,
371 CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR,
373 MUX_GATE_CLR_SET_UPD(CLK_TOP_MM_SEL, "mm_sel", mm_parents, CLK_CFG_0,
376 MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, CLK_CFG_0,
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