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Searched refs:CLK_EMMC_DIV_CON_MASK (Results 1 – 25 of 124) sorted by relevance

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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c160 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
457 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
492 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
497 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c160 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
457 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
492 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
497 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c160 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
457 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
492 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
497 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c160 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
457 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
492 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
497 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3328.c165 CLK_EMMC_DIV_CON_MASK = 0xff << CLK_EMMC_DIV_CON_SHIFT, enumerator
464 div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT; in rk3328_mmc_get_clk()
499 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()
504 CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, in rk3328_mmc_set_clk()

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