| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8516.dtsi | 57 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
70 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
83 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
96 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8516.dtsi | 57 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
70 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
83 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
96 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8516.dtsi | 57 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
70 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
83 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
96 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 23 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 23 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/multimedia/libv4l/linux-5.13-rc2/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 23 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 219 #define CLK_IFR_MUX1_SEL 0 macro
|