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Searched refs:CP0_TCStatus (Results 1 – 25 of 66) sorted by relevance

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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/sysemu/
H A Dcp0.c51 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()
53 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_status()
/dports/emulators/qemu/qemu-6.2.0/target/mips/sysemu/
H A Dcp0.c51 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()
53 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_status()
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dcp0_helper.c197 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
199 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
254 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
263 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
265 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
698 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
708 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
710 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
749 env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mtc0_tcrestart()
762 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
[all …]
H A Dinternal.h175 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
297 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dcp0_helper.c197 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
199 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
229 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
238 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
240 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
680 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
690 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
692 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
731 env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mtc0_tcrestart()
744 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
[all …]
H A Dinternal.h172 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
296 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dcp0_helper.c198 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
200 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
230 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
239 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
241 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
696 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
706 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
708 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
747 env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mtc0_tcrestart()
760 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
[all …]
H A Dinternal.h191 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
318 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
H A Dop_helper_log_instr.c270 env->cvtrace.asid = (uint8_t)(env->active_tc.CP0_TCStatus & 0xff); in helper_mips_cvtrace_log_instruction()
499 dump_changed_cop0_reg(env, 2*8 + 1, env->active_tc.CP0_TCStatus); in dump_changed_cop0()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/sysemu/
H A Dcp0_helper.c194 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
196 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
251 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
260 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
262 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
695 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
705 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
707 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
746 env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mtc0_tcrestart()
759 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/sysemu/
H A Dcp0_helper.c194 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
196 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
251 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
260 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
262 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
695 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
705 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
707 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
746 env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mtc0_tcrestart()
759 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dcp0_helper.c194 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
196 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
251 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
260 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
262 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
695 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
705 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
707 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
746 env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mtc0_tcrestart()
759 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
[all …]
H A Dcpu.c65 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()
67 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_status()
498 env->active_tc.CP0_TCStatus = (1 << CP0TCSt_A); in mips_cpu_reset()
499 env->tcs[0].CP0_TCStatus = (1 << CP0TCSt_A); in mips_cpu_reset()
H A Dinternal.h169 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
250 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/
H A Dinternal.h170 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
250 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu/qemu-6.2.0/target/mips/
H A Dinternal.h170 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
250 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dcpu.h176 int32_t CP0_TCStatus; member
646 (env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)) || in cpu_mips_hw_interrupts_pending()
802 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
H A Dop_helper.c656 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()
658 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_status()
707 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
709 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
739 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
748 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
750 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
1123 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
1133 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
1135 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
[all …]
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dcpu.h176 int32_t CP0_TCStatus;
646 (env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)) ||
802 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) {
H A Dop_helper.c656 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()
658 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_status()
707 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
709 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi()
739 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
748 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
750 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
1123 env->active_tc.CP0_TCStatus = newval; in helper_mtc0_tcstatus()
1133 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
1135 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dinternal.h171 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
295 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dinternal.h171 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
295 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dinternal.h163 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
273 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/
H A Dop_helper.c162 env->active_tc.CP0_TCStatus & (1 << CP0TCSt_DT)) { in helper_yield()
/dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/
H A Dop_helper.c162 env->active_tc.CP0_TCStatus & (1 << CP0TCSt_DT)) { in helper_yield()

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