Searched refs:CP_ME2_PIPE3_INT_CNTL (Results 1 – 11 of 11) sorted by relevance
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/ |
H A D | cikd.h | 1320 #define CP_ME2_PIPE3_INT_CNTL 0xC230 macro
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H A D | cik.c | 6772 WREG32(CP_ME2_PIPE3_INT_CNTL, 0); in cik_disable_interrupt_state() 6954 cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set() 7140 WREG32(CP_ME2_PIPE3_INT_CNTL, cp_m2p3); in cik_irq_set()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1365 #define CP_ME2_PIPE3_INT_CNTL 0xC230 macro
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H A D | cik.c | 6875 WREG32(CP_ME2_PIPE3_INT_CNTL, 0); in cik_disable_interrupt_state() 7058 cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set() 7229 WREG32(CP_ME2_PIPE3_INT_CNTL, cp_m2p3); in cik_irq_set()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1365 #define CP_ME2_PIPE3_INT_CNTL 0xC230 macro
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H A D | cik.c | 6875 WREG32(CP_ME2_PIPE3_INT_CNTL, 0); in cik_disable_interrupt_state() 7058 cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set() 7229 WREG32(CP_ME2_PIPE3_INT_CNTL, cp_m2p3); in cik_irq_set()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1365 #define CP_ME2_PIPE3_INT_CNTL 0xC230 macro
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H A D | cik.c | 6875 WREG32(CP_ME2_PIPE3_INT_CNTL, 0); in cik_disable_interrupt_state() 7058 cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set() 7229 WREG32(CP_ME2_PIPE3_INT_CNTL, cp_m2p3); in cik_irq_set()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v8_0.c | 6604 WREG32_FIELD(CP_ME2_PIPE3_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, in gfx_v8_0_set_cp_ecc_int_state()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v8_0.c | 6604 WREG32_FIELD(CP_ME2_PIPE3_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, in gfx_v8_0_set_cp_ecc_int_state()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v8_0.c | 6604 WREG32_FIELD(CP_ME2_PIPE3_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, in gfx_v8_0_set_cp_ecc_int_state()
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