Home
last modified time | relevance | path

Searched refs:CTCR_ARM_TIMER_AUTO_OFFS (Results 1 – 25 of 78) sorted by relevance

1234

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/kirkwood/
H A Dtimer.c62 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
64 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
65 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/arm926ejs/orion5x/
H A Dtimer.c66 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
68 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
69 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-orion5x/
H A Dtimer.c49 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
51 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
52 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-orion5x/
H A Dtimer.c53 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) macro
55 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
56 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))

1234