| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-davinci/ |
| H A D | dm365_lowlevel.c | 185 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
213 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
214 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
236 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
237 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
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| H A D | da850_lowlevel.c | 167 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
241 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
243 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-davinci/ |
| H A D | dm365_lowlevel.c | 185 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
213 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
214 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
236 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
237 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
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| H A D | da850_lowlevel.c | 167 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
241 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
243 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-davinci/ |
| H A D | dm365_lowlevel.c | 185 lpsc_on(DAVINCI_LPSC_DDR_EMIF);
213 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF);
214 lpsc_on(DAVINCI_LPSC_DDR_EMIF);
236 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF);
237 lpsc_on(DAVINCI_LPSC_DDR_EMIF);
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| H A D | da850_lowlevel.c | 167 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
241 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
243 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-davinci/ |
| H A D | dm365_lowlevel.c | 185 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
213 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
214 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
236 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
237 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/mach-davinci/ |
| H A D | dm365_lowlevel.c | 186 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
214 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
215 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
237 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
238 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
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| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-davinci/ |
| H A D | dm365_lowlevel.c | 185 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
213 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
214 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
236 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
237 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in dm365_ddr_setup()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-davinci/ |
| H A D | da850_lowlevel.c | 168 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
242 lpsc_syncreset(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
244 lpsc_on(DAVINCI_LPSC_DDR_EMIF); in da850_ddr_setup()
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