Home
last modified time | relevance | path

Searched refs:DDAR_RW (Results 1 – 25 of 73) sorted by relevance

123

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/dma/
H A Dsa11x0-dma.c46 #define DDAR_RW (1 << 0) /* 0 = W, 1 = R */ macro
667 u32 ddar = c->ddar & ((0xf << 4) | DDAR_RW); in sa11x0_dma_device_config()
672 if (ddar & DDAR_RW) { in sa11x0_dma_device_config()
803 CD(Ser0UDCRc, DDAR_RW),
805 CD(Ser1SDLCRc, DDAR_RW),
807 CD(Ser1UARTRc, DDAR_RW),
809 CD(Ser2ICPRc, DDAR_RW),
811 CD(Ser3UARTRc, DDAR_RW),
813 CD(Ser4MCP0Rc, DDAR_RW),
815 CD(Ser4MCP1Rc, DDAR_RW),
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/dma/
H A Dsa11x0-dma.c46 #define DDAR_RW (1 << 0) /* 0 = W, 1 = R */ macro
667 u32 ddar = c->ddar & ((0xf << 4) | DDAR_RW); in sa11x0_dma_device_config()
672 if (ddar & DDAR_RW) { in sa11x0_dma_device_config()
803 CD(Ser0UDCRc, DDAR_RW),
805 CD(Ser1SDLCRc, DDAR_RW),
807 CD(Ser1UARTRc, DDAR_RW),
809 CD(Ser2ICPRc, DDAR_RW),
811 CD(Ser3UARTRc, DDAR_RW),
813 CD(Ser4MCP0Rc, DDAR_RW),
815 CD(Ser4MCP1Rc, DDAR_RW),
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/dma/
H A Dsa11x0-dma.c46 #define DDAR_RW (1 << 0) /* 0 = W, 1 = R */ macro
667 u32 ddar = c->ddar & ((0xf << 4) | DDAR_RW); in sa11x0_dma_device_config()
672 if (ddar & DDAR_RW) { in sa11x0_dma_device_config()
803 CD(Ser0UDCRc, DDAR_RW),
805 CD(Ser1SDLCRc, DDAR_RW),
807 CD(Ser1UARTRc, DDAR_RW),
809 CD(Ser2ICPRc, DDAR_RW),
811 CD(Ser3UARTRc, DDAR_RW),
813 CD(Ser4MCP0Rc, DDAR_RW),
815 CD(Ser4MCP1Rc, DDAR_RW),
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/include/
H A DSA-1100.h2429 #define DDAR_RW 0x00000001 /* device data Read/Write */ macro
2430 #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */
2432 #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */

123